On Wed, Dec 14, 2016 at 09:45:12AM -0500, Michael Meissner wrote:
> I looked at the code once again, and in the cases that call the function, they
> always create a GPR temporary register, so I didn't need to reuse the
> destination register. Thanks for the comments. Are these patches ok to check
On Tue, Dec 13, 2016 at 07:02:48PM -0600, Segher Boessenkool wrote:
> On Tue, Dec 13, 2016 at 06:17:17PM -0500, Michael Meissner wrote:
> > > > + else if (mode == V8HImode)
> > > > + {
> > > > + rtx tmp_gpr_si = (GET_CODE (tmp_gpr) == SCRATCH
> > > > +
On Tue, Dec 13, 2016 at 06:17:17PM -0500, Michael Meissner wrote:
> > > + else if (mode == V8HImode)
> > > + {
> > > + rtx tmp_gpr_si = (GET_CODE (tmp_gpr) == SCRATCH
> > > + ? dest_si
> > > + : gen_rtx_REG (SImode, REGNO (tmp_gpr)));
> >
On Tue, Dec 13, 2016 at 04:29:36PM -0600, Segher Boessenkool wrote:
> On Tue, Dec 13, 2016 at 10:15:02AM -0500, Michael Meissner wrote:
> > This patch should address the comments in the last patch.
> >
> > I have tested this patch with bootstrap builds and make check regression
> > tests
> > on a
On Tue, Dec 13, 2016 at 10:15:02AM -0500, Michael Meissner wrote:
> This patch should address the comments in the last patch.
>
> I have tested this patch with bootstrap builds and make check regression tests
> on a little endian Power8 64-bit system and a big endian Power7 32/64-bit
> system with
This patch should address the comments in the last patch.
I have tested this patch with bootstrap builds and make check regression tests
on a little endian Power8 64-bit system and a big endian Power7 32/64-bit
system with no regressions. Can I check this into the trunk?
[gcc]
2016-12-13 Michae
Hi Mike,
On Fri, Dec 09, 2016 at 03:48:10PM -0500, Michael Meissner wrote:
> @@ -7528,6 +7528,49 @@ rs6000_split_vec_extract_var (rtx dest,
> + if (TARGET_P9_VECTOR
> + && (mode == V16QImode || mode == V8HImode || mode == V4SImode)
> + && INT_REGNO_P (dest_regno)
> + && AL
This patch adds support to use the ISA 3.0 VEXTU{B,H,W}{L,R}X byte extract
instructions in the PowerPC. These instructions extract a byte, 16-bit
half-word, or 32-bit word from a vector register using a variable index in a
general purpose register, and put the result in a general purpose register.
