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Subject: [PATCH] [PR rtl/optimization/98694] Fix incorrect optimization by
cprop_hardreg.
If SRC had been assigned a mode narrower than the copy, we can't
always link DEST into the chain even they have same
hard_regno_nregs(i.e. HImode/SImode in i386 backend).
i.e
kmovw %k0, %ed
;> [B] partial_subreg_p (vd->e[sr].mode, vd->e[vd->e[sr].oldest_regno].mode)
>>
>> For example, all registers in this sequence can be part of the same chain:
>>
>> (set (reg:HI R1) (reg:HI R0))
>> (set (reg:SI R2) (reg:SI R1)) // [A]
>>
On Tue, Jan 19, 2021 at 8:32 PM Hongtao Liu via Gcc-patches
wrote:
>
> On Wed, Jan 20, 2021 at 12:10 AM Richard Sandiford
> wrote:
> >
> > Jakub Jelinek via Gcc-patches writes:
> > > On Tue, Jan 19, 2021 at 12:38:47PM +, Richard Sandiford via
> > > Gcc-patches wrote:
> > >> > actually only
On Wed, Jan 20, 2021 at 12:35 PM Hongtao Liu wrote:
>
> On Wed, Jan 20, 2021 at 12:10 AM Richard Sandiford
> wrote:
> >
> > Jakub Jelinek via Gcc-patches writes:
> > > On Tue, Jan 19, 2021 at 12:38:47PM +, Richard Sandiford via
> > > Gcc-patches wrote:
> > >> > actually only the lower 16bit
set (reg:SI R3) (reg:SI R2)) // [A] && [B]
>
> is problematic because it dips below the precision of the oldest regno
> and then increases again.
>
> When this happens, I guess we have two choices:
>
> (1) what the patch does: treat R3 as the start of a new chain.
&g
Jakub Jelinek via Gcc-patches writes:
> On Tue, Jan 19, 2021 at 12:38:47PM +, Richard Sandiford via Gcc-patches
> wrote:
>> > actually only the lower 16bits are needed, the original insn is like
>> >
>> > .294.r.ira
>> > (insn 69 68 70 13 (set (reg:HI 96 [ _52 ])
>> > (subreg:HI (reg:
On Tue, Jan 19, 2021 at 12:38:47PM +, Richard Sandiford via Gcc-patches
wrote:
> > actually only the lower 16bits are needed, the original insn is like
> >
> > .294.r.ira
> > (insn 69 68 70 13 (set (reg:HI 96 [ _52 ])
> > (subreg:HI (reg:DI 82 [ var_6.0_1 ]) 0)) "test.c":21:23 76
> > {
Hongtao Liu writes:
> On Mon, Jan 18, 2021 at 7:10 PM Richard Sandiford
> wrote:
>>
>> Hongtao Liu writes:
>> > On Mon, Jan 18, 2021 at 6:18 PM Richard Sandiford
>> > wrote:
>> >>
>> >> Hongtao Liu via Gcc-patches writes:
>> >> > Hi:
>> >> > If SRC had been assigned a mode narrower than the
On Mon, Jan 18, 2021 at 7:10 PM Richard Sandiford
wrote:
>
> Hongtao Liu writes:
> > On Mon, Jan 18, 2021 at 6:18 PM Richard Sandiford
> > wrote:
> >>
> >> Hongtao Liu via Gcc-patches writes:
> >> > Hi:
> >> > If SRC had been assigned a mode narrower than the copy, we can't link
> >> > DEST i
Hongtao Liu writes:
> On Mon, Jan 18, 2021 at 6:18 PM Richard Sandiford
> wrote:
>>
>> Hongtao Liu via Gcc-patches writes:
>> > Hi:
>> > If SRC had been assigned a mode narrower than the copy, we can't link
>> > DEST into the chain even they have same
>> > hard_regno_nregs(i.e. HImode/SImode i
On Mon, Jan 18, 2021 at 6:43 PM Hongtao Liu wrote:
>
> On Mon, Jan 18, 2021 at 6:18 PM Richard Sandiford
> wrote:
> >
> > Hongtao Liu via Gcc-patches writes:
> > > Hi:
> > > If SRC had been assigned a mode narrower than the copy, we can't link
> > > DEST into the chain even they have same
> >
On Mon, Jan 18, 2021 at 6:18 PM Richard Sandiford
wrote:
>
> Hongtao Liu via Gcc-patches writes:
> > Hi:
> > If SRC had been assigned a mode narrower than the copy, we can't link
> > DEST into the chain even they have same
> > hard_regno_nregs(i.e. HImode/SImode in i386 backend).
>
> In general
Hongtao Liu via Gcc-patches writes:
> Hi:
> If SRC had been assigned a mode narrower than the copy, we can't link
> DEST into the chain even they have same
> hard_regno_nregs(i.e. HImode/SImode in i386 backend).
In general, changes between modes within the same hard register are OK.
Could you e
Hi:
If SRC had been assigned a mode narrower than the copy, we can't link
DEST into the chain even they have same
hard_regno_nregs(i.e. HImode/SImode in i386 backend).
i.e
kmovw %k0, %edi
vmovd %edi, %xmm2
vpshuflw$0, %xmm2, %xmm0
kmovw %k0, %r8d
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