On 2017.12.17 at 12:26 +0100, Jan Hubicka wrote:
> > Since Nehalem the 64bit multiplication latency is three cycles, not
> > four. So update the costs to reflect reality.
>
> I looked into the imul latencies and was a bit confused, decided to look
> into it later and forgot.
>
> Agner Fog's table
> Since Nehalem the 64bit multiplication latency is three cycles, not
> four. So update the costs to reflect reality.
I looked into the imul latencies and was a bit confused, decided to look
into it later and forgot.
Agner Fog's table http://www.agner.org/optimize/instruction_tables.pdf
lists for
Since Nehalem the 64bit multiplication latency is three cycles, not
four. So update the costs to reflect reality.
Tested on X86_64.
OK for trunk?
Thanks.
* x86-tune-costs.h (skylake_cost, core_cost): Decrease r64 multiply
latencies.
* gcc.target/i386/wmul-3.c: New test.