Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Andrew Stubbs
On 20/01/2020 16:42, Harwath, Frederik wrote: Hi Andrew, Thanks for the review! I have attached a revised patch containing the changes that you suggested. On 20.01.20 11:00, Andrew Stubbs wrote: On 20/01/2020 06:57, Harwath, Frederik wrote: Is it ok to commit this patch to the master branch?

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Harwath, Frederik
Hi Andrew, Thanks for the review! I have attached a revised patch containing the changes that you suggested. On 20.01.20 11:00, Andrew Stubbs wrote: > On 20/01/2020 06:57, Harwath, Frederik wrote: >> Is it ok to commit this patch to the master branch? > > I can't see anything significantly wron

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Tobias Burnus
On 1/20/20 12:07 PM, Jakub Jelinek wrote: I'd say easiest would be to do that in the gcn specific mkoffload. But there needs to be a way for the user to specify that he wants only a particular variant and not all of them (perhaps look for -march= in the offload options?)? I think that relates

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Andrew Stubbs
On 20/01/2020 11:07, Jakub Jelinek wrote: On Mon, Jan 20, 2020 at 11:00:58AM +, Andrew Stubbs wrote: Indeed, fat binaries would be a good solution. Presumably it's possible, but I'm not sure how we'd go about getting the offload mechanism to launch the backend multiple times? Having got tha

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Jakub Jelinek
On Mon, Jan 20, 2020 at 11:00:58AM +, Andrew Stubbs wrote: > Indeed, fat binaries would be a good solution. > > Presumably it's possible, but I'm not sure how we'd go about getting the > offload mechanism to launch the backend multiple times? Having got that far, > the libgomp and mkoffload ch

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Andrew Stubbs
On 20/01/2020 10:42, Jakub Jelinek wrote: :( Another option would be to build offloading code by GCN multiple times, once for each incompatible ISA the user is asking for, so that one can have then binaries that will work on different hw. Because e.g. with the distro vendor hat, it is hard to gue

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Jakub Jelinek
On Mon, Jan 20, 2020 at 10:36:31AM +, Andrew Stubbs wrote: > The HSA/ROCm runtime rejects binaries not built for the exact device > present. > > In practice, binaries built by GCC for GCN3 "fiji" devices would probably > run on any of the devices we currently support, if only the driver would

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Andrew Stubbs
On 20/01/2020 10:08, Jakub Jelinek wrote: On Mon, Jan 20, 2020 at 10:00:09AM +, Andrew Stubbs wrote: @@ -396,6 +396,88 @@ struct gcn_image_desc struct global_var_info *global_variables; }; +/* This enum mirrors the corresponding LLVM enum's values for all ISAs that we + support. +

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Jakub Jelinek
On Mon, Jan 20, 2020 at 10:00:09AM +, Andrew Stubbs wrote: > > @@ -396,6 +396,88 @@ struct gcn_image_desc > >struct global_var_info *global_variables; > > }; > > +/* This enum mirrors the corresponding LLVM enum's values for all ISAs > > that we > > + support. > > + See https://llvm.o

Re: [PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-20 Thread Andrew Stubbs
Hi Frederik, On 20/01/2020 06:57, Harwath, Frederik wrote: Hi, this patch implements a runtime ISA check for amdgcn offloading. The check verifies that the ISA of the GPU to which we try to offload matches the ISA for which the code to be offloaded has been compiled. If it detects a mismatch, it

[PATCH][amdgcn] Add runtime ISA check for amdgcn offloading

2020-01-19 Thread Harwath, Frederik
Hi, this patch implements a runtime ISA check for amdgcn offloading. The check verifies that the ISA of the GPU to which we try to offload matches the ISA for which the code to be offloaded has been compiled. If it detects a mismatch, it emits an error message which contains a hint at the correct