Re: [PATCH][AArch64] Model CSEL instruction in Cortex-A57 scheduling model

2016-06-07 Thread James Greenhalgh
On Tue, Jun 07, 2016 at 09:22:05AM +0100, Ramana Radhakrishnan wrote: > > > On 06/06/16 17:10, Kyrill Tkachov wrote: > > Hi all, > > > > This small patch adds handling of the CSEL-type instructions to the > > Cortex-A57 scheduling model. > > It is treated the same as simple ALU instructions. >

Re: [PATCH][AArch64] Model CSEL instruction in Cortex-A57 scheduling model

2016-06-07 Thread Ramana Radhakrishnan
On 06/06/16 17:10, Kyrill Tkachov wrote: > Hi all, > > This small patch adds handling of the CSEL-type instructions to the > Cortex-A57 scheduling model. > It is treated the same as simple ALU instructions. > > With this patch I didn't see any overall differences in SPEC2006. > > Bootstrapped

[PATCH][AArch64] Model CSEL instruction in Cortex-A57 scheduling model

2016-06-06 Thread Kyrill Tkachov
Hi all, This small patch adds handling of the CSEL-type instructions to the Cortex-A57 scheduling model. It is treated the same as simple ALU instructions. With this patch I didn't see any overall differences in SPEC2006. Bootstrapped and tested on arm-none-linux-gnueabihf and aarch64-linux-gn