FYI: Here is a cut down test case showing the failure:
int foo (void) { }
extern void plunk ();
int splat (void)
{
static int once = 0;
plunk (&once, foo);
}
% obj/gcc/gcc/cc1 -mabi=ilp32 -O2 -quiet x.i
during RTL pass: final
x.i: In function ‘splat’:
x.i:7:1: internal compiler erro
On Wed, 2017-11-29 at 21:13 +0100, Christophe Lyon wrote:
> Hi Wilco,
>
> This breaks the build of aarch64-none-elf toolchains:
>
> /tmp/8868058_9.tmpdir/aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/final.c:4564
> Please submit a full bug report,
> with preprocessed source if appropriate.
> Please inc
On 28 November 2017 at 19:15, James Greenhalgh wrote:
> On Mon, Nov 27, 2017 at 03:20:29PM +, Wilco Dijkstra wrote:
>> The recently added store_pair_lanes causes ICEs in output_operand.
>> This is due to aarch64_classify_address treating it like a 128-bit STR
>> rather than a STP. The valid im
On Mon, Nov 27, 2017 at 03:20:29PM +, Wilco Dijkstra wrote:
> The recently added store_pair_lanes causes ICEs in output_operand.
> This is due to aarch64_classify_address treating it like a 128-bit STR
> rather than a STP. The valid immediate offsets don't fully overlap,
> causing it to return
The recently added store_pair_lanes causes ICEs in output_operand.
This is due to aarch64_classify_address treating it like a 128-bit STR
rather than a STP. The valid immediate offsets don't fully overlap,
causing it to return false. Eg. offset 264 is a valid 8-byte STP offset
but not a valid 16-b
