Re: [PATCH][AArch64] Align FP callee-saves

2016-10-18 Thread James Greenhalgh
On Mon, Oct 17, 2016 at 12:40:18PM +, Wilco Dijkstra wrote: > > ping > > If the number of integer callee-saves is odd, the FP callee-saves use 8-byte > aligned LDP/STP.  Since 16-byte alignment may be faster on some CPUs, align > the FP callee-saves to 16 bytes and use the alignment gap for th

Re: [PATCH][AArch64] Align FP callee-saves

2016-10-17 Thread Wilco Dijkstra
ping From: Wilco Dijkstra Sent: 08 September 2016 14:35 To: GCC Patches Cc: nd Subject: [PATCH][AArch64] Align FP callee-saves   If the number of integer callee-saves is odd, the FP callee-saves use 8-byte aligned LDP/STP.  Since 16-byte alignment may be faster on some CPUs, align the FP

Re: [PATCH][AArch64] Align FP callee-saves

2016-09-21 Thread Wilco Dijkstra
ping From: Wilco Dijkstra Sent: 08 September 2016 14:35 To: GCC Patches Cc: nd Subject: [PATCH][AArch64] Align FP callee-saves   If the number of integer callee-saves is odd, the FP callee-saves use 8-byte aligned LDP/STP.  Since 16-byte alignment may be faster on some CPUs, align the FP

[PATCH][AArch64] Align FP callee-saves

2016-09-08 Thread Wilco Dijkstra
If the number of integer callee-saves is odd, the FP callee-saves use 8-byte aligned LDP/STP. Since 16-byte alignment may be faster on some CPUs, align the FP callee-saves to 16 bytes and use the alignment gap for the last FP callee-save when possible. Besides slightly different offsets for FP c