Re: [PATCH], Improve PowerPC switch behavior on medium code model system

2018-08-20 Thread Michael Meissner
On Fri, Aug 10, 2018 at 11:04:50AM -0500, Segher Boessenkool wrote: > On Tue, Jul 31, 2018 at 10:39:21AM -0400, Michael Meissner wrote: > > This patch adds an insn to load a LABEL_REF into a GPR. This is needed so > > the > > FWPROP1 pass can convert the load the of the label address from the TOC

Re: [PATCH], Improve PowerPC switch behavior on medium code model system

2018-08-10 Thread Segher Boessenkool
On Tue, Jul 31, 2018 at 10:39:21AM -0400, Michael Meissner wrote: > This patch adds an insn to load a LABEL_REF into a GPR. This is needed so the > FWPROP1 pass can convert the load the of the label address from the TOC to a > direct load to a GPR. I don't see why you need a separate RTL insn for

[PATCH], Improve PowerPC switch behavior on medium code model system

2018-07-31 Thread Michael Meissner
I noticed that the switch code on PowerPC little endian systems (with medium code mode) did not follow the ABI in terms of page 69: Table 2.36. Position-Independent Switch Code for Small/Medium Models (preferred, with TOC-relative addressing) The code we currently generate is: