On Thu, Mar 1, 2012 at 3:20 AM, Greta Yorsh wrote:
> I'm attaching a new version of the patch. Fixed all comments and retested.
> No regression on qemu --with-cpu cortex-a9.
I assume that on the Cortex-A9 this generates a LDM instead of an
expensive LDRD. For reference, a tight load loop takes 2
On 29 February 2012 14:20, Greta Yorsh wrote:
> I'm attaching a new version of the patch. Fixed all comments and retested.
> No regression on qemu --with-cpu cortex-a9.
OK by me but please give 24 hours for an RM to comment / object.
cheers
Ramana
am...@gcc.gnu.org; p...@codesourcery.com;
> ni...@redhat.com
> Subject: Re: [PATCH,ARM] Improve peepholes for LDM with commutative
> operators
>
> [Sorry about the duplicate mail. My mailer seems to have eaten up the
> original reply I sent. ]
>
>
> On Tue, Feb 28, 2012 at 05:09:
[Sorry about the duplicate mail. My mailer seems to have eaten up the
original reply I sent. ]
On Tue, Feb 28, 2012 at 05:09:05PM -, Greta Yorsh wrote:
> Is it OK for GCC 4.7 Stage 4 ?
This is stage4 - I'd like to hear what the RM's think. Technically
it's fixing a regression and is low risk
On Tue, Feb 28, 2012 at 05:09:05PM -, Greta Yorsh wrote:
> Is it OK for GCC 4.7 Stage 4 ?
Technically this is a regression in 4.7 compared to 4.6,
so I'd like to get this in.
However given the stage we are and given that it's not a
correctness issue, I would defer to the RMs.
In any case
This patch improves existing peephole optimizations that merge individual
LDRs into LDM, in the case that the order of registers in LDR instructions
is not ascending, but the loaded values can be reordered because their uses
commute.
There are two changes:
* use rtx__equal_p to compare operands (
