Re: [PATCH, rs6000] Map dcbtst, dcbtt to n2=0 for __builtin_prefetch builtin.

2018-05-09 Thread Segher Boessenkool
Hi, On Tue, May 08, 2018 at 05:04:33PM -0700, Carl Love wrote: > On Tue, 2018-05-08 at 11:24 -0500, Segher Boessenkool wrote: > > What ISA version is required for the TH field to do anything?  Will > > it work on older machines too (just ignored)?  What assembler version > > is required? > > I we

Re: [PATCH, rs6000] Map dcbtst, dcbtt to n2=0 for __builtin_prefetch builtin.

2018-05-08 Thread Carl Love
Segher: On Tue, 2018-05-08 at 11:24 -0500, Segher Boessenkool wrote: > What ISA version is required for the TH field to do anything?  Will > it work on older machines too (just ignored)?  What assembler version > is required? I went back and checked. The mnemonics for dcbtt RA,RB  dcbt for T

Re: [PATCH, rs6000] Map dcbtst, dcbtt to n2=0 for __builtin_prefetch builtin.

2018-05-08 Thread Segher Boessenkool
Hi Carl, On Mon, May 07, 2018 at 01:34:55PM -0700, Carl Love wrote: > This patch maps n2=0 to generate the dcbtstt mnemonic (dcbst for TH > value of 0b1) for a write prefetch and dcbtst for n2 in range > [1,3].   > > The dcbtt mnemonic (dcbt for TH value of 0b1) is generated for a > read

[PATCH, rs6000] Map dcbtst, dcbtt to n2=0 for __builtin_prefetch builtin.

2018-05-07 Thread Carl Love
GCC maintainers: The architecture independent builtin __builtin_prefetch() is defined as: void __builtin_prefetch (const void *addr, int n1, int n2) n1 - prefetch read = 0, prefetch write = 1 n2 - temporal locality 0 to 3. No temporal locality = 0, high temporal locality = 3. The impleme