On Mon, Sep 22, 2014 at 5:35 PM, Michael Meissner
wrote:
> I was working to support enhancing addressing modes in the the compiler that
> is
> indended to better support load fusion in power8, and to finally allow
> DFmode/SFmode scalar values in the traditional altivec registers. I noticed
> th
I was working to support enhancing addressing modes in the the compiler that is
indended to better support load fusion in power8, and to finally allow
DFmode/SFmode scalar values in the traditional altivec registers. I noticed
that the floating point moves were still using constraints that could t
