Richard Earnshaw wrote:
> You confused me for a bit with the reference to "line numbers", but I
> think you must mean "lane numbers".
Indeed, sorry for the confusion.
> FTR, I see no reason why GCC would have problems with 64-bit vectors in
> big-endian mode, it's only 128-bit (and larger) vecto
On 14/09/12 19:03, Ulrich Weigand wrote:
> Hello,
>
> following up on the prior patch, this patch exploits more opportunities to
> generate the vld1 / vst1 family of instructions, this time to implement the
> vec_set and vec_extract patterns with memory scalar operands.
>
> Without the patch, vec
Hello,
following up on the prior patch, this patch exploits more opportunities to
generate the vld1 / vst1 family of instructions, this time to implement the
vec_set and vec_extract patterns with memory scalar operands.
Without the patch, vec_set/vec_extract only support register operands for the
