On 10/04/13 11:35, Hurugalawadi, Naveen wrote:
+(define_insn "*cmn_swp__reg"
+ [(set (reg:CC_SWP CC_REGNUM)
+ (compare:CC_SWP (ANY_EXTEND:GPI
+(match_operand:ALLX 0 "register_operand" "r"))
+ (neg:GPI (match_operand:GPI 1 "register_operand"
"
Hi,
Please find attached the patch that implements compare negative
instruction with shift and extend mode for aarch64 target.
Testcase have been added for compare and compare negative instruction.
Please review the same and let me know if there should be any
modifications in the patch.
Build