[committed] [PATCH, AARCH64] movcc for fcsel

2014-04-28 Thread Zhenqiang Chen
On 28 April 2014 18:16, Marcus Shawcroft wrote: > On 22 April 2014 10:36, Zhenqiang Chen wrote: > >>> +float f1 (float a, float b, float c, float d) >>> +{ >>> + if (a > 0.0) >>> +return c; >>> + else >>> +return 2.0; >>> +} >>> + >>> +double f2 (double a, double b, double c, double d)

Re: [PING] [PATCH, AARCH64] movcc for fcsel

2014-04-28 Thread Marcus Shawcroft
On 22 April 2014 10:36, Zhenqiang Chen wrote: >> +float f1 (float a, float b, float c, float d) >> +{ >> + if (a > 0.0) >> +return c; >> + else >> +return 2.0; >> +} >> + >> +double f2 (double a, double b, double c, double d) >> +{ >> + if (a > b) >> +return c; >> + else >> +r

Re: [PING] [PATCH, AARCH64] movcc for fcsel

2014-04-22 Thread pinskia
> On Apr 22, 2014, at 2:36 AM, Zhenqiang Chen wrote: > > Ping? > > Rebase and test. Bootstrap and no make check regression with qemu. > > OK for trunk? This is the exact same patch we (Cavium) came up with for this missed optimization. Thanks, Andrew > > Thanks! > -Zhenqiang > >> On 18

[PING] [PATCH, AARCH64] movcc for fcsel

2014-04-22 Thread Zhenqiang Chen
Ping? Rebase and test. Bootstrap and no make check regression with qemu. OK for trunk? Thanks! -Zhenqiang On 18 March 2014 16:16, Zhenqiang Chen wrote: > Hi, > > For float value, movsfcc/movdfcc is required by emit_conditional_move > called in ifcvt pass to expand if-then-else to "fcsel" insn.

[PATCH, AARCH64] movcc for fcsel

2014-03-18 Thread Zhenqiang Chen
Hi, For float value, movsfcc/movdfcc is required by emit_conditional_move called in ifcvt pass to expand if-then-else to "fcsel" insn. Bootstrap and no make check regression with qemu-aarch64. Is it OK for next stage1? Thanks! -Zhenqiang ChangeLog: 2014-03-18 Zhenqiang Chen * config/aa