Christophe Lyon writes:
> + if (SYMBOL_REF_P (orig))
> +{
> + if (CONSTANT_POOL_ADDRESS_P (orig))
> + {
> + *is_readonly = true;
> + return true;
> + }
> + if (SYMBOL_REF_LOCAL_P (orig)
> + && !SYMBOL_REF_EXTERNAL_P (orig)
> + && SYMBOL_REF_DECL (orig
On Tue, 3 Sep 2019 at 10:40, Richard Sandiford
wrote:
>
> Christophe Lyon writes:
> > @@ -3485,6 +3485,14 @@ arm_option_override (void)
> >if (flag_pic && TARGET_VXWORKS_RTP)
> > arm_pic_register = 9;
> >
> > + /* If in FDPIC mode then force arm_pic_register to be r9. */
> > + if (TAR
Christophe Lyon writes:
> @@ -3485,6 +3485,14 @@ arm_option_override (void)
>if (flag_pic && TARGET_VXWORKS_RTP)
> arm_pic_register = 9;
>
> + /* If in FDPIC mode then force arm_pic_register to be r9. */
> + if (TARGET_FDPIC)
> +{
> + arm_pic_register = FDPIC_REGNUM;
> +
On Mon, 2 Sep 2019 at 18:12, Richard Sandiford
wrote:
>
> Sorry for the slow reply.
>
> Christophe Lyon writes:
> > On 16/07/2019 13:58, Richard Sandiford wrote:
> >> Christophe Lyon writes:
> >>> +(define_insn "*restore_pic_register_after_call"
> >>> + [(parallel [(unspec [(match_operand:SI 0
Sorry for the slow reply.
Christophe Lyon writes:
> On 16/07/2019 13:58, Richard Sandiford wrote:
>> Christophe Lyon writes:
>>> +(define_insn "*restore_pic_register_after_call"
>>> + [(parallel [(unspec [(match_operand:SI 0 "s_register_operand" "=r,r")
>>> + (match_operand:SI
On 16/07/2019 13:58, Richard Sandiford wrote:
Christophe Lyon writes:
The FDPIC register is hard-coded to r9, as defined in the ABI.
We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with t
On 16/07/2019 13:58, Richard Sandiford wrote:
Christophe Lyon writes:
The FDPIC register is hard-coded to r9, as defined in the ABI.
We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with t
Christophe Lyon writes:
> The FDPIC register is hard-coded to r9, as defined in the ABI.
>
> We have to disable tailcall optimizations if we don't know if the
> target function is in the same module. If not, we have to set r9 to
> the value associated with the target module.
>
> When generating a
The FDPIC register is hard-coded to r9, as defined in the ABI.
We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.
When generating a symbol address, we have to take into
