Re: [AArch64] Prefer LD1RQ for big-endian SVE

2018-01-29 Thread James Greenhalgh
On Fri, Jan 26, 2018 at 01:54:42PM +, Richard Sandiford wrote: > This patch deals with cases in which a CONST_VECTOR contains a > repeating bit pattern that is wider than one element but narrower > than 128 bits. The current code: > > * treats the repeating pattern as a single element > * use

[AArch64] Prefer LD1RQ for big-endian SVE

2018-01-26 Thread Richard Sandiford
This patch deals with cases in which a CONST_VECTOR contains a repeating bit pattern that is wider than one element but narrower than 128 bits. The current code: * treats the repeating pattern as a single element * uses the associated LD1R to load and replicate it (such as LD1RD for 64-bit patt