Re: [AArch64] Make sure start callee-save offset for D registers aligned

2014-07-24 Thread Jiong Wang
Hi Maxim, On 24/07/14 14:16, Maxim Kuvyrkov wrote: On Jun 5, 2014, at 3:04 PM, Jiong Wang wrote: For AArch64, there may have been an odd num core registers need to be saved. This small patch ensure we remain 16 byte aligned for subsequent STP writes of D registers. OK for trunk? Hi Jiong,

Re: [AArch64] Make sure start callee-save offset for D registers aligned

2014-07-24 Thread Maxim Kuvyrkov
On Jun 5, 2014, at 3:04 PM, Jiong Wang wrote: > For AArch64, there may have been an odd num core registers need to be saved. > > This small patch ensure we remain 16 byte aligned for subsequent STP writes > of D registers. > > OK for trunk? Hi Jiong, How did you test the patch? You need to

[AArch64] Make sure start callee-save offset for D registers aligned

2014-06-05 Thread Jiong Wang
For AArch64, there may have been an odd num core registers need to be saved. This small patch ensure we remain 16 byte aligned for subsequent STP writes of D registers. OK for trunk? thanks. gcc/ * config/aarch64/aarch64.c (aarch64_layout_frame): Make sure start offset for vector regist