Hi all,
The unsigned variants of the vcaddq_m operation are not needed within the
compiler, as the assembly output of the signed and unsigned versions of the
ops is identical: with a `.i` suffix (as opposed to separate `.s` and `.u`
suffixes).
Tested with baremetal arm-none-eabi on Arm's fastmod
gle_set (next_use_insn))
+ return true;
Assumes single_set doesn't return 0.
Thanks! That is indeed correct.
Corrected this by having a utility function to scan insn operands and
check against mve_memory_operand that supports any number of
operands/SETs in the insn
Let
urn true if an insn is an MVE instruction that VPT-predicable,
but in
+ its unpredicated form, or if it is predicated, but on a predicate
other
+ than vpr_reg. */
In this one also 'is a MVE instruction that is VPT-predicable' would
be better I think.
Oops, thanks for spotting.
Hi all,
This is the 2/2 patch that contains the functional changes needed
for MVE Tail Predicated Low Overhead Loops. See my previous email
for a general introduction of MVE LOLs.
This support is added through the already existing loop-doloop
mechanisms that are used for
On 23/05/2023 15:41, Christophe Lyon wrote:
Glibc defines int32_t as 'int' while newlib defines it as 'long int'.
Although these correspond to the same size, g++ complains when using the
On 17/05/2023 10:26, Kyrylo Tkachov wrote:
Hi Stam,
-Original Message-
From: Stam Markianos-Wright
Sent: Tuesday, May 16, 2023 2:32 PM
To: gcc-patches@gcc.gnu.org
Cc: Kyrylo Tkachov ; Richard Earnshaw
; Andrea Corallo
Subject: [GCC12 backport] arm: MVE testsuite and backend bugfixes
Hi all,
We've recently sent up a lot of patches overhauling the testsuite of the
Arm MVE backend.
With these changes, we've also identified and fixed a number of bugs
(some backend bugs and many to do with the polymorphism of intrinsics in
MVE the header file).
These would all be relevant to
Hi Kyrill,
On 28/04/2023 17:58, Kyrylo Tkachov wrote:
-Original Message-
From: Andrea Corallo
Sent: Friday, April 28, 2023 12:30 PM
To: gcc-patches@gcc.gnu.org
Cc: Kyrylo Tkachov ; Richard Earnshaw
; Stam Markianos-Wright
Subject: [PATCH 10/10] arm testsuite: Shifts and get_FPSCR ACL
On 28/04/2023 17:45, Kyrylo Tkachov wrote:
Hi Andrea, Stam,
-Original Message-
From: Andrea Corallo
Sent: Friday, April 28, 2023 12:30 PM
To: gcc-patches@gcc.gnu.org
Cc: Kyrylo Tkachov ; Richard Earnshaw
; Stam Markianos-Wright
Subject: [PATCH 04/10] arm: Stop vadcq, vsbcq intrinsics
On 28/04/2023 17:54, Kyrylo Tkachov wrote:
-Original Message-
From: Andrea Corallo
Sent: Friday, April 28, 2023 12:30 PM
To: gcc-patches@gcc.gnu.org
Cc: Kyrylo Tkachov ; Richard Earnshaw
; Stam Markianos-Wright
Subject: [PATCH 09/10] arm testsuite: XFAIL or relax registers in some t
On 02/05/2023 09:28, Christophe Lyon wrote:
Hi Stam!
On 4/28/23 13:30, Andrea Corallo via Gcc-patches wrote:
From: Stam Markianos-Wright
Hi all,
This is a simple testsuite tidy-up patch, addressing to types of errors:
* The vcmp vector-scalar tests failing due to the compiler's preferenc
Hi all,
This is just a minor issue I found with a previous test
of mine that caused it to fail in C++ mode due to these
unused const variables being uninitialised. I forgot to
remove these after removing some test cases that did use
them.
I removed the test cases, because I came to the
conclusion
On 29/03/2023 13:16, Kyrylo Tkachov wrote:
-Original Message-
From: Stam Markianos-Wright
Sent: Wednesday, March 29, 2023 11:50 AM
To:gcc-patches@gcc.gnu.org
Cc: Kyrylo Tkachov
Subject: arm: Fix MVE vcreate definition
Hi all,
I just found a bug that goes back to the initial merge of
t
Hi all,
I just found a bug that goes back to the initial merge of
the MVE backend: The vcreate intrinsic has had it's vector
lanes mixed up, compared to what was intended (as per
the ACLE) definition. This is also a discrepancy with clang:
https://godbolt.org/z/4n93e5aqj
This patches simply swit
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