Re: [PATCH] x86: Add *one_cmplqi_ext_2

2025-08-04 Thread H.J. Lu
On Mon, Aug 4, 2025 at 2:04 PM H.J. Lu wrote: > > On Mon, Aug 4, 2025 at 8:50 AM Richard Sandiford > wrote: > > > > Uros Bizjak writes: > > > On Sat, Aug 2, 2025 at 8:56 PM H.J. Lu wrote: > > >> > > >> On Fri, Aug 1, 2025 at 10:32 PM Uros B

Re: [PATCH] x86: Add *one_cmplqi_ext_2

2025-08-04 Thread H.J. Lu
On Mon, Aug 4, 2025 at 8:50 AM Richard Sandiford wrote: > > Uros Bizjak writes: > > On Sat, Aug 2, 2025 at 8:56 PM H.J. Lu wrote: > >> > >> On Fri, Aug 1, 2025 at 10:32 PM Uros Bizjak wrote: > >> > > >> > On Sat, Aug 2, 2

Re: [PATCH v3] x86-64: Remove redundant TLS calls

2025-08-04 Thread H.J. Lu
On Mon, Aug 04, 2025 at 02:57:39PM +0800, Hongtao Liu wrote: > > > > > + rtx_insn *before = nullptr; > > > > > + rtx_insn *after = nullptr; > > > > > + if (insn == BB_HEAD (bb)) > > > > > +before = insn; > > > > > + else > > > > > +after = insn ? PREV_INSN (insn) : BB_END (bb); > > > >

Re: [PATCH v4] x86-64: Remove redundant TLS calls

2025-08-03 Thread H.J. Lu
On Mon, Jul 28, 2025 at 6:25 PM H.J. Lu wrote: > > For TLS calls: > > 1. UNSPEC_TLS_GD: > > (parallel [ > (set (reg:DI 0 ax) > (call:DI (mem:QI (symbol_ref:DI ("__tls_get_addr"))) > (const_int 0 [0]))) > (uns

[PATCH v5] x86-64: Remove redundant TLS calls

2025-08-03 Thread H.J. Lu
target/i386/pr81501-8b.c: Likewise. * gcc.target/i386/pr81501-9a.c: Likewise. * gcc.target/i386/pr81501-9b.c: Likewise. * gcc.target/i386/pr81501-10a.c: Likewise. * gcc.target/i386/pr81501-10b.c: Likewise. Signed-off-by: H.J. Lu --- gcc/config/i386/i386-features.cc

Re: [pushed] wwwdocs: gcc-16: Fix markup and activate IA-32/x86-64 section

2025-08-03 Thread H.J. Lu
On Sat, Aug 2, 2025 at 5:12 PM Gerald Pfeifer wrote: > > H.J., I assume you also wanted to activate the respective section? > Yes. Thanks. > Pushed. > > Gerald > --- > htdocs/gcc-16/changes.html | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/htdocs/gcc-16/changes.h

Re: [PATCH] x86: Add *one_cmplqi_ext_2

2025-08-03 Thread H.J. Lu
On Sun, Aug 3, 2025 at 12:45 AM Uros Bizjak wrote: > > On Sat, Aug 2, 2025 at 8:56 PM H.J. Lu wrote: > > > > On Fri, Aug 1, 2025 at 10:32 PM Uros Bizjak wrote: > > > > > > On Sat, Aug 2, 2025 at 3:22 AM H.J. Lu wrote: > >

Re: [PATCH] x86: Add *one_cmplqi_ext_2

2025-08-02 Thread H.J. Lu
On Fri, Aug 1, 2025 at 10:32 PM Uros Bizjak wrote: > > On Sat, Aug 2, 2025 at 3:22 AM H.J. Lu wrote: > > > > After > > > > commit 965564eafb721f813a3112f1bba8d8fae32b > > Author: Richard Sandiford > > Date: Tue Jul 29 15:58:34 2025 +0100 > >

[PATCH] combine: Make extraction for ZERO_EXTRACT destination from LSHIFTRT

2025-08-01 Thread H.J. Lu
make_compound_operation_int. * rtl.h (make_compound_operation): Add an rtx argument, default to nullptr. Signed-off-by: H.J. Lu --- gcc/combine.cc | 34 ++ gcc/rtl.h | 2 +- 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/gcc/combine.cc b

[PATCH] x86: Add *one_cmplqi_ext_2

2025-08-01 Thread H.J. Lu
]) (const_int 8 [0x8]) (const_int 8 [0x8])) 0)) 0)) Add *one_cmplqi_ext_2 to support the new pattern. PR target/121306 * config/i386/i386.md (*one_cmplqi_ext_2): New. Signed-off-by: H.J. Lu --- gcc/config/i386/i386.md | 32

Re: [PATCH v3] gcc-16/changes.html: Add --enable-x86-64-mfentry

2025-08-01 Thread H.J. Lu
On Fri, Aug 1, 2025 at 4:24 AM Gerald Pfeifer wrote: > > On Tue, 29 Jul 2025, H.J. Lu wrote: > > No. --enable-x86-64-mfentry will make -mfentry, which replaces mcount > > with __fentry__, as the default. > > Got it. Thanks for your patience. > > > How about this

[PATCH] x86: Don't hoist non all 0s/1s vector set outside of loop

2025-08-01 Thread H.J. Lu
get/120941 * gcc.target/i386/pr120941-1.c: New test. Signed-off-by: H.J. Lu --- gcc/config/i386/i386-features.cc | 107 +++-- gcc/testsuite/gcc.target/i386/pr120941-1.c | 49 ++ 2 files changed, 106 insertions(+), 50 deletions(-) create mode 100644 gcc

[PATCH] fortran: Set DECL_TLS_MODEL after processing a variable

2025-08-01 Thread H.J. Lu
(gfc_finish_var_decl): Likewise. (get_proc_pointer_decl): Likewise. gcc/testsuite/ PR fortran/107421 * gfortran.dg/gomp/pr107421.f90: New test. Signed-off-by: H.J. Lu --- gcc/fortran/trans-common.cc | 7 --- gcc/fortran/trans-decl.cc | 14

[PATCH] c++: Update DECL_TLS_MODEL after processing a TLS variable

2025-08-01 Thread H.J. Lu
(tsubst_decl): Call set_decl_tls_model after processing a variable. gcc/testsuite/ PR c++/107393 * g++.dg/tls/pr107393-1.C: New test. * g++.dg/tls/pr107393-2.C: Likewise. Signed-off-by: H.J. Lu --- gcc/cp/decl.cc| 37

[PATCH] c: Update DECL_TLS_MODEL after processing a TLS variable

2025-08-01 Thread H.J. Lu
model after calling grokdeclarator if the default TLS access model is stronger. gcc/testsuite/ PR c/107419 * c-c++-common/tls-attr-common.c: New test. * c-c++-common/tls-attr-le-pic.c: Likewise. * c-c++-common/tls-attr-le-pie.c: Likewise. Signed-off-by: H.J

[PATCH] doc: Update tls_model attribute

2025-08-01 Thread H.J. Lu
model. Update tls_model attribute documentation to reflect it. PR middle-end/121352 * doc/extend.texi: Update the tls_model attribute. Signed-off-by: H.J. Lu --- gcc/doc/extend.texi | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/gcc/doc/extend.texi b/gcc

Re: [PATCH 3/4] i386: Fix incorrect handling of simultaneous regparm and thiscall use

2025-07-31 Thread H.J. Lu
On Thu, Jul 24, 2025 at 8:43 AM Artemiy Granat wrote: > > gcc/ChangeLog: > > * config/i386/i386-options.cc (ix86_handle_cconv_attribute): > Handle simultaneous use of regparm and thiscall attributes in > case when regparm is set before thiscall. > > gcc/testsuite/ChangeLog:

Re: [PATCH] c: Use the default TLS mode if it is more optimized

2025-07-31 Thread H.J. Lu
On Thu, Jul 31, 2025 at 8:11 AM Alexander Monakov wrote: > > > On Thu, 31 Jul 2025, H.J. Lu wrote: > > > > We have a few pre-existing tests that verify that the attribute is > > > honored, > > > such as those added by commit 1d561e1851c4. Do they

Re: [PATCH] c: Use the default TLS mode if it is more optimized

2025-07-31 Thread H.J. Lu
On Thu, Jul 31, 2025 at 6:58 AM Alexander Monakov wrote: > > > On Wed, 30 Jul 2025, H.J. Lu wrote: > > > According to the TLS spec, linker can optimize the TLS access by > > overriding the TLS access model. Do the same in compiler by using > > the default TLS mod

Re: [PATCH] c: Use the default TLS mode if it is more optimized

2025-07-30 Thread H.J. Lu
On Wed, Jul 30, 2025 at 8:24 PM Andrew Pinski wrote: > > On Wed, Jul 30, 2025 at 5:33 PM H.J. Lu wrote: > > > > According to the TLS spec, linker can optimize the TLS access by > > overriding the TLS access model. Do the same in compiler by using > > the default TL

[PATCH] c: Use the default TLS mode if it is more optimized

2025-07-30 Thread H.J. Lu
/c-family/ PR c/121318 * c-attribs.cc (handle_tls_model_attribute): Use the default TLS mode if it is more optimized. gcc/testsuite/ PR c/121318 * gcc.dg/tls/pr121318.c: New test. Signed-off-by: H.J. Lu --- gcc/c-family/c-attribs.cc | 4

Re: [PATCH] x86: Transform to "pushq $-1; popq reg" for -Oz

2025-07-30 Thread H.J. Lu
On Tue, Jul 29, 2025 at 11:37 PM Hongtao Liu wrote: > > On Wed, Jul 30, 2025 at 11:45 AM H.J. Lu wrote: > > > > commit 4c80062d7b8c272e2e193b8074a8440dbb4fe588 > > Author: H.J. Lu > > Date: Sun May 25 07:40:29 2025 +0800 > > > > x86: Enable *

[PATCH] x86: Transform to "pushq $-1; popq reg" for -Oz

2025-07-29 Thread H.J. Lu
commit 4c80062d7b8c272e2e193b8074a8440dbb4fe588 Author: H.J. Lu Date: Sun May 25 07:40:29 2025 +0800 x86: Enable *mov_(and|or) only for -Oz disabled transformation from "movq $-1,reg" to "pushq $-1; popq reg" for -Oz. But for legacy integer registers, the former is 4

Re: [PATCH v3] gcc-16/changes.html: Add --enable-x86-64-mfentry

2025-07-29 Thread H.J. Lu
On Tue, Jul 22, 2025 at 11:13 PM Gerald Pfeifer wrote: > > On Tue, 15 Jul 2025, H.J. Lu wrote: > >> This feels a bit complex to parse. How about something like > >> > >> + The new --enable-x86-64-mfentry configure option > >> + makes -mfentry use __

[PATCH] x86: Pass -mno-80387 to compile pr121208-1(a|b).c

2025-07-29 Thread H.J. Lu
On Mon, Jul 28, 2025 at 11:40 PM Jakub Jelinek wrote: > > On Sat, Jul 26, 2025 at 10:37:35AM -0700, H.J. Lu wrote: > > __tls_get_addr doesn't preserve vector registers. When a function > > with no_caller_saved_registers attribute calls __tls_get_addr, YMM > > and ZM

Re: [PATCH v3] x86-64: Remove redundant TLS calls

2025-07-28 Thread H.J. Lu
On Mon, Jul 28, 2025 at 01:53:08PM -0700, H.J. Lu wrote: > On Mon, Jul 28, 2025 at 04:51:24PM +0800, Hongtao Liu wrote: > > On Wed, Jul 23, 2025 at 8:07 AM H.J. Lu wrote: > > > > > > For TLS calls: > > > > > > 1. UNSPEC_TLS_GD: > >

[PATCH v4] x86-64: Remove redundant TLS calls

2025-07-28 Thread H.J. Lu
arget/i386/pr81501-9b.c: Likewise. * gcc.target/i386/pr81501-10a.c: Likewise. * gcc.target/i386/pr81501-10b.c: Likewise. Signed-off-by: H.J. Lu --- gcc/config/i386/i386-features.cc| 834 gcc/config/i386/i386-passes.def |

Re: [PATCH v3] x86-64: Remove redundant TLS calls

2025-07-28 Thread H.J. Lu
On Mon, Jul 28, 2025 at 04:51:24PM +0800, Hongtao Liu wrote: > On Wed, Jul 23, 2025 at 8:07 AM H.J. Lu wrote: > > > > For TLS calls: > > > > 1. UNSPEC_TLS_GD: > > > > (parallel [ > > (set (reg:DI 0 ax) > >

Re: [PATCH v4] x86: Enable *mov_(and|or) only for -Oz

2025-07-28 Thread H.J. Lu
On Thu, Jun 19, 2025 at 2:55 AM Roger Sayle wrote: > > > Looks good to me. Sorry for any inconvenience. > Cheers, > Roger > > > -Original Message- > > From: Hongtao Liu > > Sent: 19 June 2025 08:01 > > To: H.J. Lu > > Cc: GCC Patch

Re: [PATCH v2] x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers

2025-07-28 Thread H.J. Lu
On Mon, Jul 28, 2025 at 1:29 AM Uros Bizjak wrote: > > On Sat, Jul 26, 2025 at 7:37 PM H.J. Lu wrote: > > > > __tls_get_addr doesn't preserve vector registers. When a function > > with no_caller_saved_registers attribute calls __tls_get_addr, YMM > > and ZMM

[PATCH v2] x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers

2025-07-26 Thread H.J. Lu
ewise. * gcc.target/i386/pr121208-2a.c: Likewise. * gcc.target/i386/pr121208-2b.c: Likewise. * gcc.target/i386/pr121208-3a.c: Likewise. * gcc.target/i386/pr121208-3b.c: Likewise. Signed-off-by: H.J. Lu --- gcc/config/i386/i386.cc | 22 +

Re: [PATCH] x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers

2025-07-25 Thread H.J. Lu
On Fri, Jul 25, 2025 at 1:05 AM Uros Bizjak wrote: > > On Thu, Jul 24, 2025 at 9:30 PM H.J. Lu wrote: > > > > On x86-64, __tls_get_addr is a normal function which doesn't preserve > > vector registers. On i386, ___tls_get_addr preserve vector registers > >

[PATCH] x86: Disallow -mtls-dialect=gnu with no_caller_saved_registers

2025-07-24 Thread H.J. Lu
21208-3b.c: Likewise. Signed-off-by: H.J. Lu --- gcc/config/i386/i386.cc | 38 + gcc/testsuite/gcc.target/i386/pr121208-1a.c | 15 gcc/testsuite/gcc.target/i386/pr121208-1b.c | 4 +++ gcc/testsuite/gcc.target/i386/pr121208-2a.c | 17 +

Re: [PATCH v2] x86-64: Remove redundant TLS calls

2025-07-22 Thread H.J. Lu
On Mon, Jul 21, 2025 at 8:09 PM Hongtao Liu wrote: > > On Tue, Jul 22, 2025 at 4:47 AM H.J. Lu wrote: > > > > For TLS calls: > > > > 1. UNSPEC_TLS_GD: > > > > (parallel [ > > (set (reg:DI 0 ax) > >

[PATCH v3] x86-64: Remove redundant TLS calls

2025-07-22 Thread H.J. Lu
target/i386/pr81501-6a.c: Likewise. * gcc.target/i386/pr81501-6b.c: Likewise. * gcc.target/i386/pr81501-7.c: Likewise. * gcc.target/i386/pr81501-8a.c: Likewise. * gcc.target/i386/pr81501-8b.c: Likewise. * gcc.target/i386/pr81501-9a.c: Likewise. * gcc.ta

Re: [PATCH v5 0/3] Hard Register Constraints

2025-07-21 Thread H.J. Lu
On Mon, Jul 21, 2025 at 4:16 AM Stefan Schulze Frielinghaus wrote: > > On Sat, Jul 19, 2025 at 08:26:22AM -0600, Jeff Law wrote: > > > > > > On 7/17/25 2:24 AM, Stefan Schulze Frielinghaus wrote: > > > On Wed, Jul 09, 2025 at 03:48:43PM +0200, Stefan Schulze Frielinghaus > > > wrote: > > > > This

Re: [PATCH] x86-64: Remove redundant TLS calls

2025-07-21 Thread H.J. Lu
On Sun, Jul 20, 2025 at 7:41 PM Hongtao Liu wrote: > > On Thu, Jul 17, 2025 at 11:22 PM H.J. Lu wrote: > > > > For TLS calls: > > > > 1. UNSPEC_TLS_GD: > > > > (parallel [ > > (set (reg:DI 0 ax) > >

[PATCH v2] x86-64: Remove redundant TLS calls

2025-07-21 Thread H.J. Lu
* gcc.target/i386/pr81501-6a.c: Likewise. * gcc.target/i386/pr81501-6b.c: Likewise. * gcc.target/i386/pr81501-7.c: Likewise. * gcc.target/i386/pr81501-8a.c: Likewise. * gcc.target/i386/pr81501-8b.c: Likewise. * gcc.target/i386/pr81501-9a.c: Likewise.

[COMMITTED, GCC-15, PATCH] libstdc++: Update some baseline_symbols.txt (x32)

2025-07-19 Thread H.J. Lu
On Tue, Jul 8, 2025 at 6:46 PM H.J. Lu wrote: > > * config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: > Updated. > > > -- > H.J. I am backporting it to GCC 15 branch. -- H.J. From 88faa4c2d3be236059feabbcc6fe390961a8764b Mon Sep 17 00:00:00 2001 From: "H.J.

Re: [PATCH 1/2] libstdc++: Ensure std::hash<__int128> is defined [PR96710]

2025-07-17 Thread H.J. Lu
On Mon, Jul 14, 2025 at 1:34 PM Jonathan Wakely wrote: > > This is a follow-up to r16-2190-g4faa42ac0dee2c which ensures that > std::hash is always enabled for signed and unsigned __int128. The > standard requires std::hash to be enabled for all arithmetic types. > > libstdc++-v3/ChangeLog: > >

[PATCH] x86-64: Remove redundant TLS calls

2025-07-17 Thread H.J. Lu
.target/i386/pr81501-6b.c: Likewise. * gcc.target/i386/pr81501-7.c: Likewise. * gcc.target/i386/pr81501-8a.c: Likewise. * gcc.target/i386/pr81501-8b.c: Likewise. * gcc.target/i386/pr81501-9a.c: Likewise. * gcc.target/i386/pr81501-9b.c: Likewise. Signed-off-by: H.J. Lu ---

[PATCH] x86: Don't change mode for XOR in ix86_expand_ternlog

2025-07-16 Thread H.J. Lu
There is no need to change mode for XOR in ix86_expand_ternlog now. Whatever reasons for it in the first place no longer exist. Tested on x86-64 with -m32. There are no regressions. * config/i386/i386.cc (ix86_expand_ternlog): Don't change mode for XOR. Signed-off-by: H.

[PATCH v2] x86: Warn -pg without -mfentry only on glibc targets

2025-07-16 Thread H.J. Lu
-additional-options): Add -mfentry only on gnu targets. * gcc.target/i386/pr119386-2.c (dg-additional-options): Likewise. Signed-off-by: H.J. Lu --- gcc/config/i386/i386-options.cc| 4 gcc/testsuite/gcc.dg/20021014-1.c | 2 +- gcc/testsuite/gcc.dg/aru-2.c

[PATCH v2] x86: Convert MMX integer loads from constant vector pool

2025-07-16 Thread H.J. Lu
On Mon, Jul 14, 2025 at 11:03 PM Uros Bizjak wrote: > > On Tue, Jul 15, 2025 at 3:43 AM H.J. Lu wrote: > > > > For MMX 16-bit, 32-bit and 64-bit constant vector loads from constant > > vector pool: > > > > (insn 6 2 7 2 (set (reg:V1SI 5 di) > >

[PATCH v3] gcc-16/changes.html: Add --enable-x86-64-mfentry

2025-07-15 Thread H.J. Lu
ops what feels like an extra "by default". -mfentry is the option to enable __fentry__. How about this v3 patch? > If the latter is wrong, add "by default" before "for profiling on x86-64". > > > What do you think? (If you like it, go ahead and push thi

[PATCH] Add -mfentry -fno-pic only on gnu/x86 targets

2025-07-15 Thread H.J. Lu
/pr113122-3.c(dg-additional-options): Likewise. * gcc.target/i386/pr119386-1.c (dg-additional-options): Add -mfentry only on gnu targets. * gcc.target/i386/pr119386-2.c (dg-additional-options): Likewise. Signed-off-by: H.J. Lu --- gcc/testsuite/gcc.dg/20021014-1.c

[PATCH] x86: Convert MMX integer loads from constant vector pool

2025-07-14 Thread H.J. Lu
L (const_vector:V1SI [ (const_int -1 [0x]) ]) (nil))) we can convert it to (insn 12 2 7 2 (set (reg:SI 5 di) (const_int -1 [0x])) "pr121062-2.c":10:3 100 {*movsi_int ernal} (nil)) Co-Developed-by: H.J. Lu gcc/ PR ta

[PATCH v2] gcc-16/changes.html: Add --enable-x86-64-mfentry

2025-07-14 Thread H.J. Lu
On Mon, Jul 14, 2025 at 9:44 PM Uros Bizjak wrote: > > On Mon, Jul 14, 2025 at 2:34 PM H.J. Lu wrote: > > > > OK to install? > > This should at least say that the new option is enabled by default > with glibc targets. > > Uros. Like this? -- H.J. From c3f9d5d

[PATCH] gcc-16/changes.html: Add --enable-x86-64-mfentry

2025-07-14 Thread H.J. Lu
OK to install? -- H.J. From ba8825b15df0172f1c95fd46526fb734ec7a6646 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Mon, 14 Jul 2025 20:32:11 +0800 Subject: [PATCH] gcc-16/changes.html: Add --enable-x86-64-mfentry Signed-off-by: H.J. Lu --- htdocs/gcc-16/changes.html | 6

[PATCH v5] x86: Check all 0s/1s vectors with standard_sse_constant_

2025-07-14 Thread H.J. Lu
On Mon, Jul 14, 2025 at 4:06 PM Uros Bizjak wrote: > > On Mon, Jul 14, 2025 at 9:37 AM H.J. Lu wrote: > > > > On Mon, Jul 14, 2025 at 3:11 PM Uros Bizjak wrote: > > > > > > On Mon, Jul 14, 2025 at 5:32 AM Uros Bizjak wrote: > > > > > &

Re: [PATCH v3] x86: Update MMX moves to support all 1s vectors

2025-07-14 Thread H.J. Lu
On Mon, Jul 14, 2025 at 3:40 PM H.J. Lu wrote: > > On Mon, Jul 14, 2025 at 3:34 PM Uros Bizjak wrote: > > > > On Mon, Jul 14, 2025 at 9:11 AM Uros Bizjak wrote: > > > > > > On Mon, Jul 14, 2025 at 5:32 AM Uros Bizjak wrote: > > > > > &

Re: [PATCH v3] x86: Update MMX moves to support all 1s vectors

2025-07-14 Thread H.J. Lu
On Mon, Jul 14, 2025 at 3:34 PM Uros Bizjak wrote: > > On Mon, Jul 14, 2025 at 9:11 AM Uros Bizjak wrote: > > > > On Mon, Jul 14, 2025 at 5:32 AM Uros Bizjak wrote: > > > > > > On Mon, Jul 14, 2025 at 2:14 AM H.J. Lu wrote: > > > > > >

Re: [PATCH v3] x86: Update MMX moves to support all 1s vectors

2025-07-14 Thread H.J. Lu
On Mon, Jul 14, 2025 at 3:11 PM Uros Bizjak wrote: > > On Mon, Jul 14, 2025 at 5:32 AM Uros Bizjak wrote: > > > > On Mon, Jul 14, 2025 at 2:14 AM H.J. Lu wrote: > > > > > > On Sat, Jul 12, 2025 at 7:51 PM Uros Bizjak wrote: > > > > > &

[PATCH v3] x86: Update MMX moves to support all 1s vectors

2025-07-13 Thread H.J. Lu
On Sat, Jul 12, 2025 at 7:51 PM Uros Bizjak wrote: > > On Sat, Jul 12, 2025 at 1:41 PM H.J. Lu wrote: > > > > On Sat, Jul 12, 2025 at 5:58 PM Uros Bizjak wrote: > > > > > > On Sat, Jul 12, 2025 at 11:52 AM H.J. Lu wrote: > > > > > >

Re: [PATCH] x86-64: Add RDI clobber to tls_local_dynamic_64 patterns

2025-07-12 Thread H.J. Lu
On Thu, Jul 3, 2025 at 3:14 PM H.J. Lu wrote: > > On Thu, Jul 3, 2025 at 2:39 PM Uros Bizjak wrote: > > > > On Thu, Jul 3, 2025 at 6:32 AM H.J. Lu wrote: > > > > > > *tls_local_dynamic_64_ uses RDI as the __tls_get_addr argument. > > > Add RDI clobbe

Re: [PATCH] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

2025-07-12 Thread H.J. Lu
On Wed, Jul 2, 2025 at 11:37 PM Uros Bizjak wrote: > > On Wed, Jul 2, 2025 at 2:43 PM H.J. Lu wrote: > > > > *tls_global_dynamic_64_ uses RDI as the __tls_get_addr argument. > > Add RDI clobber to tls_global_dynamic_64 patterns to show it. > > > > PR tar

[PATCH v2] x86-64: Add --enable-x86-64-mfentry

2025-07-12 Thread H.J. Lu
test. * gcc.target/i386/pr120881-1b.c: Likewise. * gcc.target/i386/pr120881-1c.c: Likewise. * gcc.target/i386/pr120881-1d.c: Likewise. * gcc.target/i386/pr120881-2a.c: Likewise. * gcc.target/i386/pr120881-2b.c: Likewise. * gcc.target/i386/pr82699-1.c: Add additional -mfentry. * lib/target-supports.exp (check_

Re: [PATCH v2] x86: Update MMXMODE:*mov_internal to support all 1s vectors

2025-07-12 Thread H.J. Lu
On Sat, Jul 12, 2025 at 5:58 PM Uros Bizjak wrote: > > On Sat, Jul 12, 2025 at 11:52 AM H.J. Lu wrote: > > > > On Sat, Jul 12, 2025 at 5:03 PM Uros Bizjak wrote: > > > > > > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote: > > > > > &g

Re: [PATCH v2] x86: Update MMXMODE:*mov_internal to support all 1s vectors

2025-07-12 Thread H.J. Lu
On Sat, Jul 12, 2025 at 5:03 PM Uros Bizjak wrote: > > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote: > > > > commit 77473a27bae04da99d6979d43e7bd0a8106f4557 > > Author: H.J. Lu > > Date: Thu Jun 26 06:08:51 2025 +0800 > > > > x86: Also handle all

Re: Rewrite assign_discriminators pass

2025-07-11 Thread H.J. Lu
On Fri, Jul 11, 2025 at 7:32 PM Jan Hubicka wrote: > > > So with this the discriminator we assign might depend on whether > > we have debug stmts or not. We output them only to debug info, so > > it should in principle not cause compare-debug issues, right? And > > we don't use discriminators to

Re: [PATCH v2] x86: Update MMXMODE:*mov_internal to support all 1s vectors

2025-07-11 Thread H.J. Lu
On Fri, Jul 11, 2025 at 4:23 PM Uros Bizjak wrote: > > On Fri, Jul 11, 2025 at 9:57 AM Uros Bizjak wrote: > > > > On Fri, Jul 11, 2025 at 6:05 AM H.J. Lu wrote: > > > > > gcc/ > > > > > > PR target/121015 > > > * config/i386/cons

[PATCH v2] x86: Update MMXMODE:*mov_internal to support all 1s vectors

2025-07-10 Thread H.J. Lu
commit 77473a27bae04da99d6979d43e7bd0a8106f4557 Author: H.J. Lu Date: Thu Jun 26 06:08:51 2025 +0800 x86: Also handle all 1s float vector constant replaces (insn 29 28 30 5 (set (reg:V2SF 107) (mem/u/c:V2SF (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S8 A

Re: [PATCH] x86: Update "*mov_internal" in mmx.md to handle all 1s vectors

2025-07-10 Thread H.J. Lu
On Thu, Jul 10, 2025 at 9:44 PM Uros Bizjak wrote: > > On Thu, Jul 10, 2025 at 2:31 PM Uros Bizjak wrote: > > > > On Thu, Jul 10, 2025 at 1:57 PM H.J. Lu wrote: > > > > > > commit 77473a27bae04da99d6979d43e7bd0a8106f4557 > > > Author: H.J. Lu

[PATCH] x86: Update "*mov_internal" in mmx.md to handle all 1s vectors

2025-07-10 Thread H.J. Lu
commit 77473a27bae04da99d6979d43e7bd0a8106f4557 Author: H.J. Lu Date: Thu Jun 26 06:08:51 2025 +0800 x86: Also handle all 1s float vector constant replaces (insn 29 28 30 5 (set (reg:V2SF 107) (mem/u/c:V2SF (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S8 A

[COMMITTED, PATCH] libstdc++: Update some baseline_symbols.txt (x32)

2025-07-08 Thread H.J. Lu
* config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt: Updated. -- H.J. From 98d20df2accfa045f1ad694b0b0d94855d7a75f3 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 9 Jul 2025 09:43:52 +0800 Subject: [PATCH] libstdc++: Update some baseline_symbols.txt (x32) * confi

Re: [PATCH] x86: Keep non all 0s/1s redundant vector loads on AMD znverN

2025-07-08 Thread H.J. Lu
On Tue, Jul 8, 2025 at 7:26 PM Richard Biener wrote: > > On Tue, Jul 8, 2025 at 12:48 PM H.J. Lu wrote: > > > > aba3b9d3a48a0703fd565f7c5f0caf604f59970b is the first bad commit > > commit aba3b9d3a48a0703fd565f7c5f0caf604f59970b > > Author: H.J. Lu > > D

[PATCH] x86: Keep non all 0s/1s redundant vector loads on AMD znverN

2025-07-08 Thread H.J. Lu
aba3b9d3a48a0703fd565f7c5f0caf604f59970b is the first bad commit commit aba3b9d3a48a0703fd565f7c5f0caf604f59970b Author: H.J. Lu Date: Fri May 9 07:17:07 2025 +0800 x86: Extend the remove_redundant_vector pass which removed non all 0s/1s redundant vector loads, caused SPEC CPU 2017 519

Re: [PATCH] testsuite: i386: Fix gcc.target/i386/memcpy-pr120683-1.c etc. on Solaris/x86

2025-07-08 Thread H.J. Lu
On Tue, Jul 8, 2025 at 6:26 PM Rainer Orth wrote: > > The new tests from > > commit 401199377c50045ede560daf3f6e8b51749c2a87 > Author: H.J. Lu > Date: Tue Jun 17 10:17:17 2025 +0800 > > x86: Improve vector_loop/unrolled_loop for memset/memcpy > > FAIL o

[PATCH] Check backend when setting DECL_ALIGN for PARM_DECL

2025-07-07 Thread H.J. Lu
On Tue, Jul 8, 2025 at 5:02 AM H.J. Lu wrote: > > On Mon, Jul 7, 2025 at 11:08 PM Jason Merrill wrote: > > > > On 7/1/25 5:36 PM, H.J. Lu wrote: > > > On Tue, Jul 1, 2025 at 9:37 PM Jason Merrill wrote: > > >> > > >> On 6/30/25 7:03 PM, H.J.

Re: [PATCH] c-family: Check backend for argument alignment on stack

2025-07-07 Thread H.J. Lu
On Mon, Jul 7, 2025 at 11:08 PM Jason Merrill wrote: > > On 7/1/25 5:36 PM, H.J. Lu wrote: > > On Tue, Jul 1, 2025 at 9:37 PM Jason Merrill wrote: > >> > >> On 6/30/25 7:03 PM, H.J. Lu wrote: > >>> On Mon, Jun 30, 2025 at 10:36 PM Jason Merrill wrote:

Re: [PATCH] check-function-bodies: Support "^[0-9]+:"

2025-07-07 Thread H.J. Lu
On Fri, Jul 4, 2025 at 5:20 PM H.J. Lu wrote: > > On Thu, Jul 3, 2025 at 2:02 PM H.J. Lu wrote: > > > > On Wed, Jul 2, 2025 at 9:12 AM H.J. Lu wrote: > > > > > > While working on > > > > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=1208

Re: [PATCH v2] Don't increase alignment of parameter on stack

2025-07-04 Thread H.J. Lu
On Fri, Jul 4, 2025 at 6:07 PM Richard Biener wrote: > > On Fri, Jul 4, 2025 at 10:33 AM H.J. Lu wrote: > > > > On Fri, Jul 4, 2025 at 4:28 PM Richard Biener > > wrote: > > > > > > On Fri, Jul 4, 2025 at 10:21 AM H.J. Lu wrote: > > > >

Re: [PATCH] check-function-bodies: Support "^[0-9]+:"

2025-07-04 Thread H.J. Lu
On Thu, Jul 3, 2025 at 2:02 PM H.J. Lu wrote: > > On Wed, Jul 2, 2025 at 9:12 AM H.J. Lu wrote: > > > > While working on > > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120881 > > > > I tried to use check-function-bodies to verify that > >

Re: [PATCH v2] Don't increase alignment of parameter on stack

2025-07-04 Thread H.J. Lu
On Fri, Jul 4, 2025 at 4:28 PM Richard Biener wrote: > > On Fri, Jul 4, 2025 at 10:21 AM H.J. Lu wrote: > > > > On Fri, Jul 4, 2025 at 4:10 PM H.J. Lu wrote: > > > > > > On Fri, Jul 4, 2025 at 4:09 PM H.J. Lu wrote: > > > > > > > >

Re: [PATCH v2] Don't increase alignment of parameter on stack

2025-07-04 Thread H.J. Lu
On Fri, Jul 4, 2025 at 4:22 PM Richard Biener wrote: > > On Fri, Jul 4, 2025 at 10:11 AM H.J. Lu wrote: > > > > On Fri, Jul 4, 2025 at 4:09 PM H.J. Lu wrote: > > > > > > On Fri, Jul 4, 2025 at 4:02 PM Richard Biener > > > wrote: > > > &

Re: [PATCH v2] Don't increase alignment of parameter on stack

2025-07-04 Thread H.J. Lu
On Fri, Jul 4, 2025 at 4:10 PM H.J. Lu wrote: > > On Fri, Jul 4, 2025 at 4:09 PM H.J. Lu wrote: > > > > On Fri, Jul 4, 2025 at 4:02 PM Richard Biener > > wrote: > > > > > > > /* If we can't trust the parm stack slot to be aligned enough f

Re: [PATCH v2] Don't increase alignment of parameter on stack

2025-07-04 Thread H.J. Lu
On Fri, Jul 4, 2025 at 4:09 PM H.J. Lu wrote: > > On Fri, Jul 4, 2025 at 4:02 PM Richard Biener > wrote: > > > > On Fri, Jul 4, 2025 at 9:46 AM H.J. Lu wrote: > > > > > > On Fri, Jul 4, 2025 at 3:42 PM Richard Biener > > > wrote: > > >

Re: [PATCH v2] Don't increase alignment of parameter on stack

2025-07-04 Thread H.J. Lu
On Fri, Jul 4, 2025 at 4:02 PM Richard Biener wrote: > > On Fri, Jul 4, 2025 at 9:46 AM H.J. Lu wrote: > > > > On Fri, Jul 4, 2025 at 3:42 PM Richard Biener > > wrote: > > > > > > On Fri, Jul 4, 2025 at 9:33 AM H.J. Lu wrote: > > > > &g

Re: [PATCH v2] Don't increase alignment of parameter on stack

2025-07-04 Thread H.J. Lu
On Fri, Jul 4, 2025 at 3:42 PM Richard Biener wrote: > > On Fri, Jul 4, 2025 at 9:33 AM H.J. Lu wrote: > > > > On Fri, Jul 4, 2025 at 2:37 PM Richard Sandiford > > wrote: > > > > > > "H.J. Lu" writes: > > > >

[PATCH v2] Don't increase alignment of parameter on stack

2025-07-04 Thread H.J. Lu
On Fri, Jul 4, 2025 at 2:37 PM Richard Sandiford wrote: > > "H.J. Lu" writes: > > On Thu, Jul 3, 2025 at 11:02 PM Richard Sandiford > > wrote: > >> > >> "H.J. Lu" writes: > >> > Since a backend may ignore user type alignment

Re: [PATCH] Update alignment for argument on stack

2025-07-03 Thread H.J. Lu
On Thu, Jul 3, 2025 at 11:02 PM Richard Sandiford wrote: > > "H.J. Lu" writes: > > Since a backend may ignore user type alignment for arguments passed on > > stack, update alignment for arguments passed on stack when copying MEM's > > memory attributes

Re: [PATCH] x86: Emit label only for __mcount_loc section

2025-07-03 Thread H.J. Lu
On Thu, Jul 3, 2025 at 6:07 PM Uros Bizjak wrote: > > On Thu, Jul 3, 2025 at 11:54 AM H.J. Lu wrote: > > > > commit ecc81e33123d7ac9c11742161e128858d844b99d (HEAD) > > Author: Andi Kleen > > Date: Fri Sep 26 04:06:40 2014 + > > > > Add

[PATCH] x86-64: Remove redundant TLS calls

2025-07-03 Thread H.J. Lu
* gcc.target/i386/pr81501-7.c: Likewise. * gcc.target/i386/pr81501-8a.c: Likewise. * gcc.target/i386/pr81501-8b.c: Likewise. Signed-off-by: H.J. Lu --- gcc/config/i386/i386-features.cc | 679 +++-- gcc/config/i386/i386-passes.def|

[PATCH] x86-64: Add --enable-x86-64-mfentry

2025-07-03 Thread H.J. Lu
s.exp (check_effective_target_fentry): New. OK for master? Thanks. -- H.J. From 99d64e9355dfbb8e07582c62589530e6ad0257db Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 2 Jul 2025 08:58:23 +0800 Subject: [PATCH] x86-64: Add --enable-x86-64-mfentry When profiling is enabled with shrink wrapping, the

[PATCH] x86: Emit label only for __mcount_loc section

2025-07-03 Thread H.J. Lu
386/pr93492-3.c: Updated. * gcc.target/i386/pr93492-5.c: Likewise. OK for master? Thanks. -- H.J. From dee88812fc0ca372107224fb3460e133efe8822d Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 3 Jul 2025 10:13:48 +0800 Subject: [PATCH] x86: Emit label only for __m

Re: [PATCH] x86-64: Add RDI clobber to tls_local_dynamic_64 patterns

2025-07-03 Thread H.J. Lu
On Thu, Jul 3, 2025 at 2:39 PM Uros Bizjak wrote: > > On Thu, Jul 3, 2025 at 6:32 AM H.J. Lu wrote: > > > > *tls_local_dynamic_64_ uses RDI as the __tls_get_addr argument. > > Add RDI clobber to tls_local_dynamic_64 patterns to show it. > > > > PR tar

Re: [PATCH] check-function-bodies: Support "^[0-9]+:"

2025-07-02 Thread H.J. Lu
On Wed, Jul 2, 2025 at 9:12 AM H.J. Lu wrote: > > While working on > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120881 > > I tried to use check-function-bodies to verify that > > 1: call mcount > > generated by "-pg" is placed at the function entry. A

[PATCH] x86-64: Add RDI clobber to tls_local_dynamic_64 patterns

2025-07-02 Thread H.J. Lu
use it to generate LEA. (@tls_local_dynamic_64_): Add a clobber. OK for master? -- H.J. From fcd3aedec394b514855a7a408fd20d394f39bbeb Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 3 Jul 2025 10:54:39 +0800 Subject: [PATCH] x86-64: Add RDI clobber to tls_local_dynamic_6

[PATCH] x86-64: Add RDI clobber to tls_global_dynamic_64 patterns

2025-07-02 Thread H.J. Lu
and use it to generate LEA. (@tls_global_dynamic_64_): Add a clobber. OK for master? Thanks. -- H.J. From fb6b52e78caf70b2e3f9939952bda0604295cfce Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Tue, 1 Jul 2025 17:17:06 +0800 Subject: [PATCH] x86-64: Add RDI clobber to tls_global_

[PATCH] check-function-bodies: Support "^[0-9]+:"

2025-07-01 Thread H.J. Lu
81 * lib/scanasm.exp (check-function-bodies): Allow "^[0-9]+:". OK for master? Thanks. -- H.J. From 42dc904c7e155eae1893152b8db46e697136 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 2 Jul 2025 08:51:47 +0800 Subject: [PATCH] check-function-bodies: Support "^[0

Re: [PATCH] c-family: Check backend for argument alignment on stack

2025-07-01 Thread H.J. Lu
On Tue, Jul 1, 2025 at 9:37 PM Jason Merrill wrote: > > On 6/30/25 7:03 PM, H.J. Lu wrote: > > On Mon, Jun 30, 2025 at 10:36 PM Jason Merrill wrote: > >> > >> On 6/28/25 7:00 AM, H.J. Lu wrote: > >>> Since a backend may ignore user type alignment

Re: [PATCH] testsuite: i386: Fix gcc.target/i386/preserve-none-1.c on Solaris/x86

2025-07-01 Thread H.J. Lu
On Tue, Jul 1, 2025 at 4:47 PM Rainer Orth wrote: > > The new gcc.target/i386/preserve-none-1.c test currently FAILs on > Solaris/x86: > > FAIL: gcc.target/i386/preserve-none-1.c scan-assembler-not movq > > It needs -fomit-frame-pointer which this patch adds. > > Tested on i386-pc-solaris2.11 and

Re: [PATCH] testsuite: i386: Fix g++.target/i386/memset-pr101366-1.C etc. on Solaris/x86

2025-07-01 Thread H.J. Lu
On Tue, Jul 1, 2025 at 4:57 PM Rainer Orth wrote: > > Several new tests from > > commit d073bb6cfc219d4b6c283a0b527ee88b42e640e0 > Author: H.J. Lu > Date: Thu Mar 18 18:43:10 2021 -0700 > > x86: Update memcpy/memset inline strategies for -mtune=generic > > FA

[PATCH] Fix "void debug (const tree_node *ptr)"

2025-06-30 Thread H.J. Lu
-type 0x7fffe982 f2a0 precision:32 pointer_to_this > (gdb) PR debug/120902 * print-tree.cc (debug with const tree_node *): Call debug_tree instead of debug. -- H.J. From 2b074fbb159feecc609e731e22bad7f4340b4456 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Tue, 1 Jul 2025 0

Re: [PATCH] c-family: Check backend for argument alignment on stack

2025-06-30 Thread H.J. Lu
On Mon, Jun 30, 2025 at 10:36 PM Jason Merrill wrote: > > On 6/28/25 7:00 AM, H.J. Lu wrote: > > Since a backend may ignore user type alignment for arguments passed on > > stack, check backend for argument alignment on stack when evaluating > > __alignof. > >

Re: [PATCH] xtensa: Remove TARGET_PROMOTE_FUNCTION_MODE

2025-06-30 Thread H.J. Lu
On Mon, Jun 23, 2025 at 5:41 AM Takayuki 'January June' Suwa wrote: > > On 2025/06/23 6:20, H.J. Lu wrote: > > On Sun, Jun 22, 2025 at 9:54 PM Max Filippov wrote: > >> > >> On Sun, Jun 22, 2025 at 5:49 AM Takayuki 'January June' Suwa > &g

Re: [PATCH V3] x86: Enable separate shrink wrapping

2025-06-30 Thread H.J. Lu
On Tue, Jun 17, 2025 at 10:33 PM Uros Bizjak wrote: > > On Tue, Jun 17, 2025 at 4:03 PM Cui, Lili wrote: > > > > From: Lili Cui > > > > Hi Uros, > > > > This is patch v3, the main changes are as follows. > > > > 1. Added a pro_epilogue_adjust_stack_add_nocc in i386.md to add memory clobber for l

Re: [PATCH] x86: Preserve frame pointer for no_callee_saved_registers attribute

2025-06-29 Thread H.J. Lu
On Mon, Jun 30, 2025 at 2:06 PM Hongtao Liu wrote: > > On Mon, Jun 30, 2025 at 11:16 AM H.J. Lu wrote: > > > > On Mon, Jun 30, 2025 at 10:37 AM Hongtao Liu wrote: > > > > > > On Sat, Jun 28, 2025 at 8:30 PM H.J. Lu wrote: > > > > > &g

[PATCH v2] x86: Preserve frame pointer for no_callee_saved_registers attribute

2025-06-29 Thread H.J. Lu
On Mon, Jun 30, 2025 at 11:17 AM H.J. Lu wrote: > > On Mon, Jun 30, 2025 at 10:41 AM Hongtao Liu wrote: > > > > On Mon, Jun 30, 2025 at 10:37 AM Hongtao Liu wrote: > > > > > > On Sat, Jun 28, 2025 at 8:30 PM H.J. Lu wrote: > > > > > &g

Re: [PATCH] x86: Preserve frame pointer for no_callee_saved_registers attribute

2025-06-29 Thread H.J. Lu
On Mon, Jun 30, 2025 at 10:41 AM Hongtao Liu wrote: > > On Mon, Jun 30, 2025 at 10:37 AM Hongtao Liu wrote: > > > > On Sat, Jun 28, 2025 at 8:30 PM H.J. Lu wrote: > > > > > > Update functions with no_callee_saved_registers/preserve_none attribute > > &g

  1   2   3   4   5   6   7   8   9   10   >