Hello Richard:
This patch addresses all the review comments.
It also fix the arm build failure.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in r
Hello Richard:
This patch addressed all review comments in version 8 of the patch.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fu
Hello Richard:
On 15/08/24 3:45 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> +static void
>> +update_change (set_info *set)
>> +{
>> + if (!set->has_any_uses ())
>> +return;
>> +
>> + auto *use = *set->all_uses ().begin ()
Hello Richard:
On 12/08/24 5:30 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> [...]
>> +static void
>> +update_change (set_info *set)
>> +{
>> + if (!set->has_any_uses ())
>> +return;
>> +
>> + auto *use = *set->all_uses
Hello Richard:
This patch addresses all the review comments.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fusion.cc.
Bootstrapped
Hello Richard:
Did you get a chance to look at the changes. Ok to install?
Thanks & Regards
Ajit
Forwarded Message
Subject: [Patch, rs6000, middle-end] v7: Add implementation for different
targets for pair mem fusion
Date: Fri, 19 Jul 2024 14:46:13 +0530
From: Ajit Aga
Hello All:
This patch improves loop_unroll_adjust by adding mem count to calculate
unroll factor.
Bootstrapped and regtested on powerpc64-linux-gnu.
Thanks & Regards
Ajit
rs6000: Improve loop_unroll_adjust
Improves loop_unroll_adjust by adding mem count to calculate
unroll factor.
2024-07-24
Hello All:
This patch improve determine_suggested_unroll_factor in finish_cost
with reduction factor of loads/stores/non_load_stores.
Return unroll factor calculated as per reduction factor
with number of loads/stores/non_load_stores (general_ops).
Bootstrapped and regtested on powerpc64-linux-g
Hello Richard:
On 18/07/24 4:44 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> [...]
>>>> +// Set subreg for OO mode pair to generate sequential registers given
>>>> +// insn_info pairs I1, I2 and LOAD_P is true iff load insn and false
&
Hello Richard:
All comments are addressed.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fusion.cc.
Bootstrapped and regtested on p
Hello Richard:
On 18/07/24 2:04 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 18/07/24 1:17 am, Richard Sandiford wrote:
>> Ajit Agarwal writes:
>>> Hello All:
>>>
>>> This version of patch relaxes store fusion for more use cases.
>>>
>&g
Hello Richard:
On 18/07/24 1:17 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello All:
>>
>> This version of patch relaxes store fusion for more use cases.
>>
>> Common infrastructure using generic code for pair mem fusion of different
>> tar
Ping^1. Ok to install?
Thanks & Regards
Ajit
Forwarded Message
Subject: [PING^0][Patch, rs6000, middle-end] v6: Add implementation for
different targets for pair mem fusion
Date: Mon, 8 Jul 2024 07:55:19 +0530
From: Ajit Agarwal
To: Alex Coplan , Richard Sandi
Hello Richard:
On 13/07/24 8:16 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 12/07/24 6:20 pm, Richard Biener wrote:
>> On Fri, Jul 12, 2024 at 12:09 PM Ajit Agarwal wrote:
>>>
>>> Hello Richard:
>>>
>>> On 11/07/24 2:21 pm, Richard Biene
Hello Richard:
On 12/07/24 6:20 pm, Richard Biener wrote:
> On Fri, Jul 12, 2024 at 12:09 PM Ajit Agarwal wrote:
>>
>> Hello Richard:
>>
>> On 11/07/24 2:21 pm, Richard Biener wrote:
>>> On Thu, Jul 11, 2024 at 10:30 AM Ajit Agarwal
>>> wrote:
&g
Hello Richard:
On 12/07/24 6:20 pm, Richard Biener wrote:
> On Fri, Jul 12, 2024 at 12:09 PM Ajit Agarwal wrote:
>>
>> Hello Richard:
>>
>> On 11/07/24 2:21 pm, Richard Biener wrote:
>>> On Thu, Jul 11, 2024 at 10:30 AM Ajit Agarwal
>>> wrote:
&g
Hello Richard:
On 11/07/24 2:21 pm, Richard Biener wrote:
> On Thu, Jul 11, 2024 at 10:30 AM Ajit Agarwal wrote:
>>
>> Hello All:
>>
>> Unroll factor is determined with max distance across loop iterations.
>> The logic for determining the loop unroll factor is b
Hello All:
Unroll factor is determined with max distance across loop iterations.
The logic for determining the loop unroll factor is based on
data dependency across loop iterations.
The max distance across loop iterations is the unrolling factor
that helps in predictive commoning.
Bootstrapped a
Ping ! Please let me know OK for trunk.
Thanks & Regards
Ajit
Forwarded Message
Subject: [Patch, rs6000, middle-end] v6: Add implementation for different
targets for pair mem fusion
Date: Tue, 2 Jul 2024 14:15:02 +0530
From: Ajit Agarwal
To: Alex Coplan , Richard Sandi
Hello Richard:
On 03/07/24 2:18 pm, Richard Biener wrote:
> On Sun, Jun 30, 2024 at 4:15 AM Ajit Agarwal wrote:
>>
>> Hello All:
>>
>> This patch determines Unroll factor based on loop register pressure.
>>
>> Unroll factor is quotient of max of avai
Hello Richard:
Based on your feedback I have changed the logic of determining
unroll factor for loops.
Unroll factor is calculated based on available registers and regs
needed inside the loops.
Unroll factor is quotient of max of available registers in loop
over regs needed inside the loops.
Co
Hello All:
This version of patch relaxes store fusion for more use cases.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fusion.cc.
Hello All:
This patch determines unroll factor based on loop register pressure.
Unroll factor is quotient of max of available registers in loop
by number of liveness.
If available registers increases unroll factor increases.
Wherein unroll factor decreases if number of liveness increases.
Loop
Hello All:
This patch determines Unroll factor based on loop register pressure.
Unroll factor is quotient of max of available registers in loop
by number of liveness.
If available registers increases unroll factor increases.
Wherein unroll factor decreases if number of liveness increases.
Loop
Hello All:
This patch addressed cleanup of the code and fix linaro failures.
All comments are addressed.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are
Hello Richard:
On 19/06/24 3:26 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 19/06/24 2:52 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> On 19/06/24 2:40 pm, Richard Sandiford wrote:
>>>>> Ajit Agarwal writes:
>>&g
Hello Richard:
All review comments are incorporated.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fusion.cc.
Bootstrapped and regt
Hello Richard:
On 19/06/24 2:52 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 19/06/24 2:40 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>>
>>>> On 19/06/24 1:54 pm, Richard Sandiford wrote:
>>
Hello Richard:
On 19/06/24 2:40 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 19/06/24 1:54 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>> What happens if you leave the assert alone? When does it fir
Hello Richard:
On 19/06/24 1:54 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>> What happens if you leave the assert alone? When does it fire? Is it
>>> still for uses in debug insns? If so, it's the fusion pass's responsibility
>>> to update
Hello Richard:
On 19/06/24 12:52 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 19/06/24 2:01 am, Richard Sandiford wrote:
>> Ajit Agarwal writes:
>>> Hello Richard:
>>>
>>> On 14/06/24 4:26 pm, Richard Sandiford wrote:
>>>> Ajit Agarwal
Hello Richard:
On 19/06/24 2:01 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 14/06/24 4:26 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>>
>>>> All comments
Hello Richard:
On 14/06/24 4:26 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> All comments are addressed.
>
> I don't think this addresses the following comments from the previous
> reviews:
>
> (1) It is not corre
Hello Richard:
All comments are addressed.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fusion.cc.
Bootstrapped and regtested on p
Hello Richard:
On 12/06/24 3:02 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 11/06/24 9:41 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>>> Thanks a lot. Can I know what should we be doing with neg (f
Hello Richard:
On 12/06/24 3:02 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 11/06/24 9:41 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>>> Thanks a lot. Can I know what should we be doing with neg (f
Hello Richard:
On 11/06/24 9:41 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>>> Thanks a lot. Can I know what should we be doing with neg (fma)
>>>> correctness failures with load fusion.
>>>
>>> I think it would involve:
>>>
&g
Hello Richard:
On 11/06/24 8:59 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 11/06/24 7:07 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>> On 11/06/24 6:12 pm, Richard Sandiford wrote:
>>>>> Aji
Hello Richard:
On 11/06/24 7:07 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>> On 11/06/24 6:12 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>>
>>>> On 11/06/24 5:15 pm, Richa
Hello Richard:
On 11/06/24 6:12 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 11/06/24 5:15 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello Richard:
>>>> On 11/06/24 4:56 pm, Ajit Agarwal wr
Hello Richard:
On 11/06/24 4:56 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 11/06/24 4:36 pm, Richard Sandiford wrote:
>> Ajit Agarwal writes:
>>>>>>> After LRA reload:
>>>>>>>
>>>>>>> (insn 9
Hello Richard:
On 11/06/24 4:56 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 11/06/24 4:36 pm, Richard Sandiford wrote:
>> Ajit Agarwal writes:
>>>>>>> After LRA reload:
>>>>>>>
>>>>>>> (insn 9
Hello Richard:
On 11/06/24 5:15 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>> On 11/06/24 4:56 pm, Ajit Agarwal wrote:
>>> Hello Richard:
>>>
>>> On 11/06/24 4:36 pm, Richard Sandiford wrote:
>>>
Hello Richard:
On 11/06/24 4:36 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>>>>> After LRA reload:
>>>>>>
>>>>>> (insn 9299 2472 2412 187 (set (reg:V2DF 51 19 [orig:240 vect__302.545 ]
>>>>>> [240])
Hello Richard:
On 10/06/24 3:58 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 10/06/24 3:20 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> On 10/06/24 2:52 pm, Richard Sandiford wrote:
>>>>> Ajit Agarwal writes:
>&g
Hello Richard:
On 10/06/24 3:20 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 10/06/24 2:52 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> On 10/06/24 2:12 pm, Richard S
Hello Richard:
On 10/06/24 3:20 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 10/06/24 2:52 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> On 10/06/24 2:12 pm, Richard S
Hello Richard:
On 10/06/24 2:52 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 10/06/24 2:12 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>>>>>>>>> +
>>>>>>>>>>>> +rtx set =
Hello Richard:
On 10/06/24 2:12 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>>>>>>>>> +
>>>>>>>>>> + rtx set = single_set (insn);
>>>>>>>>>> + if (set == NULL
Hello Richard:
On 07/06/24 1:52 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>>>>>>> +
>>>>>>>> + df_ref use;
>>>>>>>> + df_insn_info *insn_info = DF_INSN_INFO_GET (info->rtl ());
>>>>>
Hello Richard:
On 07/06/24 4:24 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 06/06/24 8:03 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> On 06/06/24 2:28 pm, Richard Sandiford wrote:
>>>>> Hi,
>>>>>
>&g
Hello Richard:
On 06/06/24 8:03 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 06/06/24 2:28 pm, Richard Sandiford wrote:
>>> Hi,
>>>
>>> Just some comments on the fuseable_load_p part, since that's what
>>> we were discussing l
Hello Richard:
On 06/06/24 2:28 pm, Richard Sandiford wrote:
> Hi,
>
> Just some comments on the fuseable_load_p part, since that's what
> we were discussing last time.
>
> It looks like this now relies on:
>
> Ajit Agarwal writes:
>> + /* We use DF d
Hello All:
All comments are addressed.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implement virtual functions defined by generic code.
Target specific code are added in rs6000-mem-fusion.cc.
Tested for powerpc64-linux-gnu.
Th
Hello Richard:
On 03/06/24 9:28 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 03/06/24 8:24 pm, Richard Sandiford wrote:
>> Ajit Agarwal writes:
>>> Hello Richard:
>>>
>>> On 03/06/24 7:47 pm, Richard Sandiford wrote:
>>>> Ajit Agarwal
Hello Richard:
On 03/06/24 8:24 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>> On 03/06/24 7:47 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> On 03/06/24 5:03 pm, Richard Sandiford wrote:
>>>>
Hello Richard:
On 03/06/24 7:47 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 03/06/24 5:03 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>> [...]
>>>>> If it is intentional, what distinguishes things like vperm and xx
Hello Richard:
On 03/06/24 5:03 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>> [...]
>>> If it is intentional, what distinguishes things like vperm and xxinsertw
>>> (and all other unspecs) from plain addition?
>>>
>>> [(set (m
Hello Richard:
On 03/06/24 2:07 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>> On 31/05/24 8:08 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> On 31/05/24 3:23 pm, Richard Sandiford wrote:
>>>>> Ajit Agar
Hello All:
Common infrastructure using generic code for pair mem fusion of different
targets.
Implements additional interface virtual function implementation
required for rs6000 target.
Tested for aarch64-linux-gnu.
Thanks & Regards
Ajit
aarch64: Additional interface function implementation
C
Hello Richard:
On 31/05/24 3:23 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello All:
>>
>> Common infrastructure using generic code for pair mem fusion of different
>> targets.
>>
>> rs6000 target specific specific code implements virtu
Hello All:
Common infrastructure using generic code for pair mem fusion of different
targets.
Implements additional interface virtual function implementation
required for rs6000 target.
Tested for aarch64-linux-gnu.
Thanks & Regards
Ajit
aarch64: Additional interface function implementation.
Hello All:
All comments are addressed and patch is split into rs6000 and aarch64 target
changes.
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific code implements virtual functions defined by generic
code.
Target specific code are added
Hello Richard:
On 31/05/24 10:29 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 31/05/24 8:08 pm, Richard Sandiford wrote:
>> Ajit Agarwal writes:
>>> On 31/05/24 3:23 pm, Richard Sandiford wrote:
>>>> Ajit Agarwal writes:
>>>>> Hello All:
&
Hello Richard:
On 31/05/24 8:08 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 31/05/24 3:23 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>> Hello All:
>>>>
>>>> Common infrastructure using generic code for pair mem fus
Hello Richard:
On 31/05/24 3:23 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello All:
>>
>> Common infrastructure using generic code for pair mem fusion of different
>> targets.
>>
>> rs6000 target specific specific code implements virtu
Hello All:
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific specific code implements virtual functions defined
by generic code.
Code is implemented with pure virtual functions to interface with target
code.
Target specific code are added
Hello Richard:
On 30/05/24 4:44 pm, Richard Sandiford wrote:
> Thanks for the update. Some comments below, but looks very close
> to ready.
>
Thanks a lot.
> Ajit Agarwal writes:
>> diff --git a/gcc/pair-fusion.cc b/gcc/pair-fusion.cc
>> new file mode 100644
>>
e changes, but you'll need Richard S to approve.
>
> Thanks a lot for doing this.
>
> On 22/05/2024 00:16, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All comments are addressed.
>>
>> Move pair fusion pass from aarch64-ldp-fusion.cc to middle-end
Hello Alex:
On 21/05/24 10:22 pm, Alex Coplan wrote:
> Hi Ajit,
>
> I've left some more comments below. It's getting there now, thanks for
> your patience.
>
> On 21/05/2024 20:32, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All comments a
Hello Alex:
On 21/05/24 6:50 pm, Alex Coplan wrote:
> On 20/05/2024 21:50, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> Move pair fusion pass from aarch64-ldp-fusion.cc to middle-end
>> to support multiple targets.
>>
>> Common infrastructure of
Hello Alex:
On 21/05/24 6:02 pm, Alex Coplan wrote:
> On 21/05/2024 16:02, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 21/05/24 1:16 am, Alex Coplan wrote:
>>> On 20/05/2024 18:44, Alex Coplan wrote:
>>>> Hi Ajit,
>>>>
>>>>
Hello Alex:
On 21/05/24 1:16 am, Alex Coplan wrote:
> On 20/05/2024 18:44, Alex Coplan wrote:
>> Hi Ajit,
>>
>> On 20/05/2024 21:50, Ajit Agarwal wrote:
>>> Hello Alex/Richard:
>>>
>>> Move pair fusion pass from aarch64-ldp-fusion.cc to middle-end
Hello Alex/Richard:
Renaming of generic code is done to make target independent
and target dependent code to support multiple targets.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Target dependent code is the i
to something else,
>probably there are other bits too).
> - Move the generic parts out of gcc/config/aarch64 to a .cc file in the
>middle-end.
>
> I'll let Richard S make the final judgement on that. I don't really
> mind either way.
>
> On 15/05/2024 15
Hello Richard:
On 17/05/24 11:07 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Alex/Richard:
>>
>> All review comments are addressed.
>>
>> Common infrastructure of load store pair fusion is divided into target
>> independent and targ
Hello Alex/Richard:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface between target independent and dependent code.
Hello Alex:
On 17/05/24 6:22 pm, Alex Coplan wrote:
> Hi Ajit,
>
> On 17/05/2024 18:05, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 16/05/24 10:21 pm, Alex Coplan wrote:
>>> Hi Ajit,
>>>
>>> Thanks a lot for working through the review feedb
ake the final judgement on that. I don't really
> mind either way.
Sure.
Thanks & Regards
Ajit
>
> On 15/05/2024 15:06, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All review comments are addressed.
>>
>> Common infrastructure of load store
iew.
>
Sorry for the inconvenience caused. Hopefully I have incorporated
all the comments in v6 version of the patch.
> On 14/05/2024 15:08, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All comments are addressed.
>>
>> Common infrastructure of load store pai
Hello Alex/Richard:
All review comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface between target independent and dependen
sion.
>
There were issues sending the patch through thunderbird, hence multople
pacthes. Sorry for inconvenience caused.
> Mostly the comments below are just style nits and things you missed from
> the last review(s) (please try not to miss so many in the future).
>
Addressed.
>
Hello Alex/Richard:
All review comments are incorporated.
Changes since v4:
- changed prototype of destructure_pair from rti parameter to pattern
parameter.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independe
Hello Alex/Richard:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Hello Alex/Richard:
All comments are addressed.
There were some issues in sending the patch sending it again.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual funct
Hello Alex:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Target
Hello Alex:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Target
Hello Alex/Richard:
All review comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependen
und comments. It's important to have good clear comments for
> functions with the parameters (and return value, if any) clearly
> described. See https://www.gnu.org/prep/standards/standards.html#Comments
>
> Note that this now needs a little rebasing, too.
>
Done.
> On
Hello Alex:
On 14/04/24 10:29 pm, Ajit Agarwal wrote:
> Hello Alex:
>
> On 12/04/24 11:02 pm, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 12/04/24 8:15 pm, Alex Coplan wrote:
>>> On 12/04/2024 20:02, Ajit Agarwal wrote:
>>>> Hello Alex:
>>&g
Hello Alex/Richard:
All review comments are addressed and changes are made to transform_for_base
function as per consensus.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure
Hello Alex:
On 12/04/24 11:02 pm, Ajit Agarwal wrote:
> Hello Alex:
>
> On 12/04/24 8:15 pm, Alex Coplan wrote:
>> On 12/04/2024 20:02, Ajit Agarwal wrote:
>>> Hello Alex:
>>>
>>> On 11/04/24 7:55 pm, Alex Coplan wrote:
>>>> On
Hello Alex:
On 12/04/24 8:15 pm, Alex Coplan wrote:
> On 12/04/2024 20:02, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 11/04/24 7:55 pm, Alex Coplan wrote:
>>> On 10/04/2024 23:48, Ajit Agarwal wrote:
>>>> Hello Alex:
>>>>
>>>> On
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