在 2025-5-3 13:20, Jonathan Yong 写道:
On 5/2/25 9:59 AM, Julian Waters wrote:
Hi all,
After a long hiatus, I've returned to address review comments on the Windows TLS patch. Attached here
is the final patch from this effort. Ok for merge? Will need help from Windows maintainers to commit
once t
Hi @Jeff Law and @pal...@dabbelt.com ,
Please do needful by reviewing the below changes and helps us to upstream the
same .
Thank you
~U
-Original Message-
From: Umesh Kalappa
Sent: 29 April 2025 16:16
To: Umesh Kalappa ; Jeff Law ;
gcc-patches@gcc.gnu.org
Cc: kito.ch...@sifive.com;
On 5/2/25 9:59 AM, Julian Waters wrote:
Hi all,
After a long hiatus, I've returned to address review comments on the Windows
TLS patch. Attached here is the final patch from this effort. Ok for merge?
Will need help from Windows maintainers to commit once this is approved.
best regards,
Julia
On Sat, 2025-05-03 at 01:56 +0100, Sam James wrote:
> Richard Biener writes:
>
> > This flips the default to LRA for targets with an -mlra option not
> > using Mask(..).
>
> Please tag PR113934 for avr, PR113939 for m68k, PR113933 for pa, and PR55212
> for sh.
Thanks Sam for keeping an eye
Richard Biener writes:
> * config/alpha/alpha.cc (TARGET_LRA_P): Remove define.
> * config/bfin/bfin.cc (TARGET_LRA_P): Likewise.
> * config/c6x/c6x.cc (TARGET_LRA_P): Likewise.
> * config/fr30/fr30.cc (TARGET_LRA_P): Likewise.
> * config/frv/frv.cc (TARGET_LRA_P): L
Richard Biener writes:
> This flips the default to LRA for targets with an -mlra option not
> using Mask(..).
Please tag PR113934 for avr, PR113939 for m68k, PR113933 for pa, and PR55212
for sh.
Hi,
ix86_rtx_costs VEC_MERGE by special casing AVX512 mask operations and otherwise
returning cost->sse_op completely ignoring costs of the operands. Since
VEC_MERGE is also used to represent scalar variant of SSE/AVX operation, this
means that many instructions (such as SSE converisions) are ofte
On trunk I'll eventually do something different.. but it will be more
invasive than I think is reasonable for a backport.
The problem in the PR is that there is a variable with a range and has a
bitmask attached to it. We often defer bitmask processing, the the
change which triggers this pro
r16-286-gd84fbc516ea57d added a call to simplify_gen_subreg but didn't
check if the result of simplify_gen_subreg was non-null. simplify_gen_subreg
can return NULL if the subreg would be not valid. In the case below we had
a hard register for the SSE register xmm0 of mode SI and doing a subreg to
Q
On 4/15/25 9:21 AM, Richard Sandiford wrote:
Indu Bhagat writes:
Store Allocation Tags (st2g) is an Armv8.5-A memory tagging (MTE)
instruction. It stores an allocation tag to two tag granules of memory.
TBD:
- Not too sure what is the best way to generate the st2g yet; A
subsequent pat
On Fri, 2 May 2025, Jakub Jelinek wrote:
> Hi!
>
> The pr120057-1.c testcase is incorrectly rejected since
> r15-4377 (and for a while it also ICEd after the error), i.e.
> the optimization of large C initializers using RAW_DATA_CST.
> Similarly, the embed-18.c testcase is incorrectly rejected s
You probably should back off until I get a chance to merge our stuff in.
The "blobs" are gone. The information that needs to be created at compile
time to be passed to the library are now simple arrays of
build_int_cst_type(integer_type_node,...) integers that become
CONSTRUCTORs for arrays.
As f
OK by me.
Andrew
On 5/2/25 10:48, Jakub Jelinek wrote:
On Mon, Mar 31, 2025 at 11:30:20AM -0400, Andrew MacLeod wrote:
From 7116177599a3bb907d21fe642a4bdcb401e1263b Mon Sep 17 00:00:00 2001
From: Andrew MacLeod
Date: Mon, 31 Mar 2025 11:18:22 -0400
Subject: [PATCH 2/2] Use the current cache
On Fri, May 02, 2025 at 12:01:14PM -0500, Robert Dubner wrote:
> All we can do is see what happens. So, please, apply your patches to
> trunk. If you can do that soonish (and since it's not easy to figure out
Committed now.
Note, there is one last thing for the i686 -> x86_64 cross-compiler,
wh
On 4/30/25 20:44, Jeff Law wrote:
>>> Sorry this got backed up as I'm working on FRM overhaul - if this is not
>>> super
>>> urgent can you please wait for a few weeks for my work to be posted.
>>> If you prefer this go in still, fine by me as well.
>> Sure thing, feel free to ping me if there is
Hello, Jakub.
For the last month, Jim has been refactoring exception processing. (I
have been playing Sancho Panza to his Don Quixote, but the heavy lifting
has been his.)
We just today froze that, and I was just about to start turning all of
that work into an extensive patch.
All we can do is
> On May 2, 2025, at 12:27 PM, Maciej W. Rozycki wrote:
>
> ...
> NB I understand your position and the need to cut the line sometime, and
> I knew what the situation is with the VAX backend and that it would be
> manageable. In principle it might be that it's only that single ICE that
> n
On Fri, 2 May 2025, Richard Biener wrote:
> > All in all I do keep the switch to LRA in mind and maybe I'll be able to
> > move forward in the GCC 16 development cycle after all, but all I can do
> > is entirely in my free time and that seems to be very limited recently and
> > plagued with em
On Fri, May 02, 2025 at 12:26:12PM +0200, Richard Biener wrote:
> The following amends gcc-15/changes.html with a note that reload
> is going to be removed for GCC 16.
Thank you! The patches are taking a little time, I gave up on rebasing
what I had, redoing it is less work. Oh well.
> OK for w
Jennifer Schmitz writes:
> SVE loads/stores using predicates that select the bottom 8, 16, 32, 64,
> or 128 bits of a register can be folded to ASIMD LDR/STR, thus avoiding the
> predicate.
> For example,
> svuint8_t foo (uint8_t *x) {
> return svld1 (svwhilelt_b8 (0, 16), x);
> }
> was previous
Hi!
The following patch on top of the
https://gcc.gnu.org/pipermail/gcc-patches/2025-May/682500.html
fixes most of the remaining make check-cobol FAILs in the
i686-linux -> x86_64-linux cross-compiler.
Using the testing environment detailed in
https://gcc.gnu.org/pipermail/gcc-patches/2025-April/
On Sun, Apr 06, 2025 at 03:39:27PM +0200, Jakub Jelinek wrote:
> Right now it is not possible to even build cross-compilers from 32-bit
> architectures to e.g. x86_64-linux or aarch64-linux, even from little-endian
> ones.
>
> The following patch attempts to fix that.
>
> There were various issue
On Mon, Mar 31, 2025 at 11:30:20AM -0400, Andrew MacLeod wrote:
> From 7116177599a3bb907d21fe642a4bdcb401e1263b Mon Sep 17 00:00:00 2001
> From: Andrew MacLeod
> Date: Mon, 31 Mar 2025 11:18:22 -0400
> Subject: [PATCH 2/2] Use the current cache when creating inferred ranges.
>
> Infer range proce
Hi!
The pr120057-1.c testcase is incorrectly rejected since
r15-4377 (and for a while it also ICEd after the error), i.e.
the optimization of large C initializers using RAW_DATA_CST.
Similarly, the embed-18.c testcase is incorrectly rejected since
the embed support has been introduced and RAW_DAT
On 4/25/25 10:03 PM, Li, Pan2 wrote:
LGTM for the RISC-V part.
Agreed. We just need to reach a conclusion about the generic changes.
SO OK for the trunk if and only if the prerequisite patch is also
approved for the trunk.
jeff
On 1/2/25 1:34 AM, Li Xu wrote:
From: xuli
This patch would like to support .SAT_ADD when IMM=-1.
Form1:
T __attribute__((noinline)) \
sat_s_add_imm_##T##_fmt_1##_##INDEX (T x) \
{\
T sum = (UT)x + (UT)IMM;
On Fri, May 02, 2025 at 12:30:52PM +0200, Florian Weimer wrote:
> The termio structure will be removed from glibc 2.42. It has
> been deprecated since the late 80s/early 90s.
>
> Cherry-picked from LLVM commit 59978b21ad9c65276ee8e14f26759691b8a65763
> ("[sanitizer_common] Remove interceptors for
> target_insn_cost is used to prevent rpad optimization to be restored by
> late_combine1, looks like it's not sufficient for size_cost.
>
> 21804static int
> 21805ix86_insn_cost (rtx_insn *insn, bool speed)
> 21806{
> 21807 int insn_cost = 0;
> 21808 /* Add extra cost to avoid post_reload late
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
Here we failed to constant-evaluate the A constructor because DECL_SIZE
wasn't set on 'a' yet, so compare_address thinks we can't be sure it isn't
at the same address as 'i'.
Normally DECL_SIZE is set by build_decl calling layout_decl, but
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
After r16-332 these tests started failing. constexpr-89285.C should have
always given this error, and the new nonlit19.C needs to remove the
destructor body to prevent -fimplicit-constexpr from making the testcase
well-formed.
gcc/testsuit
On Tue, 29 Apr 2025, Andi Kleen wrote:
> This adds an automatic downloader for the latest test results from
> the mailing list archive and supports diffing test_summary to it.
> Useful if you don't want to run your own baseline.
>
> contrib/ChangeLog:
>
> * diffsummary.py: New file.
I'd sa
> Heh. This is a bit of a hobby-horse of mine. IMO we should be trying
> to make the generic, target-independent vector operations as useful
> as possible, so that people only need to resort to target-specific
> intrinsics if they're doing something genuinely target-specific.
> At the moment, we
On 5/1/25 9:33 AM, Patrick Palka wrote:
On Mon, 21 Apr 2025, Jason Merrill wrote:
Tested x86_64-pc-linux-gnu, OK for trunk?
-- 8< --
While working on PR119162 it occurred to me that it would be simpler to
detect the problem of a value referring to a heap allocation if we stopped
setting TREE_
Tested x86_64-pc-linux-gnu, applying to trunk.
-- 8< --
C++20 made a class with only explicitly defaulted constructors no longer
aggregate, and this wrongly affected whether the class is considered "POD
for layout purposes" under the ABI.
Conveniently, we already have check_non_pod_aggregate to
Hi Andi,
I cannot approve patches but LGTM. Maybe 'from urllib.error import URLError'
should be removed since it isn't needed.
Seems useful. The code looks good (although I'm not proficient in using
html.parser and urllib). I've tried to use the script and everything worked.
I've run flake8 on
On Fri, 2 May 2025 at 11:12, Jonathan Wakely wrote:
>
> On Fri, 2 May 2025 at 09:14, Dhruv Chawla wrote:
> >
> > Per version.syn#2, is required to define
> > __cpp_lib_addressof_constexpr as 201603L.
> >
> > Bootstrapped and tested on aarch64-linux-gnu.
>
> Thanks, I'll push this to trunk and th
The following plugs a hole in the tree_could_trap_p check that
cselim performs when making a store unconditional. The hole is
that tree_could_trap_p does not consider accesses to readonly
memory possibly trapping even though the accesses could be stores.
The fix is to add a lhs_p parameter (defau
When concatenating a path we reallocate the left operand's storage to
make room for the new components being added. When the two operands are
the same object, or the right operand is one of the components of the
left operand, the reallocation invalidates the pointers that refer
into the right opera
This was inspired by LWG 4245 but goes further. Anything which only
reads or writes the _M_length member can be noexcept. That
member is an iterator difference_type which means it's a signed integer
type or the __max_diff_type integer-like class type, so all arithmetic
and comparisons are non-throw
On Fri, 2 May 2025, Richard Biener wrote:
> I'd appreciate target maintainers of targets with a -mlra to
> enable LRA by default and unconditionally (aka, remove -mlra)
> themselves. Eventually that work will be done in a more-or-less
> unchecked way later.
I do appreciate the desire to remove
On Fri, 2 May 2025, Maciej W. Rozycki wrote:
> On Fri, 2 May 2025, Richard Biener wrote:
>
> > I'd appreciate target maintainers of targets with a -mlra to
> > enable LRA by default and unconditionally (aka, remove -mlra)
> > themselves. Eventually that work will be done in a more-or-less
> > un
If we make this test allocator usable in constant expressions then we'll
get an error if the 'state' data member isn't initialized. This makes it
a more reliable check that allocators are correctly value-initialized
when they're required to be.
libstdc++-v3/ChangeLog:
* testsuite/23_conta
Add more prerequisites for wchar and dual-abi targets in the src/c++11
directory, and simplify the existing ones (we don't need to add the main
xxx.cc source file as a prerequisite of xxx.o because that's implicit,
we only need to add the ones that Make can't determine on its own).
Also add simila
The termio structure will be removed from glibc 2.42. It has
been deprecated since the late 80s/early 90s.
Cherry-picked from LLVM commit 59978b21ad9c65276ee8e14f26759691b8a65763
("[sanitizer_common] Remove interceptors for deprecated struct termio
(#137403)").
Co-Authored-By: Tom Stellard
Sign
The following amends gcc-15/changes.html with a note that reload
is going to be removed for GCC 16.
OK for www?
* htdocs/gcc-15/changes.html: Mark GCC 15 as last release
supporting reload.
---
htdocs/gcc-15/changes.html | 7 +++
1 file changed, 7 insertions(+)
diff --git a/h
Forgot to attach the patches as files in the previous email. Attaching them
here.
-- >8 --
This patch modifies the intrinsic expanders to expand svlsl and svlsr to
unpredicated forms when the predicate is a ptrue. It also folds the
following pattern:
lsl , ,
lsr , ,
orr , ,
to:
re
On 07/12/24 00:08, Richard Sandiford wrote:
External email: Use caution opening links or attachments
Sorry for the slow reply.
Dhruv Chawla writes:
This patch modifies the intrinsic expanders to expand svlsl and svlsr to
unpredicated forms when the predicate is a ptrue. It also folds the
fol
The following removes the TARGET_LRA_P and replaces uses with true.
* target.def (lra_p): Remove.
(secondary_memory_needed_mode): Adjust documentation.
* targhooks.cc (default_lra_p): Remove.
(default_secondary_memory_needed_mode): Adjust.
* targhooks.h (def
On Fri, 2 May 2025 at 09:14, Dhruv Chawla wrote:
>
> Per version.syn#2, is required to define
> __cpp_lib_addressof_constexpr as 201603L.
>
> Bootstrapped and tested on aarch64-linux-gnu.
Thanks, I'll push this to trunk and the gcc-15 and gcc-14 branch.
I suppose we should audit our checks for
This flips the default to LRA for targets with an -mlra option not
using Mask(..).
* config/avr/avr.opt (mlra): Flip to default on.
* config/m68k/m68k.opt (mlra): Likewise.
* config/pa/pa.opt (mlra): Likewise.
* config/sh/sh.opt (mlra): Likewise.
---
gcc/config/avr
* config/alpha/alpha.cc (TARGET_LRA_P): Remove define.
* config/bfin/bfin.cc (TARGET_LRA_P): Likewise.
* config/c6x/c6x.cc (TARGET_LRA_P): Likewise.
* config/fr30/fr30.cc (TARGET_LRA_P): Likewise.
* config/frv/frv.cc (TARGET_LRA_P): Likewise.
* config
This mini-series removes the TARGET_LRA_P hook, forcing all targets
to use LRA. I have not touched the targets that define -mlra
in terms of a 'Target Mask(XXX)' since IIRC there's no way to
"default" that. I'd expect those to wrongly assume LRA isn't enabled
when using that XXX flag. Likewise
Hi all,
After a long hiatus, I've returned to address review comments on the Windows
TLS patch. Attached here is the final patch from this effort. Ok for merge?
Will need help from Windows maintainers to commit once this is approved.
best regards,
Julian
>From 8a89e2a0eb070fbcac5892839253e484a
Ping.
Thanks,
Jennifer
> On 25 Apr 2025, at 17:08, Jennifer Schmitz wrote:
>
> SVE loads and stores where the predicate is all-true can be optimized to
> unpredicated instructions. For example,
> svuint8_t foo (uint8_t *x)
> {
> return svld1 (svptrue_b8 (), x);
> }
> was compiled to:
> foo:
> p
> On 2 May 2025, at 10:05, Richard Sandiford wrote:
>
> External email: Use caution opening links or attachments
>
>
> Jennifer Schmitz writes:
>> I adjusted the patch to use && !val.is_constant () as check, such that the
>> extraction
>> of the last element is matched by other patterns for
On Fri, May 02, 2025 at 10:53:03AM +0200, Florian Weimer wrote:
> gcc/c/
>
> PR c/120055
> * c-typeck.cc (convert_arguments): Check if fundecl is null
> before checking for builtin function declaration.
>
> gcc/testsuite/
>
> * gcc.dg/Wdeprecated-non-prototype-6.c: New te
gcc/c/
PR c/120055
* c-typeck.cc (convert_arguments): Check if fundecl is null
before checking for builtin function declaration.
gcc/testsuite/
* gcc.dg/Wdeprecated-non-prototype-6.c: New test.
---
v2: Fix condition to keep diagnosing indirect calls. Add a test
On 21.11.2024 13:03, Jan Beulich wrote:
> Documentation is pretty clear here: "Require a constant operand and
> print the constant expression with no punctuation." See the patches for
> further details.
>
> 1: fix asm() operand 'c' modifier handling
> 2: x86: fix asm() operand 'c' modifier handlin
On Wed, Apr 30, 2025 at 7:26 PM David Faust wrote:
>
> The btf_decl_tag and btf_type_tag attributes provide a means to annotate
> declarations and types respectively with arbitrary user provided
> strings. These strings are recorded in debug information for
> post-compilation uses, and despite th
Pengfei Li writes:
> Thank you for the comments.
>
>> I don't think we can use an unbounded recursive walk, since that
>> would become quadratic if we ever used it when optimising one
>> AND in a chain of ANDs. (And using this function for ANDs
>> seems plausible.) Maybe we should be handling th
Per version.syn#2, is required to define
__cpp_lib_addressof_constexpr as 201603L.
Bootstrapped and tested on aarch64-linux-gnu.
Signed-off-by: Dhruv Chawla
libstdc++-v3/ChangeLog:
* include/std/memory: Define __glibcxx_want_addressof_constexpr.
* testsuite/20_util/headers/mem
Jennifer Schmitz writes:
> I adjusted the patch to use && !val.is_constant () as check, such that the
> extraction
> of the last element is matched by other patterns for VLS of all vector widths.
> 256-bit and 512-bit VLS are now matched by *vec_extract_dup
> and 1024-bit and 2048-bit by *vec_ext
---
htdocs/gcc-15/changes.html | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/htdocs/gcc-15/changes.html b/htdocs/gcc-15/changes.html
index f112af58..d851a744 100644
--- a/htdocs/gcc-15/changes.html
+++ b/htdocs/gcc-15/changes.html
@@ -1295,7 +1295,28 @
Pushing as obvious.
Signed-off-by: Kyrylo Tkachov
0001-AArch64-changes.html-Fix-typo.patch
Description: 0001-AArch64-changes.html-Fix-typo.patch
Richard Sandiford writes:
> Indu Bhagat writes:
>>> [...]
>>> (define_predicate "aarch64_granule16_imm6"
>>> (and (match_code "const_int")
>>> (match_test "IN_RANGE (INTVAL (op), -1008, 1008)
>
> The minimum can be -1020 instead of -1008.
Gah, of course I meant -1024.
On Thu, 1 May 2025, Filip Kastl wrote:
> Hi,
>
> while developing GCC 15, we found out that the bit-test switch lowering
> algorithm is quadratic and that it is possible to construct a switch that
> causes huge compile time (PR117091).
>
> Andi Kleen came up with a fast bit-test lowering algorit
Jakub Jelinek writes:
> On Thu, May 01, 2025 at 10:02:06PM +0100, Richard Sandiford wrote:
>> Jakub Jelinek writes:
>> > On Thu, May 01, 2025 at 04:30:56PM +, Joseph Myers wrote:
>> >> On Thu, 1 May 2025, Christopher Bazley wrote:
>> >>
>> >> > Changes in v2:
>> >> > - Fixed a formatting is
SVE loads/stores using predicates that select the bottom 8, 16, 32, 64,
or 128 bits of a register can be folded to ASIMD LDR/STR, thus avoiding the
predicate.
For example,
svuint8_t foo (uint8_t *x) {
return svld1 (svwhilelt_b8 (0, 16), x);
}
was previously compiled to:
foo:
ptrue p3.b,
Richard Sandiford writes:
> Indu Bhagat writes:
>> MEMTAG sanitizer, which is based on the HWASAN sanitizer, will invoke
>> the target-specific hooks to create a random tag, add tag to memory
>> address, and finally tag and untag memory.
>>
>> Implement the target hooks to emit MTE instructions i
On Fri, May 2, 2025 at 2:33 AM H.J. Lu wrote:
>
> On Wed, Apr 30, 2025 at 7:40 PM Uros Bizjak wrote:
> >
> > On Tue, Apr 29, 2025 at 12:22 PM H.J. Lu wrote:
> > >
> > > On Tue, Apr 29, 2025 at 5:30 PM Uros Bizjak wrote:
> > > >
> > > > On Tue, Apr 29, 2025 at 9:56 AM H.J. Lu wrote:
> > > > >
>
On Thu, May 1, 2025 at 10:46 PM Jason Merrill wrote:
>
> Tested x86_64-pc-linux-gnu, OK for trunk?
>
> -- 8< --
>
> This warning relies on the TRANSLATION_UNIT_WARN_EMPTY_P flag (set in
> cxx_init_decl_processing) to decide whether we want to warn about the GCC 8
> empty class parameter passing fi
Two targets were converted but retain the default.
I'll push as obvious in a bit.
Richard.
* config/arc/arc.cc (TARGET_LRA_P): Remove define.
* config/gcn/gcn.cc (TARGET_LRA_P): Likewise.
---
gcc/config/arc/arc.cc | 2 --
gcc/config/gcn/gcn.cc | 2 --
2 files changed, 4 deletion
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