[PATCH] Accept allones or 0 operand for vcond_mask op1.

Since ix86_expand_sse_movcc will simplify them into a simple vmov, vpand or vpandn. Current register_operand/vector_operand could lose some optimization opportunity. Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog: * config/i386/predicates.md (vector

Re: [PATCH] [x86] Generate 2 FMA instructions in ix86_expand_swdivsf.

On Mon, Apr 21, 2025 at 5:43 AM liuhongt wrote: > > From: "hongtao.liu" > > When FMA is available, N-R step can be rewritten with > > a / b = (a - (rcp(b) * a * b)) * rcp(b) + rcp(b) * a > > which have 2 fma generated.[1] > > [1] https://bugs.llvm.org/show_bug.cgi?id=21385 > > Bootstrapped and re

[PATCH] [x86] Generate 2 FMA instructions in ix86_expand_swdivsf.

From: "hongtao.liu" When FMA is available, N-R step can be rewritten with a / b = (a - (rcp(b) * a * b)) * rcp(b) + rcp(b) * a which have 2 fma generated.[1] [1] https://bugs.llvm.org/show_bug.cgi?id=21385 Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. Ok for trunk? gcc/ChangeLog

Re: PING: [PATCH] x86: Add a pass to remove redundant all 0s/1s vector load

On Sat, Apr 19, 2025 at 1:25 PM H.J. Lu wrote: > > On Sun, Dec 1, 2024 at 7:50 AM H.J. Lu wrote: > > > > For all different modes of all 0s/1s vectors, we can use the single widest > > all 0s/1s vector register for all 0s/1s vector uses in the whole function. > > Add a pass to generate a single wi

Re: [PATCH v2] x86: Update memcpy/memset inline strategies for -mtune=generic

On Mon, Apr 21, 2025 at 7:24 AM H.J. Lu wrote: > > On Sun, Apr 20, 2025 at 6:31 PM Jan Hubicka wrote: > > > > > PR target/102294 > > > PR target/119596 > > > * config/i386/x86-tune-costs.h (generic_memcpy): Updated. > > > (generic_memset): Likewise. > > > (generic_co

Re: [PATCH v2] x86: Update memcpy/memset inline strategies for -mtune=generic

On Sun, Apr 20, 2025 at 6:31 PM Jan Hubicka wrote: > > > PR target/102294 > > PR target/119596 > > * config/i386/x86-tune-costs.h (generic_memcpy): Updated. > > (generic_memset): Likewise. > > (generic_cost): Change CLEAR_RATIO to 17. > > * config/i386/x86-tune.

[PATCH] x86: Properly find the maximum stack slot alignment

Don't assume that stack slots can only be accessed by stack or frame registers. We first find all registers defined by stack or frame registers. Then check memory accesses by such registers, including stack and frame registers. gcc/ PR target/109780 PR target/109093 * co

New Swedish PO file for 'gcc' (version 15.1-b20250406)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Swedish team of translators. The file is available at: https://translationproject.org/latest/gcc/sv.po (This file, 'gcc-15.1-b20250406.sv.po'

Ping [PATCH/RFC] target, hooks: Allow a target to trap on unreachable [PR109267].

Hi all, I’d like to ping the patch from April 2024 at https://gcc.gnu.org/pipermail/gcc-patches/2024-May/651100.html As far as I understand, the status of this is: - Iain posted the patch for review - Richard said "your target hook is reasonable though I'd name it expand_unreachable_as_trap may

[PATCH] [RISC-V]Support -mcpu for Xuantie cpu

gcc/ChangeLog: * config/riscv/riscv-cores.def (RISCV_TUNE): Add xt-c908, xt-c908v, xt-c910, xt-c910v2, xt-c920, xt-c920v2. (RISCV_CORE): Add xt-c908, xt-c908v, xt-c910, xt-c910v2, xt-c920, xt-c920v2 * config/riscv/riscv.cc: Add xt-c908, xt-c908v, xt-c910, xt-c910v2, xt-c

RE: [PATCH] cobol: Allow for undefined NAME_MAX [PR119217]

> -Original Message- > From: Sam James > Sent: Saturday, April 19, 2025 19:53 > To: Robert Dubner > Cc: Jakub Jelinek ; Rainer Orth bielefeld.de>; Richard Biener ; Andreas Schwab > ; gcc-patches@gcc.gnu.org; James K. Lowden > > Subject: Re: [PATCH] cobol: Allow for undefined NAME_MAX

Re: [PATCH v2] x86: Update memcpy/memset inline strategies for -mtune=generic

> PR target/102294 > PR target/119596 > * config/i386/x86-tune-costs.h (generic_memcpy): Updated. > (generic_memset): Likewise. > (generic_cost): Change CLEAR_RATIO to 17. > * config/i386/x86-tune.def (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): > Add m_GENERIC

Re: [PATCH v2] x86: Update memcpy/memset inline strategies for -mtune=generic

> On Sun, Apr 20, 2025 at 4:19 AM Jan Hubicka wrote: > > > > > On Tue, Apr 8, 2025 at 3:52 AM H.J. Lu wrote: > > > > > > > > Simplify memcpy and memset inline strategies to avoid branches for > > > > -mtune=generic: > > > > > > > > 1. With MOVE_RATIO and CLEAR_RATIO == 17, GCC will use integer/ve

[PATCH] libstdc++: fix possible undefined atomic lock-free type aliases in module std

When building for 'i386-*' targets, all basic types are 'sometimes lock-free' and thus std::atomic_signed_lock_free and std::atomic_unsigned_lock_free are not declared. In the header , they are placed in preprocessor condition __cpp_lib_atomic_lock_free_type_aliases. In module std, they should be t

Re: PING: [PATCH v2] x86: Add pcmpeq splitters

On Sat, Apr 19, 2025 at 4:16 PM Uros Bizjak wrote: > > On Sat, Apr 19, 2025 at 7:22 AM H.J. Lu wrote: > > > > On Mon, Dec 2, 2024 at 6:27 AM H.J. Lu wrote: > > > > > > Add pcmpeq splitters to split > > > > > > (insn 5 3 7 2 (set (reg:V4SI 100) > > > (eq:V4SI (reg:V4SI 98) > > >

Re: [PATCH] simplify-rtx: Fix shortcut for vector eq/ne

On Tue, Apr 1, 2025 at 8:17 PM Richard Sandiford wrote: > > This patch forestalls a regression in gcc.dg/rtl/x86_64/vector_eq.c > with the patch for PR116398. The test wants: > > (cinsn 3 (set (reg:V4SI <0>) (const_vector:V4SI [(const_int 0) > (const_int 0) (const_int 0) (const_int 0)])))