Re: [PATCH] ira: Cap callee-saved register cost scale to 300

2025-02-01 Thread Richard Biener
> Am 02.02.2025 um 08:00 schrieb H.J. Lu : > > Don't increase callee-saved register cost by 1000x, which leads to that > callee-saved registers aren't used to preserve local variable values > across calls, by capping the scale to 300. >PR rtl-optimization/111673 >PR rtl-optimization/1

[PATCH] ira: Cap callee-saved register cost scale to 300

2025-02-01 Thread H.J. Lu
Don't increase callee-saved register cost by 1000x, which leads to that callee-saved registers aren't used to preserve local variable values across calls, by capping the scale to 300. PR rtl-optimization/111673 PR rtl-optimization/115932 PR rtl-optimization/116028 P

Re: [PATCH] Fortran: different character lengths in array constructor [PR93289]

2025-02-01 Thread Steve Kargl
On Sat, Feb 01, 2025 at 09:49:17PM +0100, Harald Anlauf wrote: > Am 01.02.25 um 21:03 schrieb Steve Kargl: > > On Sat, Feb 01, 2025 at 07:25:51PM +0100, Harald Anlauf wrote: > > > > > > the attached patch downgrades different constant character lengths in an > > > array constructor from a GNU to a

[PATCH, COMMITTED] x86: Add a test for PR rtl-optimization/111673

2025-02-01 Thread H.J. Lu
Add a test for the target independent bug, PR rtl-optimization/111673. PR rtl-optimization/111673 * gcc.target/i386/pr111673.c: New file. -- H.J. From 149da4e8927509a4e72eb01ee8277b6952757c7c Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Sun, 2 Feb 2025 06:46:29 +0800 Subject: [PATCH] x86: Add

Re: [PATCH] Fortran: different character lengths in array constructor [PR93289]

2025-02-01 Thread Harald Anlauf
Am 01.02.25 um 21:49 schrieb Harald Anlauf: So why must we be so tough? Here's what I get from other compilers: Intel, Nvidia, AMD flang: silent by default. ifx -stand f18: char_array_constructor_5.f90(11): warning #8208: If type specification is omitted, each ac-value expression in the arr

[PATCH, COMMITTED] x86: Change "if (TARGET_X32 ...)" back to "else if (TARGET_X32 ...)"

2025-02-01 Thread H.J. Lu
Update commit dd6247cb8fc11a15e23e949092f89d24ff329209 Author: H.J. Lu Date: Fri Jan 31 12:29:04 2025 +0800 x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt to change "if (TARGET_X32 ...)" back to "else if (TARGET_X32 ...)". PR target/118713 * config/i386/i386-expand.cc (ix86_exp

Re: [PATCH] Fortran: different character lengths in array constructor [PR93289]

2025-02-01 Thread Harald Anlauf
Am 01.02.25 um 21:03 schrieb Steve Kargl: On Sat, Feb 01, 2025 at 07:25:51PM +0100, Harald Anlauf wrote: the attached patch downgrades different constant character lengths in an array constructor from a GNU to a legacy extension, so that users get a warning with -std=gnu. We continue to genera

Re: [PATCH] Fortran: different character lengths in array constructor [PR93289]

2025-02-01 Thread Steve Kargl
On Sat, Feb 01, 2025 at 07:25:51PM +0100, Harald Anlauf wrote: > > the attached patch downgrades different constant character lengths in an > array constructor from a GNU to a legacy extension, so that users get a > warning with -std=gnu. We continue to generate an error when standard > conforman

Re: [PATCH] Fortran: different character lengths in array constructor [PR93289]

2025-02-01 Thread Jerry D
On 2/1/25 10:25 AM, Harald Anlauf wrote: Dear all, the attached patch downgrades different constant character lengths in an array constructor from a GNU to a legacy extension, so that users get a warning with -std=gnu.  We continue to generate an error when standard conformance is requested. Re

[PATCH] Fortran: different character lengths in array constructor [PR93289]

2025-02-01 Thread Harald Anlauf
Dear all, the attached patch downgrades different constant character lengths in an array constructor from a GNU to a legacy extension, so that users get a warning with -std=gnu. We continue to generate an error when standard conformance is requested. Regtested on x86_64-pc-linux-gnu (found one

Re: [PATCH v3] x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt

2025-02-01 Thread H.J. Lu
On Sat, Feb 1, 2025 at 6:33 PM H.J. Lu wrote: > > On Sat, Feb 1, 2025 at 5:52 PM Uros Bizjak wrote: > > > > On Sat, Feb 1, 2025 at 9:51 AM H.J. Lu wrote: > > > > > > If TARGET_INDIRECT_BRANCH_REGISTER is true, indirect call and jump should > > > use register, not memory. Update Bs, Bw and Bz co

[pushed: r15-7317] sarif-replay: support "cached" logical locations [§3.33.3]

2025-02-01 Thread David Malcolm
Some SARIF files offload most of the properties within logical locations in the results to an array of "cached" instances in theRun.logicalLocations, so the information can be consolidated (and to support the "parentIndex" property, which is PR 116176). Support such files in sarif-replay. Success

Re: [committed][rtl-optimization/116244] Don't create bogus regs in alter_subreg

2025-02-01 Thread Jeff Law
[ Returning to an old discussion... ] On 8/19/24 3:50 AM, Richard Sandiford wrote: Jeff Law writes: On 8/12/24 3:50 PM, Jeff Law wrote: On 8/12/24 1:49 PM, Richard Sandiford wrote: -  regno = subreg_regno (x); +  /* A paradoxical should always be REGNO (y) + 0.  Using subreg_re

[PATCH] c++: Improve contracts support in modules [PR108205]

2025-02-01 Thread Nathaniel Shead
Regtested on x86_64-pc-linux-gnu (so far just "dg.exp=contract* modules.exp=contract*"), OK for trunk if full bootstrap+regtest passes? -- >8 -- Modules makes some assumptions about types that currently aren't fulfilled by the types created in contracts logic. This patch ensures that exporting i

[Ada] Fix PR ada/118712

2025-02-01 Thread Eric Botcazou
This is a regression present on the mainline, 14 and 13 branches: the compiler segfaults when warning about an uninitialized variable as operand of primitive operator of derived real type, because of a small internal adjustment. Tested on x86-64/Linux, applied on the mainline, 14 and 13 branches

Re: [PATCH v3] x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt

2025-02-01 Thread H.J. Lu
On Sat, Feb 1, 2025 at 5:52 PM Uros Bizjak wrote: > > On Sat, Feb 1, 2025 at 9:51 AM H.J. Lu wrote: > > > > If TARGET_INDIRECT_BRANCH_REGISTER is true, indirect call and jump should > > use register, not memory. Update Bs, Bw and Bz constraints to disable > > indirect call over memmory if TARGET

Re: [PATCH] x86: Add a -mstack-protector-guard=global test

2025-02-01 Thread Uros Bizjak
On Sat, Feb 1, 2025 at 11:14 AM H.J. Lu wrote: > > Verify that -mstack-protector-guard=global works on x86. Default stack > protector uses TLS. -mstack-protector-guard=global uses a global variable, > __stack_chk_guard, instead of TLS. > > * gcc.target/i386/ssp-global.c: New file. OK. Thanks,

[PATCH] c++: Modularise start_cleanup_fn [PR98893]

2025-02-01 Thread Nathaniel Shead
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? -- >8 -- 'start_cleanup_fn' is not currently viable in modules, due to generating functions relying on the 'start_cleanup_cnt' counter which is reset to 0 with each new TU. This means that cleanup functions declared in a TU will co

[PATCH] x86: Add a -mstack-protector-guard=global test

2025-02-01 Thread H.J. Lu
Verify that -mstack-protector-guard=global works on x86. Default stack protector uses TLS. -mstack-protector-guard=global uses a global variable, __stack_chk_guard, instead of TLS. * gcc.target/i386/ssp-global.c: New file. -- H.J. From 520d249938561639ec5c99f36947fd6795a9f2ed Mon Sep 17 00:00

Re: [PATCH v3] x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt

2025-02-01 Thread Uros Bizjak
On Sat, Feb 1, 2025 at 9:51 AM H.J. Lu wrote: > > If TARGET_INDIRECT_BRANCH_REGISTER is true, indirect call and jump should > use register, not memory. Update Bs, Bw and Bz constraints to disable > indirect call over memmory if TARGET_INDIRECT_BRANCH_REGISTER true, change > x32 call over GOT slot

Re: [PATCH 28/61] Fix wrong instruction in the delay slot

2025-02-01 Thread Eric Botcazou
See PR rtl-optimization/117327 for a similar issue. > gcc/ > * reorg.cc (label_with_barrier_p): New function. > (skip_consecutive_labels): Use it. Don't skip the label if an > empty block is found. > (first_active_target_insn): Likewise. Don't ignore the empty > blo

[PATCH v3] x86: Handle TARGET_INDIRECT_BRANCH_REGISTER for -fno-plt

2025-02-01 Thread H.J. Lu
If TARGET_INDIRECT_BRANCH_REGISTER is true, indirect call and jump should use register, not memory. Update Bs, Bw and Bz constraints to disable indirect call over memmory if TARGET_INDIRECT_BRANCH_REGISTER true, change x32 call over GOT slot to call over register and also disable sibcall over memo