Re: [PATCHv2] replace atoi with strtoul in opts.cc, lto-wrapper.c, lto/lto.c [PR114542]

2024-12-15 Thread Heiko Eißfeldt
Straight forward replacements of atoi() with strtoul() in order to avoid UB and detect invalid argument values. Tested with x86_64-pc-linux-gnu. 2024-12-16 Heiko Eißfeldt     PR lto/114542     * lto-wrapper.cc (run_gcc):     Use strtoul with ERANGE check instead of atoi     * lto/lto.cc (do_wh

[PATCH v2] Apply lambda section attributes to static thunks

2024-12-15 Thread Campbell Suter
Each lambda that can be converted to a plain function pointer has a thunk generated for it, which invokes the body of the lambda function. When a section attribute is added to a lambda function, it only applies to the body of the lambda function, and not the thunk. When a lambda is only ever used

[PATCH] c: do not warn about truncating NUL char when initializing nonstring arrays [PR117178]

2024-12-15 Thread Kees Cook
When initializing a nonstring char array when compiled with -Wunterminated-string-initialization the warning trips even when truncating the trailing NUL character from the string constant. Only warn about this when running under -Wc++-compat since under C++ we should not initialize nonstrings from

[PATCH v2 1/2] RISC-V: Document thead-c906, xiangshan-nanhu, and generic-ooo

2024-12-15 Thread Anton Blanchard
gcc/ChangeLog * doc/invoke.texi (RISC-V): Add thead-c906, xiangshan-nanhu to -mcpu, add generic-ooo and remove thead-c906 from -mtune. Signed-off-by: Anton Blanchard --- gcc/doc/invoke.texi | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/gcc/doc/in

[PATCH v2 2/2] RISC-V: Add Tenstorrent Ascalon 8 wide architecture

2024-12-15 Thread Anton Blanchard
This adds the Tenstorrent Ascalon 8 wide architecture (tt-ascalon-d8) to the list of known cores. gcc/ChangeLog: * config/riscv/riscv-cores.def: Add tt-ascalon-d8. * config/riscv/riscv.cc (tt_ascalon_d8_tune_info): New. * doc/invoke.texi (RISC-V): Add tt-ascalon-d8 to -mcp

Re: [PATCH] RISC-V: Add Tenstorrent Ascalon 8 wide architecture

2024-12-15 Thread Anton Blanchard
Hi Jeff, Thanks for the review! On Sun, Dec 15, 2024 at 2:59 AM Jeff Law wrote: > If your integer divider has early exit paths you may want to reduce the > int_div costs a bit.I found that ~75% of the actual latency as the > cost worked pretty well for our uarch. Obviously this is a heurist

[committed] hppa: Implement TARGET_FRAME_POINTER_REQUIRED

2024-12-15 Thread John David Anglin
Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11. Committed to trunk. Dave --- hppa: Implement TARGET_FRAME_POINTER_REQUIRED If a function receives nonlocal gotos, it needs to save the frame pointer in the argument save area. This ensures that LRA sets frame_pointer_needed when it saves

[committed] testsuite: xfail scan-assembler-times in c-c++-common/gomp/unroll-[45].c

2024-12-15 Thread John David Anglin
Tested on hppa64-hp-hpux11.11. Committed to trunk. Dave --- testsuite: Enable TImode tests on hppa64 2024-12-15 John David Anglin gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/ivopts-1.c: Enable TImode tests on hppa64. diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ivopts-1.c b/gcc/test

[committed] testsuite: xfail scan-assembler-times in c-c++-common/gomp/unroll-[45].c

2024-12-15 Thread John David Anglin
Tested on hppa64-hp-hpux11.11. Committed to trunk. Dave --- testsuite: xfail scan-assembler-times in c-c++-common/gomp/unroll-[45].c Count differs on hppa*-*-hpux* due to hpux specific directives. 2024-12-15 John David Anglin gcc/testsuite/ChangeLog: * c-c++-common/gomp/unroll-4.c

[committed] testsuite: Require lto in g++.dg/modules/enum-14.C

2024-12-15 Thread John David Anglin
Tested on hppa64-hp-hpux11.11. Committed to trunk. Dave --- testsuite: Require lto in g++.dg/modules/enum-14.C 2024-12-15 John David Anglin gcc/testsuite/ChangeLog: * g++.dg/modules/enum-14.C: Require lto. diff --git a/gcc/testsuite/g++.dg/modules/enum-14.C b/gcc/testsuite/g++.dg

Re: [PATCH 1/3] testsuite: RISC-V: Explicitly specify ABI when adding V and Zvbb options

2024-12-15 Thread Dimitar Dimitrov
On Sat, Dec 14, 2024 at 10:17:44AM -0700, Jeff Law wrote: > > > On 12/10/24 12:48 PM, Dimitar Dimitrov wrote: > > On Mon, Dec 09, 2024 at 06:05:10PM +0100, Robin Dapp wrote: > > > > +/* { dg-additional-options "-mabi=lp64d" { target { rv64 } } } */ > > > > +/* { dg-additional-options "-mabi=ilp32

Re: [PATCH] c++, coroutines: Make suspend index consistent for debug.

2024-12-15 Thread Iain Sandoe
> On 10 Dec 2024, at 01:02, Jason Merrill wrote: > > On 12/9/24 2:39 PM, Iain Sandoe wrote: >>> On 9 Dec 2024, at 19:34, Jason Merrill wrote: >>> >>> On 12/9/24 2:00 PM, Iain Sandoe wrote: > On 9 Dec 2024, at 18:56, Jason Merrill wrote: > > On 11/29/24 8:47 AM, Iain Sandoe wrote

Re: [PATCH] c++, coroutines:Ensure bind exprs are visited once [PR98935].

2024-12-15 Thread Iain Sandoe
> On 9 Dec 2024, at 18:59, Jason Merrill wrote: > > On 11/29/24 8:45 AM, Iain Sandoe wrote: >> Tested on x86_64-darwin, x86_64, powerpc64-linux, >> OK for trunk? >> thanks >> Iain >> --- 8< --- >> Recent changes in the C++ FE and the coroutines implementation have >> exposed a latent issue in w

[pushed] c++, coroutines: Use finish_if_stmt in a missed case [NFC].

2024-12-15 Thread Iain Sandoe
This just uses the higher level API rather than writing out the steps separately. Tested on x86_64-darwin, powerpc64-linux, pushed as obvious, thanks Iain --- 8< --- Just shorter code. gcc/cp/ChangeLog: * coroutines.cc (cp_coroutine_transform::wrap_original_function_body): Use

Re: [PATCH v2] ada: PR target/117538 Traceback includes load address if executable is PIE.

2024-12-15 Thread Simon Wright
I wish to retract this version of the patch and request that the first version (posted on 22/11/2024) be considered instead. > On 24 Nov 2024, at 11:23, Simon Wright wrote: > > If s-trasym.adb (System.Traceback.Symbolic, used as a renaming by > GNAT.Traceback.Symbolic) is given a traceback from

Re: [PATCH 2/2] RISC-V: Support RISC-V Profiles RVA/B23.

2024-12-15 Thread Jeff Law
On 12/3/24 4:02 AM, Jiawei wrote: This patch introduces support for RISC-V Profiles RV23A and RV23B [1], enabling developers to utilize these profiles through the -march option. [1] https://github.com/riscv/riscv-profiles/releases/tag/rva23-rvb23-v0.7-ratification-vote gcc/ChangeLog:

Re: [PATCH 1/2] RISC-V: Support RISC-V Profiles RV20/22.

2024-12-15 Thread Jeff Law
On 12/3/24 4:02 AM, Jiawei wrote: This patch introduces support for RISC-V Profiles RV20 and RV22 [1], enabling developers to utilize these profiles through the -march option. [1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0 gcc/ChangeLog: * common/config/riscv/riscv-co

Re: [PATCH 2/2] RISC-V: Support RISC-V Profiles RVA/B23.

2024-12-15 Thread Jeff Law
On 12/3/24 8:04 PM, Jiawei wrote: We talked about this at the Cauldron, but I forget if we actually ended up saying anything on the mailing lists.  IIRC the general conclusion here was that we should take advantage of all the RVA22/23 mandatory features, even if they're defacto not implem

Re: [PING][PATCH 00/15] Fix data races with sub-longword accesses on Alpha

2024-12-15 Thread Jeff Law
On 12/3/24 2:02 PM, Maciej W. Rozycki wrote: On Mon, 18 Nov 2024, Maciej W. Rozycki wrote: As it happens these data races also apply to BWX Alpha systems, as I have discovered in the course of this effort, although owing to how the Alpha backend of GCC has implemented block copy and clear

Re: [PATCH] RISC-V: optimization on checking certain bits set ((x & mask) == val)

2024-12-15 Thread Jeff Law
On 12/15/24 3:11 AM, Oliver Kozul wrote: I did not know about the costs of constant synthesis. I thought that the values of those constants are known at compile time, and therefore their creation would not have an impact on performance. I will definitely take a look at riscv_const_insns and

[PATCH]Arm: [committed] fix bootstrap after MVE changes

2024-12-15 Thread Tamar Christina
Hi All, The recent commits for MVE on Saturday have broken armhf bootstrap due to a -Werror false positive: inlined from 'virtual rtx_def* {anonymous}::vstrq_scatter_base_impl::expand(arm_mve::function_expander&) const' at /gcc/config/arm/arm-mve-builtins-base.cc:352:17: ./genrtl.h:38:16: e

Re: [RFC PATCH] expr, gimplify: Optimize !complete_p CONSTRUCTOR initialization [PR116416]

2024-12-15 Thread Richard Biener
On Thu, 12 Dec 2024, Jakub Jelinek wrote: > Hi! > > As we don't have a SRA fix for PR117971, I thought I'd try to improve > it using an optimization during gimplification. > This is about the tree-ssa/pr78687.C testcase, which is a variant with > struct option_1 > { > void *a, *b, *c, *d, *e;

Re: [PATCH] RISC-V: optimization on checking certain bits set ((x & mask) == val)

2024-12-15 Thread Oliver Kozul
Thank you again for your helpful comments. I will implement the formatting changes you mentioned. I agree that a description like: ;; Transform (X & C1) + C2 into (X | ~C1) - (-C2 | ~C1) ;; Where C1 is not a LUI operand, but ~C1 is a LUI operand is more fitting since we are catching a plus expr

Contents of PO file 'cpplib-14.1-b20240218.sr.po'

2024-12-15 Thread Translation Project Robot
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New Serbian PO file for 'cpplib' (version 14.1-b20240218)

2024-12-15 Thread Translation Project Robot
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