Re: [RFC/RFA][PATCH v5 00/12] CRC optimization.

On Sat, Oct 19, 2024, 17:58 Jeff Law wrote: > > > On 10/18/24 9:00 AM, Mariam Arutunian wrote: > > Hello, > > > > This patch series is a respin of the following: https://gcc.gnu.org/ > > pipermail/gcc-patches/2024-September/662961.html > pipermail/gcc-patches/2024-Septembe

Re: [PATCH] regenerate-opt-urls.py: fix transposed values for "vax" and "v850"

Hi Maciej, On Sat, Oct 19, 2024 at 04:54:06PM +0100, Maciej W. Rozycki wrote: > On Wed, 12 Jun 2024, Maciej W. Rozycki wrote: > > > > Hence we decided to check for it in CI instead. > > > > > > Hope the trade-off sounds reasonable > > > > I have reviewed the thread referred and I note that a c

[PATCH 3/3] gcc: Add --enable-multilib-space option

This option adds a per-multilib variant that specifies -Os instead of the default. Signed-off-by: Keith Packard --- config-ml.in | 2 +- gcc/Makefile.in | 32 +++- gcc/configure| 13 + gcc/configure.ac | 7 +++ gcc/doc/instal

[PATCH 0/3, v2] Automate creation of -O2 and -Os multilib variants

This is the second version of this patch series. Changes from the previous versions: * Add documentation for --enable-multilib-space configuration option. Thanks to Joseph Myers for flagging this. * Fixed targets using MULTILIB_OSDIRNAMES using '=' signs; instead of simply adding a new '

[PATCH 2/3] arm: Add missing multilib default values

The arm multilib configuration includes two more parameters which affect multilib selection, marm/mthumb and mfloat-abi. Without those, the default multilib selection is mis-specified and the only reason it works is because '.' is the fall-back path. Add "marm" and "mfloat-abi=soft" to MULTILIB_DE

[PATCH 1/3] libgcc: Use -Os/-Oz from CC or CFLAGS

Override other optimization settings with any -Os or -Oz found in CC or CFLAGS. Signed-off-by: Keith Packard --- libgcc/Makefile.in | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in index ffc45f21267..25710636938 100644 --- a/l

Re: [PATCH] diagnostics: libcpp: Improve locations for _Pragma lexing diagnostics [PR114423]

On Fri, Oct 18, 2024 at 6:21 PM David Malcolm wrote: > > On Fri, 2024-10-18 at 13:58 -0400, Lewis Hyatt wrote: > > On Fri, Oct 18, 2024 at 11:25 AM David Malcolm > > wrote: > > > >if (!pfile->cb.diagnostic) > > > > abort (); > > > > - ret = pfile->cb.diagnostic (pfile, level, reason, ri

PING: [PATCH] sibcall: Adjust BLKmode argument size for alignment padding

On Sun, Oct 13, 2024, 10:07 AM H.J. Lu wrote: > Adjust BLKmode argument size for parameter alignment for sibcall check. > > gcc/ > > PR middle-end/117098 > * calls.cc (store_one_arg): Adjust BLKmode argument size for > alignment padding for sibcall check. > > gcc/testsuite/ > > PR middle-end/1170

[PATCH] testsuite: arm: Relax cbranch tests to accept inverted branches

Ok for trunk and releases/gcc-14? -- Similar to PR113502, but for non-aarch64 test. The test started to fail after r14-7243-gafac1bd3365. gcc/testsuite/ChangeLog: * gcc.target/arm/vect-early-break-cbranch.c: Ignore exact branch. Signed-off-by: Torbjörn SVENSSON --- .../gcc.ta

[PATCH] testsuite: arm: Use effective-target for data-intrinsics-assembly test

Ok for trunk and releases/gcc-14? -- The expected assembler in the test case assumes -marm, so explicily require it. gcc/testsuite/ChangeLog: * gcc.target/arm/acle/data-intrinsics-assembly.c: Use effective-target arm_arch_v6_arm. Signed-off-by: Torbjörn SVENSSON --- gcc/tests

[PATCH] testsuite: arm: Relax register selection [PR116623]

With r15-1618-g9f168b412f4, I get the following asm generated for the test case: .align 1 .align 2 .global test5 .syntax unified .thumb .thumb_func .type test5, %function test5: @ args = 4, pretend = 0, frame = 0 @ frame_n

Re: [PATCH] regenerate-opt-urls.py: fix transposed values for "vax" and "v850"

On Wed, 12 Jun 2024, Maciej W. Rozycki wrote: > > Hence we decided to check for it in CI instead. > > > > Hope the trade-off sounds reasonable > > I have reviewed the thread referred and I note that a concern such as > mine has already been raised in response to which you have added the > `re

Re: [PATCH] phiopt: do factor_out_conditional_operation for all phis [PR112418]

On 10/18/24 7:41 PM, Andrew Pinski wrote: Sometimes factor_out_conditional_operation can factor out an operation that causes a phi node to become the same element. Other times, we want to factor out a binary operator because it can improve code generation, an example is PR 110015 (openjpeg).

Re: [PATCH v4] RISC-V: add option -m(no-)autovec-segment

On 10/15/24 12:05 PM, Robin Dapp wrote: Quick question. We did something like this to aid internal testing/bringup. Our variant adjusted a ton of the mode iterators in vector-iterators.md and the TUPLE_ENTRY stuff in riscv-vector-switch.def. Robin, do you remember why you had to adjust all

Re: [PATCH][v5] RISC-V: add option -m(no-)autovec-segment

On 10/16/24 6:36 PM, Edwin Lu wrote: Add option -m(no-)autovec-segment to enable/disable autovectorizer from emitting vector segment load/store instructions. This is useful for performance experiments. gcc/ChangeLog: * config/riscv/autovec.md (vec_mask_len_load_lanes, vec_mask_len_st

Re: [RFC/RFA][PATCH v5 00/12] CRC optimization.

On 10/18/24 9:00 AM, Mariam Arutunian wrote: Hello, This patch series is a respin of the following: https://gcc.gnu.org/ pipermail/gcc-patches/2024-September/662961.html . Although I sent [PATCH v4 00/12] to the mailing

Re: [RFC/RFA] [PATCH v5 09/12] Add symbolic execution support.

On 10/18/24 9:01 AM, Mariam Arutunian wrote: Gives an opportunity to execute the code on bit level, assigning symbolic values to the variables which don't have initial values. Supports only CRC specific operations. Example: uint8_t crc; uint8_t pol = 1; crc = crc ^ pol; during symbolic exec

Re: [PATCH 5/7] RISC-V: Move vector memcpy decision making to separate function [NFC]

On 10/18/24 7:12 AM, Craig Blackmore wrote: This moves the code for deciding whether to generate a vectorized memcpy, what vector mode to use and whether a loop is needed out of riscv_vector::expand_block_move and into a new function riscv_vector::use_stringop_p so that it can be reused for ot

[r15-4494 Regression] FAIL: gfortran.dg/unsigned_38.f90 -O (test for excess errors) on Linux/x86_64

On Linux/x86_64, 4f9b1735ab5eaf93d07d65c81d83cd123a8f3478 is the first bad commit commit 4f9b1735ab5eaf93d07d65c81d83cd123a8f3478 Author: Thomas Koenig Date: Sat Oct 19 10:26:17 2024 +0200 Fix an ICE with UNSIGNED in match_sym_complex_part. caused FAIL: gfortran.dg/unsigned_38.f90 -O

Re: [PATCH 7/7] RISC-V: Disable by pieces for vector setmem length > UNITS_PER_WORD

On 10/18/24 7:13 AM, Craig Blackmore wrote: For fast unaligned access targets, by pieces uses up to UNITS_PER_WORD size pieces resulting in more store instructions than needed. For example gcc.target/riscv/rvv/base/setmem-1.c:f1 built with `-O3 -march=rv64gcv -mtune=thead-c906`: ``` f1:

Re: [PATCH 6/7] RISC-V: Make vectorized memset handle more cases

On 10/18/24 7:12 AM, Craig Blackmore wrote: `expand_vec_setmem` only generated vectorized memset if it fitted into a single vector store. Extend it to generate a loop for longer and unknown lengths. The test cases now use -O1 so that they are not sensitive to scheduling. gcc/ChangeLog:

Re: [PATCH 4/7] RISC-V: Honour -mrvv-max-lmul in riscv_vector::expand_block_move

On 10/18/24 7:12 AM, Craig Blackmore wrote: Unlike the other vector string ops, expand_block_move was using max LMUL m8 regardless of TARGET_MAX_LMUL. Yea. In retrospect I should have caught this when we integrated the original patches. The check for whether to generate inline vector cod

Re: [WIP RFC] libstdc++: add module std

* Jason Merrill: > This patch is not ready for integration, but I'd like to get feedback on the > approach (and various specific questions below). > > -- 8< -- > > This patch introduces an installed source form of module std and std.compat. > To find them, we install a libstdc++.modules.json file

Re: [PATCH] c++: Fix crash during NRV optimization with invalid input [PR117099]

> On 19 Oct 2024, at 10:16, Simon Martin wrote: > > On 18 Oct 2024, at 10:55, Sam James wrote: > >> Simon Martin writes: >> >>> Hi Sam, >> >> Hi Simon, >> >>> >>> On 16 Oct 2024, at 22:06, Sam James wrote: >>> Simon Martin writes: > We ICE upon the following invalid code

counted_by attribute and type compatibility

Hi Quin and Joseph, I saw that there is now new code in tu_tagged_types_compatible which makes structure type incompatible depending on whether there is ac counted_by attribute. Is this what we want? I think a warning might make more sense as this types are fundamentally still compatible. I a

Re: [PATCH] c++: Fix crash during NRV optimization with invalid input [PR117099]

On 18 Oct 2024, at 10:55, Sam James wrote: > Simon Martin writes: > >> Hi Sam, > > Hi Simon, > >> >> On 16 Oct 2024, at 22:06, Sam James wrote: >> >>> Simon Martin writes: >>> We ICE upon the following invalid code because we end up calling finalize_nrv_r with a RETURN_EXPR with no ope

[PATCH] c++: Relax checking assert about elision to support -fno-elide-constructors [PR114619]

We currently ICE in checking mode with cxx_dialect < 17 on the following valid code === cut here === struct X { X(const X&) {} }; extern X x; void foo () { new X[1]{x}; } === cut here === The problem is that cp_gimplify_expr gcc_checking_asserts that a TARGET_EXPR is not TARGET_EXPR_ELIDING_P

[patch, fortran] Fix UNSIGNED ICE on matchting

Hello world, I have just committed the attached patch as obvious - just recognize that an UNSIGNED is an error in a complex part. Fix an ICE with UNSIGNED in match_sym_complex_part. gcc/fortran/ChangeLog: PR fortran/117225 * primary.cc (match_sym_complex_part): An UNSIGNED in