On Sat, Sep 7, 2024 at 8:22 PM H.J. Lu wrote:
>
>
> On Sat, Sep 7, 2024, 11:07 AM Georg-Johann Lay wrote:
>>
>> Am 07.09.24 um 19:51 schrieb H.J. Lu:
>> > On Sat, Sep 7, 2024 at 10:49 AM Georg-Johann Lay wrote:
>> >> Am 07.09.24 um 18:35 schrieb Jeff Law:
>> >>> On 9/6/24 3:40 AM, Georg-Johann L
Hi!
On 2024-09-04T13:43:45+0800, "Hu, Lin1" wrote:
> --- /dev/null
> +++ b/gcc/testsuite/gcc.dg/opt-ordered-and-nonequal-1.c
> @@ -0,0 +1,49 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -fdump-tree-forwprop1-details" } */
> +
> +int is_ordered_and_nonequal_sh_1 (float a, float b)
> +{
>
> -Original Message-
> From: Thomas Schwinge
> Sent: Friday, September 6, 2024 2:31 PM
> To: Prathamesh Kulkarni ; Richard Biener
>
> Cc: Andrew Pinski ; gcc-patches@gcc.gnu.org; Jakub
> Jelinek
> Subject: RE: [nvptx] Pass -m32/-m64 to host_compiler if it has
> multilib support
>
> Exte
Ping * 6
Please review!
On 21/03/24 6:21 pm, jeevitha wrote:
> Hi All,
>
> The following patch has been bootstrapped and regtested on powerpc64le-linux.
>
> PTImode assists in generating even/odd register pairs on 128 bits. When the
> user
> specifies PTImode as an attribute, it breaks becaus
Ping
On Fri, Aug 16, 2024 at 09:41:55AM +0200, Stefan Schulze Frielinghaus wrote:
> Currently subregs originating from *tf_to_fprx2_0 and *tf_to_fprx2_1
> survive register allocation. This in turn leads to wrong register
> renaming. Keeping the current approach would mean we need two insns for
>
Ping
On Fri, Aug 16, 2024 at 09:14:02AM +0200, Stefan Schulze Frielinghaus wrote:
> In s390_expand_insv(), if generating code for ICM et al. src is a MEM
> and gen_lowpart might force src into a register such that we end up with
> patterns which do not match anymore. Use adjust_address() instead
> Having matching pattern for these Zfa moves seems pointless because
> the optimization that utilizes the instructions in
> riscv_split_doubleword_move() uses:
> gen_movdfsisi3_rv32(), gen_movsidf2_low_rv32() and gen_movsidf2_high_rv32().
> In the XTheadFmv pattern, we use unspec, so the pattern w
It fix the regression by
a51f2fc0d80869ab079a93cc3858f24a1fd28237 is the first bad commit
commit a51f2fc0d80869ab079a93cc3858f24a1fd28237
Author: liuhongt
Date: Wed Sep 4 15:39:17 2024 +0800
Handle const0_operand for *avx2_pcmp3_1.
caused
FAIL: gcc.target/i386/pr59539-1.c scan-assembler-
Kindly ping.
Pan
-Original Message-
From: Li, Pan2
Sent: Friday, August 30, 2024 6:16 PM
To: gcc-patches@gcc.gnu.org
Cc: richard.guent...@gmail.com; tamar.christ...@arm.com; juzhe.zh...@rivai.ai;
kito.ch...@gmail.com; jeffreya...@gmail.com; rdapp@gmail.com; Li, Pan2
Subject: [PAT
On 2024-09-08 18:01, Andrew Pinski wrote:
When I was implementing improvements into phiopt I ran into case where
objsz would fail now because we get:
tmp = PHI
ptr = ptr + tmp
where before the pointer plus was inside each branch instead. So my
question is there any progress on implementing objs
On Tue, Nov 9, 2021 at 11:02 AM Siddhesh Poyarekar wrote:
>
>
> This patchset implements the __builtin_dynamic_object_size builtin for
> gcc. The primary motivation to have this builtin in gcc is to enable
> _FORTIFY_SOURCE=3 support with gcc, thus allowing greater fortification
> in use cases wh
On Sat, Sep 7, 2024 at 7:08 PM Jeff Law wrote:
>
>
>
> On 9/6/24 5:32 AM, Jin Ma wrote:
> > In the process of DF to SI, we generally use "unsigned_fix" rather than
> > "truncate" for conversion. Although this has no effect in general,
> > unexpected ICE often occurs when precise semantic analysis
Hello world,
like the subject says. The patch is gzipped because it is large;
it contains multiple MATMUL library implementations.
OK for trunk?
Implement MATMUL and DOT_PRODUCT for unsgigned.
gcc/fortran/ChangeLog:
* arith.cc (gfc_arith_uminus): Fix warning.
(gfc_arith_minus)
On 8/23/24 09:41, Jan Hubicka wrote:
Since this is a pure compile test it makes sense to inform dejagnu of
it.
gcc/testsuite/ChangeLog:
* gcc.misc-tests/gcov-23.c: Use dg-compile, not gcc -c
OK,
Honza
Thanks,
Pushed.
---
gcc/testsuite/gcc.misc-tests/gcov-23.c | 3 ++-
1 file ch
On 8/23/24 09:39, Jan Hubicka wrote:
Hi,
1:4:int notmain(const char *entity)
-: == inlined from hello.h ==
1:6: if (s)
branch 0 taken 0 (fallthrough)
branch 1 taken 1
#:7:printf ("hello, %s!\n", s);
%:7-block 3
call0 never e
This small cleanup removes a redundant check for gimple_assign_cast_p and
reformats
based on that. Also changes the if statement that checks if the integral type
and the
check to see if the constant fits into the new type such that it returns null
and reformats based on that.
Also moves the chec
On 8/16/24 06:58, Jakub Jelinek wrote:
If this can apply (perhaps with small fuzz) to vanilla trunk, guess it can
be committed right now, doesn't need to wait for the rest of the
metadirective patch set.
OK. I've tested the slightly cleaned-up version of the patch which is
attached; I'll pus
Fix typos in comments.
Signed-off-by: Andrew Kreimer
---
configure| 2 +-
configure.ac | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/configure b/configure
index e9583f2ba0c..6a77d454fd5 100755
--- a/configure
+++ b/configure
@@ -9086,7 +9086,7 @@ if test -d ${srcdir}
I see, I can reproduce this when build "-march=rv64gcv -mabi=lp64d -flto -O0
test.c -o test.elf".
#include
int
main ()
{
size_t vl = 8;
vint32m1_t vs1 = {};
vint32m1_t vs2 = {};
vint32m1_t vd = __riscv_vadd_vv_i32m1(vs1, vs2, vl);
return (int)&vd;
}
Pan
-Original Message-
F
The reason for PR116326 is that LRA and reload require different
ELIMINABLE_REGS for a multi-register frame pointer. As ELIMINABLE_REGS
is used to initialize static const objects, it is not possible to make
ELIMINABLE_REGS dependent on -mlra.
It was also concluded that it is not desirable to adj
Am Sonntag, dem 08.09.2024 um 02:09 -0700 schrieb Bill Wendling:
> On Fri, Sep 6, 2024 at 10:50 PM Martin Uecker wrote:
> >
> > Am Freitag, dem 06.09.2024 um 13:59 -0700 schrieb Bill Wendling:
> > > On Fri, Sep 6, 2024 at 12:32 PM Martin Uecker wrote:
> > > > > > >
...
> > > >
> > > > My reco
Am Sonntag, dem 08.09.2024 um 02:26 -0700 schrieb Bill Wendling:
> On Sat, Sep 7, 2024 at 12:21 AM Jakub Jelinek wrote:
> > On Sat, Sep 07, 2024 at 07:50:29AM +0200, Martin Uecker wrote:
> > > > 2. Apple's implementation supports expressions in the '__counted_by'
> > > > attribute, thus the 'cou
While I know the effect on x86-64 the following patch post is to trigger
CI for disabling non-SLP vectorization to look for arm/aarch64 and
risc-v specific failure modes.
* tree-vect-stmts.cc (vect_analyze_stmt): Fail vectorization
for non-SLP stmts.
---
gcc/tree-vect-stmts.cc | 4
On Fri, Sep 6, 2024 at 11:16 PM Martin Uecker wrote:
>
> Am Samstag, dem 07.09.2024 um 00:12 + schrieb Qing Zhao:
> > Now, if
> >
> > 1. __builtin_get_counted_by should return a LVALUE instead of a pointer
> > (required by CLANG’s design)
> > And
> > 2. It’s better not to change the behavior
On Fri, Sep 6, 2024 at 5:12 PM Qing Zhao wrote:
>
> Now, if
>
> 1. __builtin_get_counted_by should return a LVALUE instead of a pointer
> (required by CLANG’s design)
> And
> 2. It’s better not to change the behavior of __builtin_choose_expr.
>
> Then the solution left is:
>
> __builtin_get_count
On Fri, Sep 6, 2024 at 10:50 PM Martin Uecker wrote:
>
> Am Freitag, dem 06.09.2024 um 13:59 -0700 schrieb Bill Wendling:
> > On Fri, Sep 6, 2024 at 12:32 PM Martin Uecker wrote:
> > >
> > > Am Freitag, dem 06.09.2024 um 13:59 + schrieb Qing Zhao:
> > > >
> > > > > On Sep 5, 2024, at 18:22, B
On Fri, Sep 6, 2024 at 2:24 PM H.J. Lu wrote:
>
> Don't use temp for a PARALLEL BLKmode argument of an EXPR_LIST expression
> in a TImode register. Otherwise, the TImode variable will be put in
> the GPR save area which guarantees only 8-byte alignment.
>
> gcc/
>
> PR target/116621
>
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