RE: [PATCH v1] RISC-V: Add xfail test case for highest-number regno ternary overlap

Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Monday, April 22, 2024 2:40 PM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; Robin Dapp ; Li, Pan2 Subject: Re: [PATCH v1] RISC-V: Add xfail test case for highest-number regno ternary overlap LGTM.

Re: [PATCH v1] RISC-V: Add xfail test case for highest-number regno ternary overlap

LGTM. juzhe.zh...@rivai.ai From: pan2.li Date: 2024-04-22 14:35 To: gcc-patches CC: juzhe.zhong; kito.cheng; rdapp.gcc; Pan Li Subject: [PATCH v1] RISC-V: Add xfail test case for highest-number regno ternary overlap From: Pan Li We reverted below patch for register group overlap, add the r

[PATCH v1] RISC-V: Add xfail test case for highest-number regno ternary overlap

From: Pan Li We reverted below patch for register group overlap, add the related insn test and mark it as xfail. And we will remove the xfail after we support the register overlap in GCC-15. 27fde325d64 RISC-V: Support highest-number regno overlap for widen ternary The below test suites are pa

Re: [PATCH] s390: testsuite: Remove xfail for vpopct{b,h}

On 4/22/24 08:01, Stefan Schulze Frielinghaus wrote: > Starting with r14-9316-g7890836de20912 patterns for vpopct{b,h} are also > detected. Thus, remove xfails. > > gcc/testsuite/ChangeLog: > > * gcc.target/s390/vxe/popcount-1.c: Remove xfail. Ok. Thanks! Andreas > --- > Ok for mainlin

[PATCH] s390: testsuite: Fix forwprop-4{0,1}.c

The tests fail on s390 since can_vec_perm_const_p fails and therefore the bit insert/ref survive which r14-3381-g27de9aa152141e aims for. Strictly speaking, the tests only fail in case the target supports vectors, i.e., for targets prior z13 or in case of -mesa the emulated vector operations are op

RE: [PATCH v1] RISC-V: Add xfail test case for widening register overlap of vf4/vf8

Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Monday, April 22, 2024 11:49 AM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; Robin Dapp ; Li, Pan2 Subject: Re: [PATCH v1] RISC-V: Add xfail test case for widening register overlap of vf4/vf8 LGTM. ___

[PATCH] s390: testsuite: Remove xfail for vpopct{b,h}

Starting with r14-9316-g7890836de20912 patterns for vpopct{b,h} are also detected. Thus, remove xfails. gcc/testsuite/ChangeLog: * gcc.target/s390/vxe/popcount-1.c: Remove xfail. --- Ok for mainline? gcc/testsuite/gcc.target/s390/vxe/popcount-1.c | 4 ++-- 1 file changed, 2 insertions

Re: [PATCH v1] RISC-V: Add xfail test case for widening register overlap of vf4/vf8

LGTM. juzhe.zh...@rivai.ai From: pan2.li Date: 2024-04-22 11:19 To: gcc-patches CC: juzhe.zhong; kito.cheng; rdapp.gcc; Pan Li Subject: [PATCH v1] RISC-V: Add xfail test case for widening register overlap of vf4/vf8 From: Pan Li We reverted below patch for register group overlap, add the r

[PATCH v1] RISC-V: Add xfail test case for widening register overlap of vf4/vf8

From: Pan Li We reverted below patch for register group overlap, add the related insn test and mark it as xfail. And we will remove the xfail after we support the register overlap in GCC-15. 303195e2a6b RISC-V: Support widening register overlap for vf4/vf8 The below test suites are passed. * T

Re: [PATCH] c++: Check if allocation functions are xobj members [PR114078]

On Sat, 20 Apr 2024, Nathaniel Shead wrote: > Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? > > -- >8 -- > > A class allocation member function is implicitly 'static' by > [class.free] p3, so cannot have an explicit object parameter. > > PR c++/114078 > > gcc/cp/Change

Re: [PATCH] c++: Fix ICE with xobj parms and maybe incomplete decl-specifiers

> Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? > > -- >8 -- > > This fixes a null dereference issue when decl_specifiers.type is not yet > provided. > > gcc/cp/ChangeLog: > > * parser.cc (cp_parser_parameter_declaration): Check if > decl_specifiers.type is null.

[PATCH] add rlwinm pattern for DImode for constant building

Hi, 'rlwinm' pattern is already well used for SImode. As this instruction can touch the whole 64bit register, so some constants in 64bit(DImode) can be built via 'lis/li+rlwinm'. To achieve this, a new pattern for 'rlwinm' is added, and 'rs6000_emit_set_long_const' is updated to check if a const

Re: [pushed] c++/modules: make bits_in/out move-constructible

Hi Patrick, On Sat, 13 Apr 2024 at 22:12, Patrick Palka wrote: > > Pushed as obvious after verifying C++11 bootstrap is restored. I guess this also fixes the bootstrap_ubsan breakage on aarch64 reported by Linaro CI? See https://linaro.atlassian.net/browse/GNU-1199 (I think you also received a n

Re: [PATCH v1] RISC-V: Add xfail test case for highpart register overlap of vx/vf widen

LGTM juzhe.zh...@rivai.ai From: pan2.li Date: 2024-04-21 13:01 To: gcc-patches CC: juzhe.zhong; kito.cheng; rdapp.gcc; Pan Li Subject: [PATCH v1] RISC-V: Add xfail test case for highpart register overlap of vx/vf widen From: Pan Li We reverted below patch for register group overlap, add th

[patch,avr,applied] PR114794 - Tweak divmodqi4

Instead of jumping to a place that ROLs r_arg1 (with C=0), LSL r_arg1 can be performed prior to the loop. This reduces the number of loopings from 9 to 8. Applied as obvious. Johann AVR: target/114794 - Tweak __udivmodqi4 libgcc/ PR target/114794 * config/avr/lib1funcs.S (__ud

[PATCH, aarch64] v2: Preparatory patch to place target independent and,dependent changed code in one file

Hello Alex/Richard: All review comments are addressed and changes are made to transform_for_base function as per consensus. Common infrastructure of load store pair fusion is divided into target independent and target dependent changed code. Target independent code is the Generic code with pure