The following adjusts the tree.def documentation about VEC_PERM_EXPR
which wasn't adjusted when the restrictions of permutes with constant
mask were relaxed.
OK?
Thanks,
Richard.
PR middle-end/110541
* tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
reality.
---
Hi,
If a loop is unrolled by n times during vectoriation, two steps are used to
calculate the induction variable:
- The small step for the unrolled ith-copy: vec_1 = vec_iv + (VF/n * Step)
- The large step for the whole loop: vec_loop = vec_iv + (VF * Step)
This patch calculates an extra vec_
Tested x86_64-linux. Pushed to trunk.
-- >8 --
These tests fail with -std=gnu++98/-D_GLIBCXX_DEBUG in the runtest
flags. They should require the c++11 effective target.
libstdc++-v3/ChangeLog:
* testsuite/23_containers/forward_list/debug/iterator1_neg.cc:
Skip as UNSUPPORTED for
This is a weird one as described in the PR. GCC doesn't complain about
this bug, but seems to have a bogus error elsewhere. I'll add a testcase
once I've understood/fixed the GCC error.
Tested x86_64-linux. Pushed to trunk.
-- >8 --
libstdc++-v3/ChangeLog:
PR libstdc++/110542
*
Tested x86_64-linux. Pushed to trunk.
-- >8 --
Similar to r14-2052-gdd2eb972a5b063, replace the try-block with RAII
types for deallocating storage and destroying elements.
libstdc++-v3/ChangeLog:
* include/bits/vector.tcc (_M_default_append): Replace try-block
with RAII types.
-
Tested x86_64-linux. Pushed to trunk.
-- >8 --
This is needed by Clang 15.
libstdc++-v3/ChangeLog:
* include/bits/iterator_concepts.h (projected): Add typename.
---
libstdc++-v3/include/bits/iterator_concepts.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libstdc
On Tue, Jul 4, 2023 at 5:59 PM Thomas Schwinge wrote:
>
> Hi!
>
> On 2013-01-24T10:14:58-0500, Diego Novillo wrote:
> > [...] the patch [...] committed [...]
>
> This did clean up some things:
>
> > --- a/gcc/ggc-internal.h
> > +++ b/gcc/ggc-internal.h
> > @@ -55,8 +55,7 @@ extern struct ggc_pch_
Hi Richard/Andrew!
Richard Biener writes:
> On Thu, 29 Jun 2023, Jiufu Guo wrote:
>
>>
>> Hi,
>>
>> Jiufu Guo writes:
>>
>> > Hi,
>> >
>> > Integer expression "(X - N * M) / N" can be optimized to "X / N - M" if
>> > there is no wrap/overflow/underflow and "X - N * M" has the same sign
>>
Hi,
This patch skips redundant vector extract insn to be generated when
the extracted element is the first element of dword0 and the destination
is a memory operand. Only one 'stxsi[hb]x' instruction is enough.
The V4SImode is fixed in a previous patch.
https://gcc.gnu.org/pipermail/gcc-patche
LGTM.
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-07-04 20:26
To: gcc-patches
CC: juzhe.zhong; rdapp.gcc; jeffreyalaw; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Use FRM_DYN when add the rounding mode operand
From: Pan Li
This patch would like to take FRM_DYN const rtx
Jie Mei 于2023年7月4日周二 17:52写道：
>
> A mips16e2 related test fails after the ifcvt change. The mips16e2
> addition also causes a test for unrelated module to fail.
>
> This patch adjusts branch costs when running the two affected tests.
>
> These tests should not require the -mbranch-cost option, and
On Wed, Jul 5, 2023 at 2:25 AM simonaytes.yan--- via Gcc-patches
wrote:
>
> PR target/110438 requests to emit PXOR before VPTERNLOG. This patch
> implements that.
I prefer using UNSPEC_INSN_FALSE_DEP like we did for lzcnt/tzcnt/popcnt.
i.e.
18866; False dependency happens when destination is onl
> -Original Message-
> From: Jan Beulich
> Sent: Tuesday, July 4, 2023 11:30 PM
> To: Hongtao Liu
> Cc: gcc-patches@gcc.gnu.org; Kirill Yukhin ; Liu,
> Hongtao
> Subject: Re: [PATCH v3] x86: make VPTERNLOG* usable on less than 512-bit
> operands with just AVX512F
>
> On 27.06.2023 07:
On Linux/x86_64,
0682a32c026f1e246eb07bb8066abca4636f01d8 is the first bad commit
commit 0682a32c026f1e246eb07bb8066abca4636f01d8
Author: Richard Biener
Date: Mon Jul 3 13:59:33 2023 +0200
tree-optimization/110310 - move vector epilogue disabling to analysis phase
caused
FAIL: gcc.dg/vec
On Tue, Jul 4, 2023 at 11:50 AM Thomas Schwinge wrote:
>
> Hi!
>
> I came across this one here on my way working through another (somewhat
> related) GTY issue. I generally do understand the issue here, but do
> have a question about 'unsigned int len' field in
> 'libcpp/include/symtab.h:struct h
Richard Biener writes:
> On Thu, 29 Jun 2023, Richard Biener wrote:
>
>> On Thu, 29 Jun 2023, Richard Sandiford wrote:
>>
>> > Richard Biener writes:
>> > > With applying loop masking to epilogues on x86_64 AVX512 we see
>> > > some significant performance regressions when evaluating SPEC CPU 20
Le 04/07/2023 à 21:00, Harald Anlauf a écrit :
Hi Mikael, all,
I think I've found it: there is a call to gfc_conv_class_to_class
that - according to a comment - does a repackaging to a class array.
Deferring that repackaging along with the deallocation not only fixes
the regression, but also the
> Kito (or somebody else), would you mind doing a RISC-V bootstrap? It would
> take forever on my machine. Thank you.
I did a bootstrap myself now and it finally finished. Going to commit the
attached tomorrow.
Regards
Robin
Subject: [PATCH] Change MODE_BITSIZE to MODE_PRECISION for MODE_VECT
Hi Mikael, all,
I think I've found it: there is a call to gfc_conv_class_to_class
that - according to a comment - does a repackaging to a class array.
Deferring that repackaging along with the deallocation not only fixes
the regression, but also the cases I tested.
Attached is a "sneak preview",
Hi Richard,
changed the patch according to your comments and I agree that
it is more readable that way. I hope using lhs as target for
the extract directly is possible the way I did it. Richard's
patch for aarch64 is already, therefore testsuites on aarch64 and
i386 are unchanged.
Regards
Robi
PR target/110438 requests to emit PXOR before VPTERNLOG. This patch
implements that.From 815779936d0ca213b4c9ec798ed6acf8179fc2e7 Mon Sep 17 00:00:00 2001
From: Yan Simonaytes
Date: Tue, 4 Jul 2023 21:11:04 +0300
Subject: [PATCH] Generating all-ones zmm needs dep-breaking pxor before
ternlog
P
From: benjamin priour
Script contrib/check_GNU_style.sh complains about there being a space
before a left square bracket ("operator new []").
Though, it is actually within a literal string, and the space
is required to correctly detect the function.
Succesfully regstrapped on x86_64-linux-gnu
Hi!
On 2013-01-24T10:14:58-0500, Diego Novillo wrote:
> [...] the patch [...] committed [...]
This did clean up some things:
> --- a/gcc/ggc-internal.h
> +++ b/gcc/ggc-internal.h
> @@ -55,8 +55,7 @@ extern struct ggc_pch_data *init_ggc_pch (void);
> of an object. Update the ggc_pch_data st
On Tue, Jul 04, 2023 at 11:26:26AM +0200, Mikael Morin wrote:
> Le 04/07/2023 à 01:56, Steve Kargl a écrit :
> > On Mon, Jul 03, 2023 at 10:49:36PM +0200, Harald Anlauf via Fortran wrote:
> > >
> > > Indeed, this is a nice demonstration.
> > >
> > > While playing, I was wondering whether the foll
Hi!
I came across this one here on my way working through another (somewhat
related) GTY issue. I generally do understand the issue here, but do
have a question about 'unsigned int len' field in
'libcpp/include/symtab.h:struct ht_identifier':
On 2022-10-18T18:14:54-0400, Lewis Hyatt via Gcc-patc
Hi Jakub!
On 2023-06-30T18:37:59+0200, Jakub Jelinek wrote:
> On Fri, Jun 30, 2023 at 08:45:38PM +0800, Kito Cheng wrote:
>> Hmmm, I think maybe what we need is to leverage C++ language features
>> to declare enum with underlying types like that:
>>
>> enum machine_mode : uint16_t
>
> What would
On Mon, Jul 3, 2023 at 5:57 PM Takayuki 'January June' Suwa
wrote:
>
> gcc/ChangeLog:
>
> * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
> Change to use HARD_REG_BIT and its macros.
> * config/xtensa/xtensa.md
> (peephole2: regmove elimination
On 27.06.2023 07:11, Hongtao Liu wrote:
> On Tue, Jun 20, 2023 at 5:34 PM Hongtao Liu wrote:
>>
>> On Tue, Jun 20, 2023 at 5:03 PM Jan Beulich wrote:
>>>
>>> On 20.06.2023 10:33, Hongtao Liu wrote:
On Tue, Jun 20, 2023 at 3:07 PM Jan Beulich via Gcc-patches
wrote:
>
> I guess t
> On Wed, 28 Jun 2023, Tamar Christina wrote:
>
> > Hi All,
> >
> > There's an existing bug in loop frequency scaling where the if statement
> > checks
> > to see if there's a single exit, and records an dump file note but then
> > continues.
> >
> > It then tries to access the null pointer, wh
> The mod-subtract optimization with ncounts==1 produced incorrect edge
> probabilities due to incorrect conditional probability calculation. This
> patch fixes the calculation.
>
> gcc/ChangeLog:
>
> * value-prof.cc (gimple_mod_subtract_transform): Correct edge
> prob calculation.
On Mon, Jul 3, 2023 at 12:12 PM Robin Dapp wrote:
>
> Hi Manolis,
>
> that looks like a nice enhancement of what's already possible. The concern
> I had some years back already was that this function would eventually
> grow and cannibalize on some of what the other functions in ifcvt already
> do
From: Pan Li
This patch would like to fix one bug to align below items of spec.
1. By default, the RVV floating-point will take dyn mode.
2. DYN is invalid in FRM register for RVV floating-point.
When mode switching the function entry and exit, it will take DYN as
the frm mode.
Signed-off-by:
On Thu, 29 Jun 2023, Richard Biener wrote:
> On Thu, 29 Jun 2023, Richard Sandiford wrote:
>
> > Richard Biener writes:
> > > With applying loop masking to epilogues on x86_64 AVX512 we see
> > > some significant performance regressions when evaluating SPEC CPU 2017
> > > that are caused by stor
Le 03/07/2023 à 22:49, Harald Anlauf a écrit :
Hi Mikael,
Am 03.07.23 um 13:46 schrieb Mikael Morin:
These look good, but I'm surprised that there is no similar change at
the 6819 line.
This is the class array actual vs class array dummy case.
It seems to be checked by the "bar" subroutine in y
Yes, thanks Robin, we can move to another mail thread for this, avoiding
misleading.
Pan
-Original Message-
From: Robin Dapp
Sent: Tuesday, July 4, 2023 9:15 PM
To: Li, Pan2 ; juzhe.zh...@rivai.ai; gcc-patches
Cc: rdapp@gmail.com; jeffreyalaw ; Wang, Yanzhang
; kito.cheng
Subje
Hi Robin,
Thanks for reviewing, sorry for my silly mistakes in the original patch, CIL.
> Here you are referring to 10.1 in the spec I assume. Could we add this as a
> comment in the code?
Sure, from the spec rvv 1.0, aka "All standard vector floating-point arithmetic
operations follow the IE
> Just revert this patch, it reports some weird illegal instr, I may
> need more time for this.
The illegal instruction is due to the wrong rounding mode. We set
5 instead of 7 because the two enums don't match. A simple but ugly
fix would be two dummy entries so that FRM_MODE_DYN is entry 7 in
Sorry for I made a mistake in V4:
+ if (final_len && final_len)
It should be
+ if (final_len && final_mask)
I fixed it on V5 patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/623589.html
Thanks.
juzhe.zh...@rivai.ai
From: juzhe.zhong
Date: 2023-07-04
From: Ju-Zhe Zhong
Hi, Richard and Richi.
Address comments from Richi.
Make gs_info.ifn = LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE.
I have fully tested these 4 format:
length = vf is a dummpy length,
mask = {-1,-1, ... } is a dummy mask.
1. no length, no mask
LEN_MASK_GATHER_LOAD (...,
Hi Pan,
in general this looks good to me. I would have expected the
change in the other patch I just looked at though ;) Sure
it's intrinsics this time but the same principle.
Regards
Robin
Hi Pan,
I only just now got back to my mails and I'm a bit confused about
the several patches related to rounding mode.
> 1. By default, the RVV floating-point will take dyn mode.
Here you are referring to 10.1 in the spec I assume. Could we
add this as a comment in the code?
> 2. DYN is inval
From: Ju-Zhe Zhong
Hi, Richard and Richi.
Address comments from Richi.
Make gs_info.ifn = LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE.
I have fully tested these 4 format:
length = vf is a dummpy length,
mask = {-1,-1, ... } is a dummy mask.
1. no length, no mask
LEN_MASK_GATHER_LOAD (...,
Thanks Richard for reviewing.
Hi Thomas,
Looks Richard approved the V4 version of Streamer, could you please help to
install it? Or I can help if you are in the middle of something.
Thanks again for testing and fixing this issue entirely.
Pan
-Original Message-
From: Richard Biener
From: Pan Li
This patch would like to take FRM_DYN const rtx as the rounding mode
operand according to the RVV spec, which takes the dyn as the only
rounding mode for floating-point.
Signed-off-by: Pan Li
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.cc
(function_expande
The following makes sure to not make conditional undefs in PHI arguments
unconditional by folding cond ? arg1 : arg2.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
This might become redundant with the pending fix to reset
flow-sensitive info.
Richard.
PR tree-optimization
On Tue, 4 Jul 2023, juzhe.zh...@rivai.ai wrote:
> Hi, Richi.
>
> For GATHER_LOAD which doesn't have len and mask.
>
> Should I keep it as gather_load, then I support both gather_load and
> len_mask_gather_load ?
>
> Or I should normalize it into len_mask_gather_load with length = vf and
> mas
On Wed, 28 Jun 2023, Tamar Christina wrote:
> Hi All,
>
> expand_vector_piecewise does not support VLA expansion as it has a hard assert
> on the type not being VLA.
>
> Instead of just failing to expand and so the call marked unsupported we ICE.
> This adjust it so we don't and can gracefully h
On Wed, 28 Jun 2023, Tamar Christina wrote:
> Hi All,
>
> The bitfield vectorization support does not currently recognize bitfields
> inside
> gconds. This means they can't be used as conditions for early break
> vectorization which is a functionality we require.
>
> This adds support for them
On Wed, 28 Jun 2023, Tamar Christina wrote:
> Hi All,
>
> There's an existing bug in loop frequency scaling where the if statement
> checks
> to see if there's a single exit, and records an dump file note but then
> continues.
>
> It then tries to access the null pointer, which of course fails.
Hi, Richi.
For GATHER_LOAD which doesn't have len and mask.
Should I keep it as gather_load, then I support both gather_load and
len_mask_gather_load ?
Or I should normalize it into len_mask_gather_load with length = vf and mask =
{1,1,1,1,1,...}, then
I only need to support len_mask_gather_lo
On Wed, 28 Jun 2023, Tamar Christina wrote:
> Hi,
>
> With the patch enabling the vectorization of early-breaks, we'd like to allow
> bitfield lowering in such loops, which requires the relaxation of allowing
> multiple exits when doing so. In order to avoid a similar issue to PR107275,
> the co
On Thu, 29 Jun 2023, Jiufu Guo wrote:
>
> Hi,
>
> Jiufu Guo writes:
>
> > Hi,
> >
> > Integer expression "(X - N * M) / N" can be optimized to "X / N - M" if
> > there is no wrap/overflow/underflow and "X - N * M" has the same sign
> > with "X".
> >
> > Compare with the previous version:
> > h
On Fri, 30 Jun 2023, Thomas Schwinge wrote:
> Hi!
>
> On 2023-06-30T01:39:39+, "Li, Pan2" wrote:
> > That?s very cool, thanks Thomas for help!
>
> :-)
>
> > Let?s wait the AMD test running result for the final version of the patch.
>
> That's all looking good, too.
>
> > From: juzhe.zh..
On Tue, 4 Jul 2023, juzhe.zh...@rivai.ai wrote:
> Hi, Richi.
>
> >> Eh, it's obvious that we should have the "vectorized" form
> >> also in the 'scalar' variant. If you think there's no reasonable
> >> way to add a value for len or bias then instead re-order the
> >> arguments so 'mask' comes fi
Hi, Richi.
>> Eh, it's obvious that we should have the "vectorized" form
>> also in the 'scalar' variant. If you think there's no reasonable
>> way to add a value for len or bias then instead re-order the
>> arguments so 'mask' comes first and the len/bias pair last.
I found this patch is buggy
On Tue, 4 Jul 2023, juzhe.zh...@rivai.ai wrote:
> From: Ju-Zhe Zhong
>
> Hi, Richard and Richi.
>
> Address comments from Richard.
>
> Make gs_info.ifn = LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE.
>
> Since:
> /* LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE are different
>on argu
The following removes an unnecessary check.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
* tree-vect-loop.cc (vect_analyze_loop_costing): Remove
check guarding scalar_niter underflow.
---
gcc/tree-vect-loop.cc | 7 ---
1 file changed, 7 deletions(-)
diff --gi
The following removes gimple_uses_undefined_value_p and instead
uses the conservative mark_ssa_maybe_undefs in PHI-OPT, the last
user of the other API.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
* tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
(empty
This is a new testcase for the fixed bug.
Tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization/110376
* gcc.dg/torture/pr110376.c: New testcase.
---
gcc/testsuite/gcc.dg/torture/pr110376.c | 39 +
1 file changed, 39 insertions(+)
create mode 1
Oh. Sorry for incorrect typo in commit log.
>> Address comments from Richard.
Change it into "Address comments from Richi." :).
Thanks.
juzhe.zh...@rivai.ai
From: juzhe.zhong
Date: 2023-07-04 17:54
To: gcc-patches
CC: richard.sandiford; rguenther; Ju-Zhe Zhong
Subject: [PATCH V3] VECT: Apply
Hi, Richi.
Thanks so much. I have addressed comments and sent V3 patch:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/623566.html
Thanks.
juzhe.zh...@rivai.ai
From: Richard Biener
Date: 2023-07-04 17:27
To: Ju-Zhe Zhong
CC: gcc-patches; richard.sandiford
Subject: Re: [PATCH V2] VECT: A
From: Ju-Zhe Zhong
Hi, Richard and Richi.
Address comments from Richard.
Make gs_info.ifn = LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE.
Since:
/* LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE are different
on arguments before and after vectorized.
Before vectorized:
A mips16e2 related test fails after the ifcvt change. The mips16e2
addition also causes a test for unrelated module to fail.
This patch adjusts branch costs when running the two affected tests.
These tests should not require the -mbranch-cost option, and
this issue needs to be addressed.
gcc/tes
On Tue, 4 Jul 2023, juzhe.zh...@rivai.ai wrote:
> From: Ju-Zhe Zhong
>
> Hi, Richard and Richi.
>
> The len_mask_gather_load/len_mask_scatter_store patterns have been added.
> Now, this patch applies them into vectorizer.
>
> Here is the example:
>
> void
> f (int *restrict a,
>int *restr
Le 04/07/2023 à 01:56, Steve Kargl a écrit :
On Mon, Jul 03, 2023 at 10:49:36PM +0200, Harald Anlauf via Fortran wrote:
Indeed, this is a nice demonstration.
While playing, I was wondering whether the following code is conforming:
program p
call s ((1))
contains
subroutine s (x)
in
The following replaces the simplistic gimple_uses_undefined_value_p
with the conservative mark_ssa_maybe_undefs approach as already
used by LIM and IVOPTs. This is to avoid exposing an unconditional
uninitialized read on a path from entry by if-combine.
Boostrapped and tested on x86_64-unknown-li
On Tue, Jul 4, 2023 at 10:51 AM Hao Liu OS via Gcc-patches
wrote:
>
> slp_done_for_suggested_uf is used in vect_analyze_loop_2 without
> initialization, which is undefined behavior. Initialize it to false
> according to the discussion.
OK
> gcc/ChangeLog:
> PR tree-optimization/110531
>
On Sat, Jul 1, 2023 at 10:23 AM Andrew Pinski via Gcc-patches
wrote:
>
> The problem here is we might produce some values out of the type's
> min/max (and/or valid values, e.g. signed booleans). The fix is to
> use an integer type which has the same precision and signedness
> as the original type.
On Tue, Jul 4, 2023 at 10:32 AM Hongyu Wang wrote:
>
> > In a follow-up patch, can you please document inlining rules involving
> > -march and -mtune to "x86 Function Attributes" section? Currently, the
> > inlining rules at the end of "target function attribute" section does
> > not even mention
LGTM.
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-07-04 16:08
To: gcc-patches
CC: juzhe.zhong; rdapp.gcc; jeffreyalaw; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v2] RISC-V: Fix one bug for floating-point static frm
From: Pan Li
This patch would like to fix one bug to align below
slp_done_for_suggested_uf is used in vect_analyze_loop_2 without
initialization, which is undefined behavior. Initialize it to false
according to the discussion.
gcc/ChangeLog:
PR tree-optimization/110531
* tree-vect-loop.cc (vect_analyze_loop_1): initialize
slp_done_for_s
I prefer to defer this patch when you implementing dynamic rounding mode.
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-07-04 16:41
To: gcc-patches
CC: juzhe.zhong; rdapp.gcc; jeffreyalaw; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Refine the insn pattern of fsrm
From: Pan
> -Original Message-
> From: Hongtao Liu
> Sent: Tuesday, July 4, 2023 4:27 PM
> To: Cui, Lili
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] x86: Enable ENQCMD and UINTR for march=sierraforest.
>
> On Tue, Jul 4, 2023 at 4:15 PM Cui, Lili wrote:
> >
> > From: Lili Cui
> >
> >
From: Pan Li
This patch would like to introduce 2 new patter of fsrm with SImode, aka:
1. fsrmsi_backup
2. fsrmsi_restore
Both patterns accept the imm and reg format, and then leverage the imm
format instead of reg when RVV floating-point static rounding mode.
Signed-off-by: Pan Li
gcc/Chang
When we compute liveness and relevantness we have to make sure to
handle live but not relevant stmts in a way we can later vectorize
them. When the stmt uses only operands that do not need vectorization
we can just leave such stmts in place - but not in the case they
are recognized as patterns. S
On Tue, 4 Jul 2023, Richard Sandiford wrote:
> Richard Biener writes:
> > On Tue, 4 Jul 2023, Richard Biener wrote:
> >
> >> On Mon, 3 Jul 2023, Richard Sandiford wrote:
> >>
> >> > Richard Biener writes:
> >> > > The following removes late deciding to elide vectorized epilogues to
> >> > > the
> In a follow-up patch, can you please document inlining rules involving
> -march and -mtune to "x86 Function Attributes" section? Currently, the
> inlining rules at the end of "target function attribute" section does
> not even mention -march and -mtune. Maybe a subsubsection "Inlining
> rules" sh
On Tue, Jul 4, 2023 at 4:15 PM Cui, Lili wrote:
>
> From: Lili Cui
>
> Hi Maintainer,
>
> This patch is to enable ENQCMD and UINTR for march=sierraforest according to
> Intel ISE.
>
> Bootstrapped and regtested. Ok for trunk? And I will backport this patch to
> GCC13.
Ok.
>
> Thanks,
> Lili.
>
From: Lili Cui
Hi Maintainer,
This patch is to enable ENQCMD and UINTR for march=sierraforest according to
Intel ISE.
Bootstrapped and regtested. Ok for trunk? And I will backport this patch to
GCC13.
Thanks,
Lili.
Enable ENQCMD and UINTR for march=sierraforest according to Intel ISE
https:
Update PATCH V2 for DYN in needed as below.
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/623543.html
Pan
From: Li, Pan2
Sent: Tuesday, July 4, 2023 2:50 PM
To: juzhe.zh...@rivai.ai; gcc-patches
Cc: Robin Dapp ; jeffreyalaw ;
Wang, Yanzhang ; kito.cheng
Subject: RE: [PATCH v1] RISC-V: F
From: Eric Botcazou
This relaxes the condition under which Expand_Assign_Array leaves the
assignment to or from an array slice untouched. The main prerequisite
for the code generator is that everything be aligned on byte boundaries
and Is_Possibly_Unaligned_Slice is too strong a predicate for th
From: Eric Botcazou
The procedure is not stable under repeated invocation. Now it may be called
twice on the same node, for example during the expansion of the renaming of
the predefined equality operator after the unchecked union type is frozen.
gcc/ada/
* exp_ch4.ads (Expand_Unchecke
From: Yannick Moy
The query Inherited_Subprograms was returning a list containing
some subprograms whose overridding was also in the list, when
interfaces was present. This was an issue for GNATprove. Now propose
a mode for this function to filter out overridden primitives.
gcc/ada/
* s
From: Pan Li
This patch would like to fix one bug to align below items of spec.
1. By default, the RVV floating-point will take dyn mode.
2. DYN is invalid in FRM register for RVV floating-point.
When mode switching the function entry and exit, it will take DYN as
the frm mode.
Signed-off-by:
Richard Biener writes:
> On Tue, 4 Jul 2023, Richard Biener wrote:
>
>> On Mon, 3 Jul 2023, Richard Sandiford wrote:
>>
>> > Richard Biener writes:
>> > > The following removes late deciding to elide vectorized epilogues to
>> > > the analysis phase and also avoids altering the epilogues niter.
From: Ju-Zhe Zhong
Hi, Richard and Richi.
The len_mask_gather_load/len_mask_scatter_store patterns have been added.
Now, this patch applies them into vectorizer.
Here is the example:
void
f (int *restrict a,
int *restrict b, int n,
int base, int step,
int *restrict cond)
{
for (int
On Tue, 4 Jul 2023, Richard Biener wrote:
> On Mon, 3 Jul 2023, Andre Vieira (lists) wrote:
>
> > Hi,
> >
> > This patch makes the vectorizer treat any vector widening IFN as simple,
> > like
> > it did with the tree codes VEC_WIDEN_*.
> >
> > I wasn't sure whether I should make all IFN's simp
On Mon, 3 Jul 2023, Andre Vieira (lists) wrote:
> Hi,
>
> This patch makes the vectorizer treat any vector widening IFN as simple, like
> it did with the tree codes VEC_WIDEN_*.
>
> I wasn't sure whether I should make all IFN's simple and then exclude some
> (like GOMP_ ones), or include more th
On Tue, 4 Jul 2023, Richard Biener wrote:
> On Mon, 3 Jul 2023, Richard Sandiford wrote:
>
> > Richard Biener writes:
> > > The following removes late deciding to elide vectorized epilogues to
> > > the analysis phase and also avoids altering the epilogues niter.
> > > The costing part from vect
When trying to associate (v + INT_MAX) + INT_MAX we are using
the TREE_OVERFLOW bit to check for correctness. That isn't
working for VECTOR_CSTs and it can't in general when one considers
VL vectors. It looks like it should work for COMPLEX_CSTs but
I didn't try to single out _Complex int in this
On Mon, 3 Jul 2023, Richard Sandiford wrote:
> Richard Biener writes:
> > The following removes late deciding to elide vectorized epilogues to
> > the analysis phase and also avoids altering the epilogues niter.
> > The costing part from vect_determine_partial_vectors_and_peeling is
> > moved to
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