[PATCH] LoongArch: Pass cache information to optimizer

Currently our cache information from -mtune is not really used, pass it to the optimizer so it will be really in-effect. gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_option_override_internal): Set the corresponding params for L1D cache line size, L1D cache siz

[PATCH] Optimize nested permutation to single VEC_PERM_EXPR [PR54346]

This patch implemented the optimization in PR 54346, which Merges c = VEC_PERM_EXPR ; d = VEC_PERM_EXPR ; to d = VEC_PERM_EXPR ; Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,} tree-ssa/forwprop-19.c fail to pass but I'm not

Re: [PATCH V3] rs6000: cannot_force_const_mem for HIGH code rtx[PR106460]

Hi Jeff, on 2022/9/7 15:08, Jiufu Guo via Gcc-patches wrote: > Hi, > > As the issue in PR106460, a rtx 'high:DI (symbol_ref:DI ("var_48")' is tried > to store into constant pool and ICE occur. But actually, this rtx represents > partial address and can not be put into a .rodata section. > > Thi

Re: [PATCH 2/2] var-tracking: Add entry values up to max register mode

Ping. On Wed, Sep 07, 2022 at 04:20:26PM +0200, Stefan Schulze Frielinghaus wrote: > For parameter of type integer which do not consume a whole register > (modulo sign/zero extension) this patch adds entry values up to maximal > register mode. > > gcc/ChangeLog: > > * var-tracking.cc (vt_a

Re: [PATCH 1/2] cselib: Keep track of further subvalue relations

Ping. On Wed, Sep 07, 2022 at 04:20:25PM +0200, Stefan Schulze Frielinghaus wrote: > Whenever a new cselib value is created check whether a smaller value > exists which is contained in the bigger one. If so add a subreg > relation to locs of the smaller one. > > gcc/ChangeLog: > > * cseli

Re: [PATCH v6, rs6000] Implemented f[min/max]_optab by xs[min/max]dp [PR103605]

Hi Segher, on 2022/9/22 22:05, Segher Boessenkool wrote: > Hi! > > On Thu, Sep 22, 2022 at 10:28:23AM +0800, Kewen.Lin wrote: >> on 2022/9/22 05:56, Segher Boessenkool wrote: >>> On Fri, Jun 24, 2022 at 10:02:19AM +0800, HAO CHEN GUI wrote: >>> In the other direction I am worried that the unspecs

Re: [PATCH] rs6000: Fix the condition with frame_pointer_needed_indeed [PR96072]

Hi Segher, Thanks for the comments! on 2022/9/23 06:13, Segher Boessenkool wrote: > Hi! > > On Thu, Sep 22, 2022 at 09:41:42AM +0800, Kewen.Lin wrote: >> * config/rs6000/rs6000-logue.cc (rs6000_emit_epilogue): Update the >> condition for adding REG_CFA_DEF_CFA reg note with >> fra

Re: [PATCH] rs6000: Fix condition of define_expand vec_shr_ [PR100645]

Hi Segher, Thanks for the comments! on 2022/9/23 05:39, Segher Boessenkool wrote: > Hi! > > Heh, I first thought I had mistyped thgew PR #, but it is this one after > all :-) > > On Thu, Sep 22, 2022 at 09:41:34AM +0800, Kewen.Lin wrote: >> PR100645 exposes one latent bug in define_expand vec_s

Re: [PATCH] LoongArch: Libvtv add LoongArch support.

On Mon, 2022-09-26 at 10:00 +0800, Lulu Cheng wrote: > Co-Authored-By: qijingwen > > include/ChangeLog: > > * vtv-change-permission.h (defined): > (VTV_PAGE_SIZE): 16k pages under loongarch64. We have 4KB, 16KB, and 64KB page configurations, so is it possible to support all of t

RE: [PATCH] testsuite: Fix up avx256-unaligned-store-3.c test.

> -Original Message- > From: Hu, Lin1 > Sent: Monday, September 26, 2022 1:20 PM > To: gcc-patches@gcc.gnu.org > Cc: Liu, Hongtao ; ubiz...@gmail.com > Subject: [PATCH] testsuite: Fix up avx256-unaligned-store-3.c test. > > Hi all, > > This patch aims to fix a problem that avx256-unal

[PATCH] testsuite: Fix up avx256-unaligned-store-3.c test.

Hi all, This patch aims to fix a problem that avx256-unaligned-store-3.c test reports two unexpected fails under "-march=cascadelake". Regtested on x86_64-pc-linux-gnu. Ok for trunk? BRs, Lin gcc/testsuite/ChangeLog: PR target/94962 * gcc.target/i386/avx256-unaligned-store-3.c

RE: [PATCH 1/2]middle-end Fold BIT_FIELD_REF and Shifts into BIT_FIELD_REFs alone

> -Original Message- > From: Andrew Pinski > Sent: Saturday, September 24, 2022 8:57 PM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; rguent...@suse.de > Subject: Re: [PATCH 1/2]middle-end Fold BIT_FIELD_REF and Shifts into > BIT_FIELD_REFs alone > > On Fri, Sep 23, 2022 at 4

[PATCH v7, rs6000] Implemented f[min/max]_optab by xs[min/max]dp [PR103605]

Hi, This patch implements optab f[min/max]_optab by xs[min/max]dp on rs6000. Tests show that outputs of xs[min/max]dp are consistent with the standard of C99 fmin/max. This patch also binds __builtin_vsx_xs[min/max]dp to fmin/max instead of smin/max when fast-math is not set. While fast-math i

[PATCH] [x86] Support 2-instruction vector shuffle for V4SI/V4SF in ix86_expand_vec_perm_const_1.

>Missing space before ( Changed. >> + /* shufps. */ >> + ok = expand_vselect_vconcat(tmp, d->op0, d->op1, >> + perm1, d->nelt, false); > >Ditto. Changed. > >> + /* When lone_idx is not 0, it must from second op(count == 1). */ >> + gcc_assert ((lo

[PATCH] LoongArch: Libitm add LoongArch support.

Co-Authored-By: Yang Yujie libitm/ChangeLog: * configure.tgt: Add loongarch support. * config/loongarch/asm.h: New file. * config/loongarch/sjlj.S: New file. * config/loongarch/target.h: New file. --- libitm/config/loongarch/asm.h| 54 + libitm/c

[PATCH] LoongArch: Libvtv add LoongArch support.

Co-Authored-By: qijingwen include/ChangeLog: * vtv-change-permission.h (defined): (VTV_PAGE_SIZE): 16k pages under loongarch64. libvtv/ChangeLog: * configure.tgt: Add loongarch support. --- include/vtv-change-permission.h | 2 ++ libvtv/configure.tgt| 3 +++

Proxy ping [PATCH] Fortran: Fix ICE and wrong code for assumed-rank arrays [PR100029, PR100040]

Dear all, the patch for these PRs was submitted for review by Jose here: https://gcc.gnu.org/pipermail/fortran/2021-April/055924.html but unfortunately was never reviewed. I verified that the rebased patch still works on mainline and x86_64-pc-linux-gnu, and I think that it is fine. It is al

[RFA] Minor improvement to coremark, avoid unconditional jump to return

This is a minor improvement for the core_list_find routine in coremark. Basically for riscv, and likely other targets, we can end up with an unconditional jump to a return statement.    This is a result of compensation code created by bb-reorder, and no jump optimization pass runs after bb-re

Re: [PATCH] mips: Add appropriate linker flags when compiling with -static-pie

Hello, I'm just checking to see if anyone has had a chance to look at this. Thank you On Wed, Sep 14, 2022 at 2:09 PM linted wrote: > Hello, > > This patch fixes missing flags when compiling with -static-pie on mips. I > made these modifications based on the previously submitted static pie patc

Re: [PATCH] Avoid depending on destructor order

On 9/25/22 00:29, Iain Sandoe wrote: On 23 Sep 2022, at 15:30, David Edelsohn via Gcc-patches wrote: On Fri, Sep 23, 2022 at 10:12 AM Thomas Neumann wrote: +static const bool in_shutdown = false; I'll let Jason or others decide if this is the right solution. It seems that in_shutd

Re: [PATCH v2 0/9] fortran: clobber fixes [PR41453]

Le 23/09/2022 à 09:54, Mikael Morin a écrit : Le 22/09/2022 à 22:42, Harald Anlauf via Fortran a écrit : I was wondering if you could add a test for the change in patch 7 addressing the clobber generation for an associate-name, e.g. by adding to testcase intent_optimize_7.f90 near the end:    a

[PATCH] LoongArch: Add prefetch instruction

The test pr106397.c fails on LoongArch because we don't have defined prefetch instruction. We can silence the test for LoongArch, but it's not too difficult to add the prefetch instruction so add it now. -- >8 -- gcc/ChangeLog: * config/loongarch/constraints.md (ZD): New address constra