Re: [EXTERNAL] [PATCH] contrib: modernize gen_autofdo_event.py

2022-08-05 Thread Andi Kleen via Gcc-patches
On 8/6/2022 1:07 AM, Eugene Rozenfeld wrote: The changes look good to me. Also adding Andi, the author of the script. Looks all good to me too. -Andi

[committed] New warning: -Wanalyzer-jump-through-null [PR105947]

2022-08-05 Thread David Malcolm via Gcc-patches
This patch adds a new warning to -fanalyzer for jumps through NULL function pointers. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r13-1979-ge1a9168153d2bf. gcc/analyzer/ChangeLog: PR analyzer/105947 * analyzer.opt (Wanalyzer-jump-through-null)

RE: [EXTERNAL] [PATCH] contrib: modernize gen_autofdo_event.py

2022-08-05 Thread Eugene Rozenfeld via Gcc-patches
The changes look good to me. Also adding Andi, the author of the script. Eugene -Original Message- From: Gcc-patches On Behalf Of Xi Ruoyao via Gcc-patches Sent: Sunday, June 26, 2022 11:15 PM To: gcc-patches@gcc.gnu.org Subject: [EXTERNAL] [PATCH] contrib: modernize gen_autofdo_event.p

add more C++ name hints

2022-08-05 Thread Ulrich Drepper via Gcc-patches
How about adding a few more names from the std namespace to get appropriate hints? This patch compiles and the appropriate messages are printed. Is there a problem with just adding more or even at some point all the symbols of the standard library? gcc/ChangeLog: * cp/name-lookup.cc (ge

[x86 PATCH] Move V1TI shift/rotate lowering from expand to pre-reload split.

2022-08-05 Thread Roger Sayle
This patch moves the lowering of 128-bit V1TImode shifts and rotations by constant bit counts to sequences of SSE operations from the RTL expansion pass to the pre-reload split pass. Postponing this splitting of shifts and rotates enables (will enable) the TImode equivalents of these operations/

Re: [PATCH 0/5] IEEE 128-bit built-in overload support.

2022-08-05 Thread Segher Boessenkool
On Thu, Jul 28, 2022 at 12:43:49AM -0400, Michael Meissner wrote: > These patches lay the foundation for a set of follow-on patches that will > change the internal handling of 128-bit floating point types in GCC. In the > future patches, I hope to change the compiler to always use KFmode for the >

Re: [PATCH] Properly honor param_max_fsm_thread_path_insns in backwards threader

2022-08-05 Thread Jeff Law via Gcc-patches
On 8/2/2022 7:00 AM, Richard Biener via Gcc-patches wrote: I am trying to make sense of back_threader_profitability::profitable_path_p and the first thing I notice is that we do /* Threading is profitable if the path duplicated is hot but also in a case we separate cold path from hot

Re: [PATCH] lower-subreg, expr: Mitigate inefficiencies derived from "(clobber (reg X))" followed by "(set (subreg (reg X)) (...))"

2022-08-05 Thread Jeff Law via Gcc-patches
On 8/4/2022 6:35 AM, Takayuki 'January June' Suwa via Gcc-patches wrote: So lots, but almost double might be an overstatement :) BTW after some quick experimentation, I found that turning on -fsplit-wide-types-early would roughly (but not completely) solve the problem. Surely, the output w

[PATCH] libcpp: Improve location for macro names [PR66290]

2022-08-05 Thread Lewis Hyatt via Gcc-patches
When libcpp reports diagnostics whose locus is a macro name (such as for -Wunused-macros), it uses the location in the cpp_macro object that was stored by _cpp_new_macro. This is currently set to pfile->directive_line, which contains the line number only and no column information. This patch chang

Re: [PATCH] lower-subreg, expr: Mitigate inefficiencies derived from "(clobber (reg X))" followed by "(set (subreg (reg X)) (...))"

2022-08-05 Thread Jeff Law via Gcc-patches
On 8/4/2022 3:49 AM, Richard Sandiford via Gcc-patches wrote: TBH I'm surprised we still run init_regs for LRA. I thought there was a plan to stop doing that, but perhaps I misremember. Sorry I am not sure about the status of LRA... because the xtensa port is still using reload. Ah, hadn

Re: [PATCH] Adjust backwards threader costing of PHIs

2022-08-05 Thread Jeff Law via Gcc-patches
On 8/5/2022 7:58 AM, Richard Biener wrote: The following adjusts the costing of PHIs to match how I understand the comment and maybe the original intent. The will be no non-degenerate PHI nodes remaining on the threaded path but when there are alternate path exits PHI nodes at their destinati

Re: [GCC][PATCH] arm: Add support for Arm Cortex-M85 CPU.

2022-08-05 Thread Richard Earnshaw via Gcc-patches
On 05/08/2022 16:20, Srinath Parvathaneni via Gcc-patches wrote: Hi, This patch adds the -mcpu support for the Arm Cortex-M85 CPU which is an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default. -mpcu=cortex-m85 switch by default matches to -march=armv8.1-m.main+pacbti+mve.fp+fp.dp.

[PATCH] Add warning options -W[no-]compare-distinct-pointer-types

2022-08-05 Thread Jose E. Marchesi via Gcc-patches
GCC emits pedwarns unconditionally when comparing pointers of different types, for example: int xdp_context (struct xdp_md *xdp) { void *data = (void *)(long)xdp->data; __u32 *metadata = (void *)(long)xdp->data_meta; __u32 ret; if (metadata + 1 > data)

Re: [PATCH] backthreader dump fix

2022-08-05 Thread Jeff Law via Gcc-patches
On 8/5/2022 6:31 AM, Richard Biener via Gcc-patches wrote: This fixes odd SUCCEEDED dumps from the backthreader registry that can happen even though register_jump_thread cancelled the thread as invalid. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. * tree-ssa-threadbac

[GCC][PATCH] arm: Add support for Arm Cortex-M85 CPU.

2022-08-05 Thread Srinath Parvathaneni via Gcc-patches
Hi, This patch adds the -mcpu support for the Arm Cortex-M85 CPU which is an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default. -mpcu=cortex-m85 switch by default matches to -march=armv8.1-m.main+pacbti+mve.fp+fp.dp. Also following options are provided to disable default features. +no

Re: [RFA configure parts] aarch64: Make cc1 &co handle --with options

2022-08-05 Thread Richard Earnshaw via Gcc-patches
On 05/08/2022 14:53, Richard Sandiford via Gcc-patches wrote: Richard Earnshaw writes: On 13/06/2022 15:33, Richard Sandiford via Gcc-patches wrote: On aarch64, --with-arch, --with-cpu and --with-tune only have an effect on the driver, so “./xgcc -B./ -O3” can give significantly different r

Re: [PATCH 3/4] match.pd: Teach forwprop to handle VLA VEC_PERM_EXPRs with VLS CONSTRUCTORs as arguments

2022-08-05 Thread Prathamesh Kulkarni via Gcc-patches
On Fri, 5 Aug 2022 at 18:26, Andre Vieira (lists) wrote: > > Hi, > > This patch is part of the WIP patch that follows in this series. It's > goal is to teach forwprop to handle VLA VEC_PERM_EXPRs with VLS > CONSTRUCTORs as arguments as preparation for the 'VLA constructor' hook > approach.

[committed] libstdc++: Add feature test macro for

2022-08-05 Thread Jonathan Wakely via Gcc-patches
I forgot to add this macro to the new header. Tested x86_64-linux, pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * include/experimental/scope (__cpp_lib_experimental_scope): Define. * testsuite/experimental/scopeguard/uniqueres.cc: Check macro. --- libstdc++-v3/incl

Re: [PATCH v2] ipa-visibility: Optimize TLS access [PR99619]

2022-08-05 Thread Alexander Monakov via Gcc-patches
Ping^2. On Wed, 20 Jul 2022, Alexander Monakov wrote: > > Ping. > > On Thu, 7 Jul 2022, Alexander Monakov via Gcc-patches wrote: > > > From: Artem Klimov > > > > Fix PR99619, which asks to optimize TLS model based on visibility. > > The fix is implemented as an IPA optimization: this allows

[committed] libstdc++: Implement from LFTSv3

2022-08-05 Thread Jonathan Wakely via Gcc-patches
Tested x86_64-linux, pushed to trunk. -- >8 -- libstdc++-v3/ChangeLog: * include/Makefile.am: Add new header. * include/Makefile.in: Regenerate. * include/experimental/scope: New file. * testsuite/experimental/scopeguard/uniqueres.cc: New test. * testsuite

[PATCH] Adjust backwards threader costing of PHIs

2022-08-05 Thread Richard Biener via Gcc-patches
The following adjusts the costing of PHIs to match how I understand the comment and maybe the original intent. The will be no non-degenerate PHI nodes remaining on the threaded path but when there are alternate path exits PHI nodes at their destinations will likely require extra copies on those ed

Re: [RFA configure parts] aarch64: Make cc1 &co handle --with options

2022-08-05 Thread Richard Sandiford via Gcc-patches
Richard Earnshaw writes: > On 13/06/2022 15:33, Richard Sandiford via Gcc-patches wrote: >> On aarch64, --with-arch, --with-cpu and --with-tune only have an >> effect on the driver, so “./xgcc -B./ -O3” can give significantly >> different results from “./cc1 -O3”. --with-arch did have a limited >

Re: [PATCH]middle-end Guard value_replacement and store_elim from seeing diamonds.

2022-08-05 Thread Richard Biener via Gcc-patches
On Fri, 5 Aug 2022, Tamar Christina wrote: > Hi All, > > This excludes value_replacement and store_elim from diamonds as they don't > handle the form properly. > > Bootstrapped Regtested on aarch64-none-linux-gnu, x86_64-pc-linux-gnu > and no issues. > > Ok for master? OK > Thanks, > Tamar >

[PATCH]middle-end Guard value_replacement and store_elim from seeing diamonds.

2022-08-05 Thread Tamar Christina via Gcc-patches
Hi All, This excludes value_replacement and store_elim from diamonds as they don't handle the form properly. Bootstrapped Regtested on aarch64-none-linux-gnu, x86_64-pc-linux-gnu and no issues. Ok for master? Thanks, Tamar gcc/ChangeLog: PR middle-end/106534 * tree-ssa-phiopt.

[x86_64 PATCH] Allow any immediate constant in *cmp_doubleword splitter.

2022-08-05 Thread Roger Sayle
This patch tweaks i386.md's *cmp_doubleword splitter's predicate to allow general_operand, not just x86_64_hilo_general_operand, to improve code generation. As a general rule, i386.md's _doubleword splitters should be post-reload splitters that require integer immediate operands to be x86_64_hilo

[PATCH 4/4][RFC] VLA Constructor

2022-08-05 Thread Andre Vieira (lists) via Gcc-patches
This isn't really a 'PATCH' yet, it's something I was working on but had to put on hold. Feel free to re-use any bits or trash all of it if you'd like.diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc index 82f9eba5c397af04924bdebdc68

[PATCH 3/4] match.pd: Teach forwprop to handle VLA VEC_PERM_EXPRs with VLS CONSTRUCTORs as arguments

2022-08-05 Thread Andre Vieira (lists) via Gcc-patches
Hi, This patch is part of the WIP patch that follows in this series. It's goal is to teach forwprop to handle VLA VEC_PERM_EXPRs with VLS CONSTRUCTORs as arguments as preparation for the 'VLA constructor' hook approach. Kind Regards, Andrediff --git a/gcc/match.pd b/gcc/match.pd index 97363

[PATCH 2/4]aarch64: Change aarch64_expand_vector_init to use rtx_vector_builder

2022-08-05 Thread Andre Vieira (lists) via Gcc-patches
Hi, This patch changes aarch64_expand_vector_init to use rtx_vector_builder, exploiting it's internal pattern detection to find 'dup' patterns. Bootstrapped and regression tested on aarch64-none-linux-gnu. Is this OK for trunk or should we wait for the rest of the series? gcc/ChangeLog: 2022-0

[PATCH 1/4] aarch64: encourage use of GPR input for SIMD inserts

2022-08-05 Thread Andre Vieira (lists) via Gcc-patches
Hi, This enables and makes it more likely the compiler is able to use GPR input for SIMD inserts. I believe this is some outdated hack we used to prevent costly GPR<->SIMD register file swaps. This patch is required for better codegen in situations like the test case 'int8_3' in the next patc

[PATCH 0/4] aarch64: Improve codegen for dups and constructors

2022-08-05 Thread Andre Vieira (lists) via Gcc-patches
Hi, This patch series is a work in progress towards getting the compiler to generate better code for constructors and dups in both NEON and SVE targets.  It first changes the backend to use rtx_vector_builder for vector_init's. Then it is followed by some prepraration passes to better handle

Re: [PATCH] middle-end: Allow backend to expand/split double word compare to 0/-1.

2022-08-05 Thread Richard Sandiford via Gcc-patches
"Roger Sayle" writes: > This patch to the middle-end's RTL expansion reorders the code in > emit_store_flag_1 so that the backend has more control over how best > to expand/split double word equality/inequality comparisons against > zero or minus one. With the current implementation, the middle-e

[PATCH] backthreader dump fix

2022-08-05 Thread Richard Biener via Gcc-patches
This fixes odd SUCCEEDED dumps from the backthreader registry that can happen even though register_jump_thread cancelled the thread as invalid. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. * tree-ssa-threadbackward.cc (back_threader::maybe_register_path): Check whe

Re: Missed lowering to ld1rq from svld1rq for memory operand

2022-08-05 Thread Richard Sandiford via Gcc-patches
Prathamesh Kulkarni writes: > Hi Richard, > Following from off-list discussion, in the attached patch, I wrote pattern > similar to vec_duplicate_reg, which seems to work for the svld1rq tests. > Does it look OK ? > > Sorry, I didn't fully understand your suggestion on integrating with > vec_dupli

[COMMITTED] Inline unsupported_range constructor.

2022-08-05 Thread Aldy Hernandez via Gcc-patches
An unsupported_range temporary is instantiated in every Value_Range for completeness sake and should be mostly a NOP. However, it's showing up in the callgrind stats, because it's not inline. This fixes the oversight. PR tree-optimization/106514 gcc/ChangeLog: * value-range.cc

[PATCH V2] place `const volatile' objects in read-only sections

2022-08-05 Thread Jose E. Marchesi via Gcc-patches
[Changes from V1: - Added a test.] It is common for C BPF programs to use variables that are implicitly set by the BPF loader and run-time. It is also necessary for these variables to be stored in read-only storage so the BPF verifier recognizes them as such. This leads to declarations using b

Missed lowering to ld1rq from svld1rq for memory operand

2022-08-05 Thread Prathamesh Kulkarni via Gcc-patches
Hi Richard, Following from off-list discussion, in the attached patch, I wrote pattern similar to vec_duplicate_reg, which seems to work for the svld1rq tests. Does it look OK ? Sorry, I didn't fully understand your suggestion on integrating with vec_duplicate_reg pattern. For vec_duplicate_reg, t

Re: [PATCH] lto: support --jobserver-style=fifo for recent GNU make

2022-08-05 Thread Richard Biener via Gcc-patches
On Thu, Aug 4, 2022 at 10:57 AM Martin Liška wrote: > > After a long time, GNU make has finally implemented named pipes when > it comes to --jobserver-auth. The traditional approach are > provided opened file descriptors that causes troubles: > https://savannah.gnu.org/bugs/index.php?57242 > > GNU

[PATCH] tree-optimization/106533 - loop distribution of inner loop of nest

2022-08-05 Thread Richard Biener via Gcc-patches
Loop distribution currently gives up if the outer loop of a loop nest it analyzes contains a stmt with side-effects instead of continuing to analyze the innermost loop. The following fixes that by continuing anyway. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. PR tree-opt

Re: 回复:[PATCH v5] LoongArch: add movable attribute

2022-08-05 Thread Xi Ruoyao via Gcc-patches
On Fri, 2022-08-05 at 15:58 +0800, Lulu Cheng wrote: > I think the model of precpu is not very easy to describe. > model(got)?model(global)? > I also want to use attribute model and -mcmodel together, but this is just an > initial idea, > what do you think? It seems I had some misunderstanding

Re: [PATCH] place `const volatile' objects in read-only sections

2022-08-05 Thread Richard Biener via Gcc-patches
On Fri, Aug 5, 2022 at 10:30 AM Jose E. Marchesi wrote: > > > Hi Richard. > > > On Fri, Aug 5, 2022 at 3:27 AM Jose E. Marchesi via Gcc-patches > > wrote: > >> > >> > >> Hi people! > >> > >> First of all, a bit of context. > >> > >> It is common for C BPF programs to use variables that are implic

Re: [PATCH] place `const volatile' objects in read-only sections

2022-08-05 Thread Jose E. Marchesi via Gcc-patches
Hi Richard. > On Fri, Aug 5, 2022 at 3:27 AM Jose E. Marchesi via Gcc-patches > wrote: >> >> >> Hi people! >> >> First of all, a bit of context. >> >> It is common for C BPF programs to use variables that are implicitly set >> by the underlying BPF machinery and not by the program itself. It i

Re: 回复:[PATCH v5] LoongArch: add movable attribute

2022-08-05 Thread Lulu Cheng
在 2022/8/5 下午3:41, WANG Xuerui 写道: On 2022/8/5 15:19, Lulu Cheng wrote: 在 2022/8/5 下午2:03, Xi Ruoyao 写道: On Fri, 2022-08-05 at 12:01 +0800, Lulu Cheng wrote: 在 2022/8/5 上午11:45, Xi Ruoyao 写道: On Fri, 2022-08-05 at 11:34 +0800, Xi Ruoyao via Gcc-patches wrote: Or maybe we should just us

Re: 回复:[PATCH v5] LoongArch: add movable attribute

2022-08-05 Thread WANG Xuerui
On 2022/8/5 15:19, Lulu Cheng wrote: 在 2022/8/5 下午2:03, Xi Ruoyao 写道: On Fri, 2022-08-05 at 12:01 +0800, Lulu Cheng wrote: 在 2022/8/5 上午11:45, Xi Ruoyao 写道: On Fri, 2022-08-05 at 11:34 +0800, Xi Ruoyao via Gcc-patches wrote: Or maybe we should just use a PC-relative addressing with 4 inst

Re: 回复:[PATCH v5] LoongArch: add movable attribute

2022-08-05 Thread Lulu Cheng
在 2022/8/5 下午2:03, Xi Ruoyao 写道: On Fri, 2022-08-05 at 12:01 +0800, Lulu Cheng wrote: 在 2022/8/5 上午11:45, Xi Ruoyao 写道: On Fri, 2022-08-05 at 11:34 +0800, Xi Ruoyao via Gcc-patches wrote: Or maybe we should just use a PC-relative addressing with 4 instructions instead of GOT f