Re: [PATCH] Add optional __Bfloat16 support

2022-06-12 Thread Hongtao Liu via Gcc-patches
On Sat, Jun 11, 2022 at 1:46 AM H.J. Lu wrote: > > On Fri, Jun 10, 2022 at 7:44 AM H.J. Lu wrote: > > > > On Fri, Jun 10, 2022 at 2:38 AM Florian Weimer wrote: > > > > > > * liuhongt via Libc-alpha: > > > > > > > +\subsubsection{Special Types} > > > > + > > > > +The \code{__Bfloat16} type uses a

Re: [PATCH 4/4] xtensa: Optimize bitwise AND operation with some specific forms of constants

2022-06-12 Thread Max Filippov via Gcc-patches
3 callx8 a8 .L3: extui a8, a8, 0, 4 beqia8, 4, .L4 l32ra8, .LC3 callx8 a8 .L4: movi.n a10, 0 l32ra8, .LC4 callx8 a8 .size main, .-main .global x .data .align 4 .type x, @object

RE: [EXTERNAL] Re: [PATCH] Add instruction level discriminator support.

2022-06-12 Thread Eugene Rozenfeld via Gcc-patches
Thank you for the review Andi. Yes, the corresponding reader change is @@ -15671,8 +15673,9 @@ module_state::read_location (bytes_in &sec) const if (range.m_start == UNKNOWN_LOCATION) range.m_start = locus; range.m_finish = read_location (sec); + unsigned discrimin

Re: [PATCH] Add instruction level discriminator support.

2022-06-12 Thread Andi Kleen via Gcc-patches
Eugene Rozenfeld via Gcc-patches writes: > { > diff --git a/gcc/cp/module.cc b/gcc/cp/module.cc > index d1dc73724d1..5ed6b7b0f94 100644 > --- a/gcc/cp/module.cc > +++ b/gcc/cp/module.cc > @@ -15587,6 +15587,8 @@ module_state::write_location (bytes_out &sec, > location_t loc) > range.m_

Re: Fix ipa-prop wrt volatile memory accesses

2022-06-12 Thread Martin Jambor
Hi, On Fri, Jun 10 2022, Jan Hubicka wrote: > Hi, > this patch prevents ipa-prop from propagating aggregates when load is > volatile. Martin, does this look OK? It seem to me that ipa-prop may > need some additional volatile flag checks. load_from_unmodified_param_or_agg checks for it, although

Re: [PATCH 2/2] Add a general mapping from internal fns to target insns

2022-06-12 Thread Jeff Law via Gcc-patches
On 6/10/2022 3:14 AM, Richard Sandiford via Gcc-patches wrote: Several existing internal functions map directly to an instruction defined in target-insns.def. This patch makes it easier to define more such functions in future. This should help to reduce cut-&-paste, but more importantly, it

Re: [PATCH 1/2] Factor out common internal-fn idiom

2022-06-12 Thread Jeff Law via Gcc-patches
On 6/10/2022 3:13 AM, Richard Sandiford via Gcc-patches wrote: internal-fn.c has quite a few functions that simply map the result of the call to an instruction's output operand (if any) and map each argument to an instruction's input operand, in order. This patch adds a single function for doi

Re: [PATCH/RFC take #2] cprop_hardreg... Third time's a charm.

2022-06-12 Thread Jeff Law via Gcc-patches
On 6/3/2022 11:27 AM, Roger Sayle wrote: Hi Richard, Here's a revised version of my patch incorporating both your suggestions. The algorithm now uses two worklist vectors, and pointers to them, alternating between them on each iteration, which allows the code to handle an arbitrary number of p

Re: [PATCH] PR tree-optimization/105835: Two narrowing patterns for match.pd.

2022-06-12 Thread Jeff Law via Gcc-patches
On 6/5/2022 7:12 AM, Roger Sayle wrote: This patch resolves PR tree-optimization/105835, which is a code quality (dead code elimination) regression at -O1 triggered/exposed by a recent change to canonicalize X&-Y as X*Y. The new (shorter) form exposes some missed optimization opportunities th

Re: [PATCH] i386: Fix up *3_doubleword_mask [PR105911

2022-06-12 Thread Uros Bizjak via Gcc-patches
On Fri, Jun 10, 2022 at 9:27 PM Jakub Jelinek wrote: > > Hi! > > Another regression caused by my recent patch. > > This time because define_insn_and_split only requires that the > constant mask is const_int_operand. When it was only SImode, > that wasn't a problem, HImode neither, but for DImode

Re: [PATCH]middle-end Use subregs to expand COMPLEX_EXPR to set the lowpart.

2022-06-12 Thread Jeff Law via Gcc-patches
On 6/9/2022 1:52 AM, Tamar Christina via Gcc-patches wrote: Hi All, When lowering COMPLEX_EXPR we currently emit two VEC_EXTRACTs. One for the lowpart and one for the highpart. The problem with this is that in RTL the lvalue of the RTX is the only thing tying the two instructions together.

Re: [PATCH] PR middle-end/105853: Call store_constructor directly from calls.cc.

2022-06-12 Thread Jeff Law via Gcc-patches
On 6/6/2022 7:50 AM, Roger Sayle wrote: This patch fixes both ICE regressions PR middle-end/105853 and PR target/105856 caused by my recent patch to expand small const structs as immediate constants. That patch updated code generation in three places: two in expr.cc that call store_constructo

Re: [PATCH] Do not erase warning data in gimple_set_location

2022-06-12 Thread Jeff Law via Gcc-patches
On 6/10/2022 4:57 AM, Eric Botcazou via Gcc-patches wrote: Hi, gimple_set_location is mostly invoked on newly built GIMPLE statements, so their location is UNKNOWN_LOCATION and setting it will clobber the warning data of the passed location, if any. Tested on x86-64/Linux, OK for mainline an

Re: [PATCH 2/4] xtensa: Simplify conditional branch/move insn patterns

2022-06-12 Thread Takayuki 'January June' Suwa via Gcc-patches
On 2022/06/12 16:51, Max Filippov wrote: This patch is whitespace-damaged. Please resend. oh, sorry. reposted as zip in attachment due to avoiding damage.<>

Re: [PATCH 2/4] xtensa: Simplify conditional branch/move insn patterns

2022-06-12 Thread Max Filippov via Gcc-patches
On Sat, Jun 11, 2022 at 11:43 PM Takayuki 'January June' Suwa wrote: > > No need to describe the "false side" conditional insn patterns anymore. > > gcc/ChangeLog: > > * config/xtensa/xtensa-protos.h (xtensa_emit_branch): > Remove the first argument. > (xtensa_emit_bit_bran