On Thu, Apr 14, 2022 at 3:18 AM Hongyu Wang via Gcc-patches
wrote:
>
> Hi,
>
> From -Os point of view, stv converts scalar register to vector mode
> which introduces extra reg conversion and increase instruction size.
> Disabling stv under optimize_size would avoid such code size increment
> and n
On Wed, Apr 13, 2022 at 5:22 PM Qing Zhao wrote:
>
> Hi, Richard,
>
> Thanks a lot for taking a look at this issue (and Sorry that I haven’t fixed
> this one yet, I was distracted by other tasks then just forgot this one….)
>
> > On Apr 13, 2022, at 3:41 AM, Richard Biener
> > wrote:
> >
> > On
On 4/13/22 12:23, Robin Dapp wrote:
> Hi,
>
> this patch adds the scheduler description for z16. Bootstrapped and
> regtested with --with-arch=z16.
>
> Is it OK?
>
> Regards
> Robin
>
>
> gcc/ChangeLog:
>
> * config/s390/s390.cc (s390_get_sched_attrmask): Add z16.
> (s390_get_un
On 4/13/22 09:35, Robin Dapp wrote:
> Hi,
>
> this test case checks that we do not ICE but FAILs because of
> -Wint-to-pointer-cast. Silence this warning.
>
> Is it OK?
Ok. Thanks!
Andreas
On 4/14/22 05:10, Kewen.Lin wrote:
> Hi,
>
> The test case pr105250.c is like its related pr105140.c, which
> suffers the error with message like "{AltiVec,vector} argument
> passed to unprototyped" on powerpc and s390. So like commits
> r12-8025 and r12-8039, this fix is to add the dg-skip-if fo
On Wed, 13 Apr 2022, Gerald Pfeifer wrote:
> This is the first batch of fixes. Pushed.
Hmm, there is one issue that confused me a bit. What did you want to
relay by the following?
+Pattern matching
+
+ The case statement has been extended to cover
Currently that is a withi
On Mon, 4 Apr 2022, Fernando Oleo Blanco via Gcc-patches wrote:
> this is my first patch to GCC, if there is anything off, please, say
> so. I have used the default HTML formatting that comes with Emacs.
I am not familiar with that Emacs mode, but < and > are special characters
in HTML and have t
Hi,
The test case pr105250.c is like its related pr105140.c, which
suffers the error with message like "{AltiVec,vector} argument
passed to unprototyped" on powerpc and s390. So like commits
r12-8025 and r12-8039, this fix is to add the dg-skip-if for
powerpc*-*-* and s390*-*-*.
Tested on powerp
Because common_handle_aligned_attribute only applies the alignment to the
TREE_TYPE of a typedef, not the DECL_ORIGINAL_TYPE, we need to copy it
explicitly in tsubst.
Tested x86_64-pc-linux-gnu, applying to trunk.
PR c++/65211
gcc/cp/ChangeLog:
* pt.cc (tsubst_decl) [TYPE_DECL]:
Hi,
>From -Os point of view, stv converts scalar register to vector mode
which introduces extra reg conversion and increase instruction size.
Disabling stv under optimize_size would avoid such code size increment
and no need to touch ix86_size_cost that has not been tuned for long
time.
Bootstrap
Hello,
can you check the following patch?
On 22-04-13 17:27:11, FX wrote:
> Hi,
>
> > the problem is that configure checks for feenableexcept() in libm:
> > AC_CHECK_LIB([m],[feenableexcept],[have_feenableexcept=yes
> > AC_DEFINE([HAVE_FEENABLEEXCEPT],[1],[libm includes feenableexcept])])
> >
When instantiating the op() for a generic lambda, we can no longer do name
lookup inside function scopes enclosing the lambda, so we need to remember
the lookup result from processing the definition of the lambda. So the code
in finish_call_expr to throw away the lookup result and instead look it
Asking for conversion to a dependent type also makes a BASELINK dependent.
Tested x86_64-pc-linux-gnu, applying to trunk.
PR c++/101698
gcc/cp/ChangeLog:
* pt.cc (tsubst_baselink): Also check dependent optype.
gcc/testsuite/ChangeLog:
* g++.dg/template/conv19.C: New te
This issue goes back to r83221, where the cleanup for extended ref temps
changed from being unconditional to being tied to the declaration they
formed part of the initializer for.
The named return value optimization changes the cleanup for the NRV variable
to only run on the EH path; we don't want
[sorry, I failed to add [PATCH] to the subject of the two previous patches]
Though -mpower9-vector makes float128 support possible, some target
systems such as vxworks disable float128 types by default
(TARGET_FLOAT128_ENABLE_TYPE is defined to 0), so explicit -mfloat128
is needed to enable it, an
When -mfloat128 is specified on targets that don't have float128 types
enabled by default, a warning is raised that the option may not be
fully supported. This patch prunes the warning on some tests that use
the flag but don't accept the warning.
Tested on x86_64-linux-gnu x ppc64-vx7r2 with gc
Multiple bfp tests expect -mcpu=power[89] to enable the __ieee128
type, but on targets that #define TARGET_FLOAT128_ENABLE_TYPE 0, that
is not the case. Since they are compile-time tests and effective
target support for powerpc_p9vector_ok is required, adding -mfloat128
is safe. This patch does
Hello, Iain,
Sorry about the late response.
On Mar 11, 2021, Iain Sandoe wrote:
> Alexandre Oliva wrote:
>> On Mar 10, 2021, Alexandre Oliva wrote:
>>
>>> * gcc.target/powerpc/prefix-ds-dq.c: Enable __float128.
>>
>> I've been reminded that this is not enough for the scan-assembler tests
>>
On Apr 17, 2021, Alexandre Oliva wrote:
> On Apr 12, 2021, Segher Boessenkool wrote:
>> Hi!
>> Sorry for the late answer.
Likewise :-)
>> On Fri, Apr 02, 2021 at 01:52:59PM -0300, Alexandre Oliva wrote:
>>> Several compile tests that use the __ieee128 type do not ensure it is
>>> defined. Thi
On Tue, Apr 12, 2022 at 04:01:14PM -0400, Jason Merrill wrote:
> On 4/12/22 14:38, Marek Polacek wrote:
> > On Mon, Apr 11, 2022 at 04:39:22PM -0400, Jason Merrill wrote:
> > > On 4/8/22 15:21, Marek Polacek wrote:
> > > > On Wed, Apr 06, 2022 at 04:55:54PM -0400, Jason Merrill wrote:
> > > > > On
This patch updates issue10441.go to the upstream version. The test
only needs to be compiled, not linked. Linking failed on some
platforms, and there was no need to do it anyhow. Ran test on
x86_64-pc-linux-gnu. Committed to mainline.
Ian
33ba46663cdf2c9e995265eb838585488f81e907
diff --git a/g
On Wed, Apr 13, 2022 at 04:30:36PM -0500, Segher Boessenkool wrote:
> This should have been tested on Linux as well: it is now broken on both
> -m32 and -m64 there. Please revert?
Sorry, confusing with another new regression: this one is only -m64 of
course.
Segher
On Mon, Apr 11, 2022 at 08:54:14PM -0300, Alexandre Oliva wrote:
> On Apr 7, 2022, HAO CHEN GUI via Gcc-patches wrote:
>
> > Gentle ping this:
> >https://gcc.gnu.org/pipermail/gcc-patches/2022-February/590958.html
> > Thanks
>
> >> On 28/2/2022 上午 11:17, HAO CHEN GUI wrote:
>
> >>> This
On Wed, Apr 13, 2022 at 11:03 AM Roger Sayle wrote:
>
>
> This patch resolves the last piece of PR target/70321 a code quality
> (P2 regression) affecting mainline. Currently, for HJ's testcase:
>
> void foo (long long ixi)
> {
> if (ixi != 14348907)
> __builtin_abort ();
> }
>
> GCC with -
In this PR, we were trying to set the unroll factor to a value higher
than the minimum VF (or more specifically, to a value that doesn't
divide the VF). I guess there are two approaches to this: let the
target pick any value it likes and make target-independent code pare
it back to something that
Hi all,
These patches refactor the widening patterns in vect-patterns to use
internal_fn instead of tree_codes.
Sorry about the delay, some changes to master made it a bit messier.
Bootstrapped and regression tested on aarch64.
Joel
> > diff --git a/gcc/tree-vect-patterns.c b/gcc/tree-vect-pa
On Wed, Apr 13, 2022 at 05:16:48PM +0200, Tobias Burnus wrote:
> Trivial fix – after finding the issue. The LOOP directive and
> several LOOP/DO/SIMD combined directives were missing in the
> check. As the PR shows, this leads to an ICE on invalid code.
>
> OK?
>
> Tobias
> -
> Si
Hi,
> the problem is that configure checks for feenableexcept() in libm:
> AC_CHECK_LIB([m],[feenableexcept],[have_feenableexcept=yes
> AC_DEFINE([HAVE_FEENABLEEXCEPT],[1],[libm includes feenableexcept])])
>
> FreeBSD doesn't have this function in libm, it's implemented in
> /usr/include/fenv.h
Hi, Richard,
Thanks a lot for taking a look at this issue (and Sorry that I haven’t fixed
this one yet, I was distracted by other tasks then just forgot this one….)
> On Apr 13, 2022, at 3:41 AM, Richard Biener
> wrote:
>
> On Tue, Feb 15, 2022 at 5:31 PM Qing Zhao via Gcc-patches
> wrote:
>
Trivial fix – after finding the issue. The LOOP directive and
several LOOP/DO/SIMD combined directives were missing in the
check. As the PR shows, this leads to an ICE on invalid code.
OK?
Tobias
-
Siemens Electronic Design Automation GmbH; Anschrift: Arnulfstraße 201, 80634
Mün
On 22-03-20 16:30:08, FX wrote:
> Hi,
>
> (Please send all Fortran (front-end and libgfortran) patches in CC to the
> Fortran list.)
>
> Please hold from pushing the patch as is, I have some questions:
>
> - If FreeBSD has feenableexcept() and related functions, it should already
> use the fpu
I've pushed the following release notes change to the GCC website:
https://gcc.gnu.org/gcc-12/changes.html#jit
covering the 5 patches from Antoni that I pushed yesterday.
Dave
---
htdocs/gcc-12/changes.html | 22 +-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --gi
Tested x86_64-linux, without libiconv installed, with libiconv installed,
with libiconv installed but using an in-tree libiconv, with libiconv.a
installed and using --with-libiconv-type=static, and with libiconv.so
installed and using --without-libiconv-prefix (which still fails).
I'm not entirely
The patch for 100111 extended our handling of empty base elision to the case
where the derived class has no other fields, but we still need to make sure
that there's some initializer for the derived object.
Tested x86_64-pc-linux-gnu, applying to trunk.
PR c++/105245
PR c++/100111
On Wed, 13 Apr 2022, Richard Biener wrote:
> When doing BB vectorization the scalar cost compute is derailed
> by patterns, causing lanes to be considered live and thus not
> costed on the scalar side. For the testcase in PR104010 this
> prevents vectorization which was done by GCC 11. PR103941
reassoc has certain tricks which in the end depend on the ability
to undo them. For DFP creating a -1. constant is easy but
re-identifying is appearantly not - real_minus_onep rejects those
outright for DFP. So we have to disable (at least) this one trick.
Bootstrapped on x86_64-unknown-linux-gn
On Wed, 13 Apr 2022, Jakub Jelinek wrote:
> Hi!
>
> tree_builtin_call_types_compatible_p uses TYPE_MAIN_VARIANT comparisons
> or tree_nop_conversion_p to ensure a builtin has correct GENERIC arguments.
> Unfortunately this regressed when get_call_combined_fn is called during
> GIMPLE optimization
Hi!
The following testcase ICEs on ia64. It is UB at runtime, but we shouldn't
ICE on it...
The problem is that on ia64, the shift count (last operand of ASHIFT etc.)
is promoted to DImode (using zero-extension), while most other targets
use much narrower modes (say QImode). If we try to simplif
Hi!
tree_builtin_call_types_compatible_p uses TYPE_MAIN_VARIANT comparisons
or tree_nop_conversion_p to ensure a builtin has correct GENERIC arguments.
Unfortunately this regressed when get_call_combined_fn is called during
GIMPLE optimizations. E.g. when number_of_iterations_popcount is called,
This patch adjusts the testcases, previously proposed, to allow for
testing on machines with varying page sizes and default amounts of
lockable memory. There turns out to be more variation than I had thought.
This should go on mainline at the same time as the previous patches in
this thread.
Hello,
On Wed, 13 Apr 2022, Roger Sayle wrote:
> The x86 instruction encoding for SImode andn is longer than the
> equivalent notl/andl sequence when the source for the not operand
> is the same register as the destination.
_And_ when no REX prefixes are necessary for the notl,andn, which they a
On 4/13/22 14:57, Richard Biener via Gcc-patches wrote:
When doing BB vectorization the scalar cost compute is derailed
by patterns, causing lanes to be considered live and thus not
costed on the scalar side. For the testcase in PR104010 this
prevents vectorization which was done by GCC 11.
When doing BB vectorization the scalar cost compute is derailed
by patterns, causing lanes to be considered live and thus not
costed on the scalar side. For the testcase in PR104010 this
prevents vectorization which was done by GCC 11. PR103941
shows similar cases of missed optimizations that are
On 4/13/22 04:11, Jakub Jelinek wrote:
Hi!
The following testcase fails, because we only constant evaluate the
alignas argument as non-manifestly constant-evaluated and as
__builtin_is_constant_evaluated appears, we make it non-constant
(the reason is that we often try to evaluate some expressio
Richard Biener writes:
> On Wed, 13 Apr 2022, Richard Sandiford wrote:
>
>> Richard Biener via Gcc-patches writes:
>> > The following reverts the original PR105140 fix and goes for instead
>> > applying the additional fold_convert constraint for VECTOR_TYPE
>> > conversions also to fold_convertib
Hi,
this patch adds the scheduler description for z16. Bootstrapped and
regtested with --with-arch=z16.
Is it OK?
Regards
Robin
gcc/ChangeLog:
* config/s390/s390.cc (s390_get_sched_attrmask): Add z16.
(s390_get_unit_mask): Likewise.
(s390_is_fpd): Likewise.
(
On Wed, Apr 13, 2022 at 9:08 AM Roger Sayle wrote:
>
>
> Hi Uros,
> Many thanks for the speedy review. Here's the revised version of the
> patch incorporating all of your suggested fixes and improvements.
How about we go with an alternative route and enhance the *_maybe_si
instructions with your
On Wed, 13 Apr 2022, Richard Biener wrote:
> On Wed, 13 Apr 2022, Richard Biener wrote:
>
> > On Wed, 13 Apr 2022, Richard Sandiford wrote:
> >
> > > Richard Biener via Gcc-patches writes:
> > > > The following reverts the original PR105140 fix and goes for instead
> > > > applying the addition
This patch resolves the last piece of PR target/70321 a code quality
(P2 regression) affecting mainline. Currently, for HJ's testcase:
void foo (long long ixi)
{
if (ixi != 14348907)
__builtin_abort ();
}
GCC with -m32 -O2 generates four instructions for the comparison:
movl1
On Wed, 13 Apr 2022, Richard Biener wrote:
> On Wed, 13 Apr 2022, Richard Sandiford wrote:
>
> > Richard Biener via Gcc-patches writes:
> > > The following reverts the original PR105140 fix and goes for instead
> > > applying the additional fold_convert constraint for VECTOR_TYPE
> > > conversio
On Wed, 13 Apr 2022, Richard Sandiford wrote:
> Richard Biener via Gcc-patches writes:
> > The following reverts the original PR105140 fix and goes for instead
> > applying the additional fold_convert constraint for VECTOR_TYPE
> > conversions also to fold_convertible_p. I did not try sanitizing
This adjusts the FAILing testcase to only check for the pieces
that work. The bug tracks improving pattern-init for long double.
Tested on x86_64-unknown-linux-gnu, pushed.
2022-04-13 Richard Biener
PR middle-end/105259
* gcc.target/i386/auto-init-4.c: Adjust.
---
gcc/testsu
On Tue, Feb 15, 2022 at 5:31 PM Qing Zhao via Gcc-patches
wrote:
>
>
>
> > On Feb 15, 2022, at 3:58 AM, Jakub Jelinek wrote:
> >
> > Hi!
> >
> > For IBM double double I've added in PR95450 and PR99648 verification that
> > when we at the tree/GIMPLE or RTL level interpret target bytes as a REAL_C
Hi!
The following testcase fails, because we only constant evaluate the
alignas argument as non-manifestly constant-evaluated and as
__builtin_is_constant_evaluated appears, we make it non-constant
(the reason is that we often try to evaluate some expression without
manifestly_const_eval perhaps e
The x86 instruction encoding for SImode andn is longer than the
equivalent notl/andl sequence when the source for the not operand
is the same register as the destination. This patch adds post_reload
splitters to i386.md to avoid "-mbmi" (which enables andn) increasing
code size with "-Oz".
One m
On Wed, 13 Apr 2022, Jakub Jelinek wrote:
> Hi!
>
> The following code is rejected e.g. on mips64el-linux (but I think many
> other targets which don't support target attribute or pragma).
> The problem is that the change to decl_attributes below is done
> unconditionally and with just #pragma GC
Richard Biener via Gcc-patches writes:
> The following reverts the original PR105140 fix and goes for instead
> applying the additional fold_convert constraint for VECTOR_TYPE
> conversions also to fold_convertible_p. I did not try sanitizing
> all of this at this point.
>
> Bootstrapped on x86_6
Hi!
The following code is rejected e.g. on mips64el-linux (but I think many
other targets which don't support target attribute or pragma).
The problem is that the change to decl_attributes below is done
unconditionally and with just #pragma GCC push_options/pop_options pair
we have target_option_d
Hi!
This fixes a typo in the 5.0 feature support table.
Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk.
2022-04-13 Jakub Jelinek
* libgomp.texi: Fix a typo - mutexinouset -> mutexinoutset.
--- libgomp/libgomp.texi.jj 2022-03-14 10:34:34.444919906 +0100
Hi!
When looking at the kernel __popcountdi2 issue, I've noticed a comment typo.
Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk
as obvious.
2022-04-13 Jakub Jelinek
* tree-scalar-evolution.cc (expression_expensive_p): Fix a comment typo.
--- gcc/tree-scala
The following reverts the original PR105140 fix and goes for instead
applying the additional fold_convert constraint for VECTOR_TYPE
conversions also to fold_convertible_p. I did not try sanitizing
all of this at this point.
Bootstrapped on x86_64-unknown-linux-gnu, testing in progress.
2022-04-
On Wed, Apr 13, 2022 at 9:07 AM Hongyu Wang wrote:
>
> Hi,
>
> For -mrelax-cmpxchg-loop which relaxes atomic_fetch_ loops,
> there is a missing set to %eax when compare fails, which would result
> in infinite loop in some benchmark. Add set to %eax to avoid it.
>
> Bootstraped/regtested on x86_64-
Hi,
this test case checks that we do not ICE but FAILs because of
-Wint-to-pointer-cast. Silence this warning.
Is it OK?
Regards
Robin
gcc/testsuite/ChangeLog:
* gcc.target/s390/pr80725.c: Add -Wno-int-to-pointer-cast.
---
gcc/testsuite/gcc.target/s390/pr80725.c | 2 +-
1 file chan
Status
==
The gcc-11 branch is now frozen in preparation for a GCC 11.3 release
candidate and the GCC 11.3 release next week. All changes now require
release manager approval.
The remaining P1 bugs have been resolved or pushed back to GCC 11.4.
Quality Data
Priority
Hi Uros,
Many thanks for the speedy review. Here's the revised version of the
patch incorporating all of your suggested fixes and improvements.
This has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check with no new failures. Ok for mainline?
2022-04-13 Roger Sayle
Hi,
For -mrelax-cmpxchg-loop which relaxes atomic_fetch_ loops,
there is a missing set to %eax when compare fails, which would result
in infinite loop in some benchmark. Add set to %eax to avoid it.
Bootstraped/regtested on x86_64-pc-linux-gnu{-m32,}
Ok for master?
gcc/ChangeLog:
PR ta
66 matches
Mail list logo
