On Wed, Aug 25, 2021 at 2:14 PM Kong, Lingling via Gcc-patches
wrote:
>
> Hi,
>
> For avx512f_scattersi, mask operand only affect set src, we
> need to refine the pattern to let gcc know mask register also affect the dest.
> So we put mask operand into UNSPEC_VSIBADDR.
>
> Bootstrapped and regress
Hi,
For avx512f_scattersi, mask operand only affect set src, we
need to refine the pattern to let gcc know mask register also affect the dest.
So we put mask operand into UNSPEC_VSIBADDR.
Bootstrapped and regression tested on x86_64-linux-gnu{-m32,-m64}.
Ok for master?
gcc/ChangeLog:
*config/i3
Hi,
For _mm512_fpclass_ps_mask in O0, mask should be (__mmask16)-1 instead of
(__mmask8)-1).
Bootstrapped and regtested on x86_64-linux-gnu{-m32,}.
Ok for master?
gcc/ChangeLog:
* gcc/config/i386/avx512dqintrin.h : fix _mm512_fpclass_ps_mask define in O0
gcc/testsuite/ChangeLog:
* gcc.target/
On Wed, Aug 25, 2021 at 11:26 AM guojiufu wrote:
>
> On 2021-08-16 09:33, Bin.Cheng wrote:
> > On Wed, Aug 4, 2021 at 10:42 AM guojiufu
> > wrote:
> >>
> ...
> >> >> diff --git a/gcc/testsuite/gcc.dg/vect/pr101145.inc
> >> >> b/gcc/testsuite/gcc.dg/vect/pr101145.inc
> >> >> new file mode 100644
>
on 2021/8/25 上午6:14, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Aug 13, 2021 at 10:34:46AM +0800, Kewen.Lin wrote:
>> on 2021/8/12 下午11:10, Segher Boessenkool wrote:
+ && VECTOR_UNIT_ALTIVEC_OR_VSX_P (in_vmode))
+{
+ machine_mode exp_mode = DImode;
+ machine
on 2021/8/25 上午5:56, Segher Boessenkool wrote:
> On Fri, Aug 13, 2021 at 11:18:46AM +0800, Kewen.Lin wrote:
>> on 2021/8/12 下午11:51, Segher Boessenkool wrote:
>>> It is a bad idea to initialise things unnecessary: it hinders many
>>> optimisations, but much more importantly, it silences warnings wi
on 2021/8/24 下午9:02, Segher Boessenkool wrote:
> Hi Ke Wen,
>
> On Mon, Aug 09, 2021 at 10:53:00AM +0800, Kewen.Lin wrote:
>> on 2021/8/6 下午9:10, Bill Schmidt wrote:
>>> On 8/4/21 9:06 PM, Kewen.Lin wrote:
The existing vec_unpacku_{hi,lo} supports emulated unsigned
unpacking for short an
On 2021-08-16 09:33, Bin.Cheng wrote:
On Wed, Aug 4, 2021 at 10:42 AM guojiufu
wrote:
...
>> diff --git a/gcc/testsuite/gcc.dg/vect/pr101145.inc
>> b/gcc/testsuite/gcc.dg/vect/pr101145.inc
>> new file mode 100644
>> index 000..6eed3fa8aca
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.d
Pushed to trunk as an obvious fix.
gcc/testsuite/ChangeLog:
PR target/101989
* gcc.target/i386/avx2-shiftqihi-constant-1.c: Add -mno-avx512f.
* gcc.target/i386/sse2-shiftqihi-constant-1.c: Add -mno-avx
---
gcc/testsuite/gcc.target/i386/avx2-shiftqihi-constant-1.c | 2 +-
On Tue, Aug 24, 2021 at 9:11 PM Bernhard Reutner-Fischer
wrote:
>
> On Tue, 24 Aug 2021 17:53:27 +0800
> Hongtao Liu via Gcc-patches wrote:
>
> > On Tue, Aug 24, 2021 at 9:36 AM liuhongt wrote:
> > >
> > > Also optimize below 3 forms to vpternlog, op1, op2, op3 are
> > > register_operand or unar
On Tue, Aug 24, 2021 at 6:51 PM David Malcolm wrote:
>
> On Tue, 2021-08-24 at 08:17 -0400, Lewis Hyatt wrote:
> > Hello-
> >
> > I thought it might be a good time to check on this patch please?
> > Thanks!
> > https://gcc.gnu.org/pipermail/gcc-patches/2021-July/576449.html
> >
> > -Lewis
>
> I we
On Tue, 2021-08-24 at 08:17 -0400, Lewis Hyatt wrote:
> Hello-
>
> I thought it might be a good time to check on this patch please?
> Thanks!
> https://gcc.gnu.org/pipermail/gcc-patches/2021-July/576449.html
>
> -Lewis
I went through that latest version of the patch and have no further
suggestio
Hi!
On Tue, Aug 24, 2021 at 03:04:26PM -0500, Bill Schmidt wrote:
> On 8/24/21 3:52 AM, HAO CHEN GUI wrote:
> Thanks for this patch! In the future, if you can put your ChangeLog and
> patch inline in your post, it makes it easier to review. (Otherwise we
> have to manually copy it into our res
AIX 7.3 system headers are C++ safe and GCC no longer needs to define
SYSTEM_IMPLICIT_EXTERN_C for AIX 7.3. This patch moves the definition
from aix.h to the individual OS-level configuration files and does not
define the macro for AIX 7.3.
The patch also corrects the definiti
Hi!
On Fri, Aug 13, 2021 at 10:34:46AM +0800, Kewen.Lin wrote:
> on 2021/8/12 下午11:10, Segher Boessenkool wrote:
> >> + && VECTOR_UNIT_ALTIVEC_OR_VSX_P (in_vmode))
> >> +{
> >> + machine_mode exp_mode = DImode;
> >> + machine_mode exp_vmode = V2DImode;
> >> + enum rs6000_bu
On Fri, Aug 13, 2021 at 11:18:46AM +0800, Kewen.Lin wrote:
> on 2021/8/12 下午11:51, Segher Boessenkool wrote:
> > It is a bad idea to initialise things unnecessary: it hinders many
> > optimisations, but much more importantly, it silences warnings without
> > fixing the problem.
>
> OK, I've made i
My apologies again. My patch to simplify truncations of SUBREGs in
simplify-rtx.c contained an error where I'd accidentally compared
against a mode instead of the precision of that mode. Grr! It even
survived regression testing on two platforms. Fixed below, and
committed as obvious, after a f
Hi!
On Tue, Aug 24, 2021 at 04:55:30PM +0800, liuhongt wrote:
> This patch extend change_zero_ext to change illegitimate constant
> into constant pool, this will enable simplification of below:
It should be in a separate function. recog_for_combine will call both.
But not both for the same RTL
Dear Fortranners,
here's a pretty obvious one: we didn't properly check the arguments
for intrinsics when these had to be ALLOCATABLE and in the case that
argument was a coarray object. Simple solution: just reuse a check
that was used for pointer etc.
Regtested on x86_64-pc-linux-gnu. OK for m
Hi Hao Chen,
On 8/24/21 3:52 AM, HAO CHEN GUI wrote:
Hi
The patch disables gimple fold for float or double vec_min/max
builtin when fast-math is not set. Two test cases are added to verify
the patch.
The attachments are the patch diff and change log file.
Bootstrapped and teste
Hi Kewen,
Sorry this sat in my queue for so long. It looks like you addressed all
of our concerns, so LGTM -- recommend maintainers approve.
Thanks!
Bill
On 8/12/21 9:34 PM, Kewen.Lin wrote:
Hi Segher,
Thanks for the review!
on 2021/8/12 下午11:10, Segher Boessenkool wrote:
Hi!
On Wed, Au
On Linux/x86_64,
6ddb30f941a44bd528904558673ab35394565f08 is the first bad commit
commit 6ddb30f941a44bd528904558673ab35394565f08
Author: liuhongt
Date: Fri Aug 20 15:30:40 2021 +0800
Optimize (a & b) | (c & ~b) to vpternlog instruction.
caused
FAIL: gcc.target/i386/avx2-shiftqihi-consta
Committed as obvious.
commit 6404392bcf74d2af7d171cc1df9b5c001d2218f8
Author: Jonathan Wakely
Date: Tue Aug 24 18:06:25 2021 +0100
Fix grammar in gcc-11 release notes
diff --git a/htdocs/gcc-11/changes.html b/htdocs/gcc-11/changes.html
index b8bb2e69..6dec8856 100644
--- a/htdocs/gcc-11/c
On 8/18/21 12:00 AM, Richard Biener wrote:
On Tue, Aug 17, 2021 at 7:26 PM Indu Bhagat wrote:
On 8/17/21 1:04 AM, Richard Biener wrote:
On Mon, Aug 16, 2021 at 7:39 PM Indu Bhagat wrote:
On 8/10/21 4:54 AM, Richard Biener wrote:
On Thu, Aug 5, 2021 at 2:52 AM Indu Bhagat via Gcc-patches
On Tue, Aug 24, 2021 at 9:16 AM Segher Boessenkool
wrote:
>
> On Tue, Aug 24, 2021 at 09:57:52AM +0800, Hongtao Liu wrote:
> > Trying 5 -> 7:
> > 5: r85:V4SF=[`*.LC0']
> > REG_EQUAL const_vector
> > 7: r84:V4SF=vec_select(vec_concat(r85:V4SF,r85:V4SF),parallel)
> > REG_DEAD r85
On 8/24/21 10:38 AM, Segher Boessenkool wrote:
Hi!
On Tue, Aug 24, 2021 at 09:20:09AM -0500, Bill Schmidt wrote:
On 8/23/21 4:40 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:55AM -0500, Bill Schmidt wrote:
+; These things need some review to see whether they really require
+; M
On Tue, Aug 24, 2021 at 09:57:52AM +0800, Hongtao Liu wrote:
> Trying 5 -> 7:
> 5: r85:V4SF=[`*.LC0']
> REG_EQUAL const_vector
> 7: r84:V4SF=vec_select(vec_concat(r85:V4SF,r85:V4SF),parallel)
> REG_DEAD r85:V4SF
> REG_EQUAL const_vector
> Failed to match this instruction:
On 8/20/21 12:54 AM, Roger Sayle wrote:
>
> This patch adds a __PTX_ISA__ predefined macro to the nvptx backend that
> allows code to check the compute model being targeted by the compiler.
Hi Roger,
The naming __PTX_ISA__ is consistent with the naming of -misa=sm_30/sm_35.
The -misa=sm_30/sm_3
Ping.
On 22/07/2021 11:58, Hafiz Abid Qadeer wrote:
> Ping.
>
> On 13/06/2021 14:27, Hafiz Abid Qadeer wrote:
>> Add support for architectures such as AMD GCN, in which the pointer size is
>> larger than the register size. This allows the CFI information to include
>> multi-register locations fo
Hi!
On Tue, Aug 24, 2021 at 09:20:09AM -0500, Bill Schmidt wrote:
> On 8/23/21 4:40 PM, Segher Boessenkool wrote:
> >On Thu, Jul 29, 2021 at 08:30:55AM -0500, Bill Schmidt wrote:
> >>+; These things need some review to see whether they really require
> >>+; MASK_POWERPC64. For xsxexpdp, this seem
>PR c++/101387
>
>gcc/cp/ChangeLog:
>PR c++/101387
>* tree.c (cp_build_qualified_type_real): Excluding typedef from error
>
>gcc/testsuite/ChangeLog:
>PR c++/101387
>* g++.dg/parse/pr101783.C: New test.
This is the wrong PR number.
How has this ptch been tested? Ha
Hi Uros,
Sorry for the late update. I have tried adjusting the combine pass but
found it is not easy to modify shift const, so I came up with an
alternative solution with your patch. It matches the non-canonical
zero-extend in ix86_decompose_address and adjust ix86_rtx_cost to
combine below patter
On 24/08/21 16:13 +0100, Jonathan Wakely wrote:
Signed-off-by: Jonathan Wakely
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_layout_compatible): Define.
(is_corresponding_member): Define.
* include/std/version (__cpp_lib_is_layout_compatible): Define.
*
Signed-off-by: Jonathan Wakely
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_layout_compatible): Define.
(is_corresponding_member): Define.
* include/std/version (__cpp_lib_is_layout_compatible): Define.
* testsuite/20_util/is_layout_compatible/is_correspo
On Sun, Aug 15, 2021 at 11:11 PM Richard Biener
wrote:
>
> On Fri, Aug 13, 2021 at 3:51 PM H.J. Lu wrote:
> >
> > and target("general-regs-only") function attribute
> > were added to GCC 11. But their implementations are incomplete. I'd
> > like to backport the following patches to GCC 11 bran
On 8/23/21 5:15 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:56AM -0500, Bill Schmidt wrote:
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize
various pointer type nodes.
* config/rs6000/rs6000.h (rs6000_builtin_type_index): Add enum
On 8/23/21 4:40 PM, Segher Boessenkool wrote:
On Thu, Jul 29, 2021 at 08:30:55AM -0500, Bill Schmidt wrote:
2021-06-15 Bill Schmidt
* config/rs6000/rs6000-builtin-new.def: Add power9-vector, power9,
and power9-64 stanzas.
+; These things need some review to see whether they re
This patch adds transitive relations to the oracle.
When a relation is registered with the oracle, it searches back thru the
dominator tree for other relations which may provide a transitive
relation and registers those. It also considers any active equivalences
during the search. With this,
Clang warns about this, but GCC doesn't (see PR c++/102036).
Signed-off-by: Jonathan Wakely
libstdc++-v3/ChangeLog:
* src/c++11/cxx11-shim_facets.cc: Fix mismatched class-key in
explicit instantiation definitions.
Tested powerpc64le-linux. Committed to trunk.
commit d8b7282ea2
On Tue, 24 Aug 2021 17:53:27 +0800
Hongtao Liu via Gcc-patches wrote:
> On Tue, Aug 24, 2021 at 9:36 AM liuhongt wrote:
> >
> > Also optimize below 3 forms to vpternlog, op1, op2, op3 are
> > register_operand or unary_p as (not reg)
> > gcc/ChangeLog:
> >
> > PR target/101989
> >
On 8/24/21 14:13, Richard Biener wrote:
On Thu, Jul 1, 2021 at 3:13 PM Martin Liška wrote:
On 10/23/20 1:47 PM, Martin Liška wrote:
Hey.
Hello.
I deferred the patch for GCC 12. Since the time, I messed up with options
I feel more familiar with the option handling. So ...
This is a follo
Hi Ke Wen,
On Mon, Aug 09, 2021 at 10:53:00AM +0800, Kewen.Lin wrote:
> on 2021/8/6 下午9:10, Bill Schmidt wrote:
> > On 8/4/21 9:06 PM, Kewen.Lin wrote:
> >> The existing vec_unpacku_{hi,lo} supports emulated unsigned
> >> unpacking for short and char but misses the support for int.
> >> This patch
Hello-
I thought it might be a good time to check on this patch please? Thanks!
https://gcc.gnu.org/pipermail/gcc-patches/2021-July/576449.html
-Lewis
On Fri, Jul 30, 2021 at 4:13 PM Lewis Hyatt wrote:
>
> On Fri, Jan 29, 2021 at 10:46:30AM -0500, Lewis Hyatt wrote:
> > On Tue, Jan 26, 2021 at
On Thu, Jul 1, 2021 at 3:13 PM Martin Liška wrote:
>
> On 10/23/20 1:47 PM, Martin Liška wrote:
> > Hey.
>
> Hello.
>
> I deferred the patch for GCC 12. Since the time, I messed up with options
> I feel more familiar with the option handling. So ...
>
> >
> > This is a follow-up of the discussion
Richard Biener via Gcc-patches writes:
> This avoids leaving scalar if-converted code around for the case
> of BB vectorizing an if-converted loop body when using the very-cheap
> cost model. In this case we scan not vectorized scalar stmts in
> the basic-block vectorized for COND_EXPRs and force
Recursive call graph edges, even when they are hot and important for
the compiled program, can never have frequency bigger than one, even
when the actual time savings in the next recursion call are not
realized just once but depend on the depth of recursion. The current
IPA-CP effect propagation c
IPA-CP does not do a reasonable job when it is updating profile counts
after it has created clones of recursive functions. This patch
addresses that by:
1. Only updating counts for special-context clones. When a clone is
created for all contexts, the original is going to be dead and the
cgraph m
When profile feedback is available, IPA-CP takes the count of the
hottest node and then evaluates all call contexts relative to it.
This means that typically almost no clones for specialized contexts
are ever created because the maximum is some special function, called
from everywhere (that is like
To verify other changes in the patch series, I have been searching for
"Invalid sum of caller counts" string in symtab dump but found that
there are false warnings about functions which have their body removed
because they are now unreachable. Those are of course invalid and so
this patches avoids
Hi,
this patch set addresses a number of shortcomings of IPA-CP when it
has profile feedback data at its disposal. While at this point it is
mostly RFC material because I expect Honza will correct many of the
places where I use a wrong method of profile_count and should be using
some slightly dif
On Tue, Aug 24, 2021 at 12:23 PM Thomas Schwinge
wrote:
>
> Hi!
>
> On 2021-08-19T22:13:56+0200, I wrote:
> > On 2021-08-16T10:21:04+0200, Jakub Jelinek wrote:
> >> On Mon, Aug 16, 2021 at 10:08:42AM +0200, Thomas Schwinge wrote:
> > |> Concerning the current 'gcc/omp-low.c:omp_build_component_re
On Tue, Aug 24, 2021 at 11:38 AM Hongtao Liu wrote:
>
> On Tue, Aug 24, 2021 at 5:40 PM Hongtao Liu wrote:
> >
> > On Tue, Aug 17, 2021 at 9:52 AM Hongtao Liu wrote:
> > >
> > > On Mon, Aug 9, 2021 at 4:34 PM Hongtao Liu wrote:
> > > >
> > > > On Fri, Aug 6, 2021 at 7:27 PM Richard Biener via G
This avoids leaving scalar if-converted code around for the case
of BB vectorizing an if-converted loop body when using the very-cheap
cost model. In this case we scan not vectorized scalar stmts in
the basic-block vectorized for COND_EXPRs and force the vectorization
to be marked as not profitabl
PING^2
On 8/10/21 17:52, Martin Liška wrote:
PING^1
On 7/1/21 3:13 PM, Martin Liška wrote:
On 10/23/20 1:47 PM, Martin Liška wrote:
Hey.
Hello.
I deferred the patch for GCC 12. Since the time, I messed up with options
I feel more familiar with the option handling. So ...
This is a follo
Add a new option, -mfix-cmse-cve-2021-35465 and document it. Enable it
automatically for cortex-m33, cortex-m35p and cortex-m55.
gcc:
PR target/102035
* config/arm/arm.opt (mfix-cmse-cve-2021-35465): New option.
* doc/invoke.texi (Arm Options): Document it.
* confi
New tests for the erratum mitigation.
gcc/testsuite:
PR target/102035
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-13a.c: New test.
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-7a.c: Likewise.
* gcc.target/arm/cmse/mainline/8_1m/soft/cmse-8a.c: Likewise.
*
For Armv8.1-m we generate code that emits VLLDM directly and do not
rely on support code in the library, so emit the mitigation directly
as well, when required. In this case, we can use the compiler options
to determine when to apply the fix and when it is safe to omit it.
gcc:
PR target/
Arm recently disclosed a security-related erratum (CVE-2021-35465) for
some armv8-m and armv8.1-m products relating to use of the VLLDM
instruction during the transition from secure to non-secure state.
This patch implements the recommended software mitigation for this
erratum for use on unfixed s
Both lazy_store_multiple_insn and lazy_load_multiple_insn contain
invalid RTL (eg they contain a post_inc statement outside of a mem).
What's more, the instructions concerned do not modify their input
address register. We probably got away with this because they are
generated so late in the compil
Add the recommended erratum mitigation sequence to
__gnu_cmse_nonsecure_call for use on Armv8-m.main devices. Since this
is in the library code we cannot know in advance whether the core we
are running on will be affected by this, so always enable it.
libgcc:
PR target/102035
* con
The test for CMSE support being available in hardware currently
relies on the compiler not optimizing away a secure gateway operation.
But even that is suspect, because the SG instruction is just a NOP
on armv8-m implementations that do not support the security extension.
Replace the existing test
On Tue, Aug 24, 2021 at 6:25 PM liuhongt wrote:
>
> gcc/ChangeLog:
>
> PR target/101989
> * config/i386/sse.md (_vternlog):
> Enable avx512 embedded broadcast.
> (*_vternlog_all): Ditto.
> (_vternlog_mask): Ditto.
>
> gcc/testsuite/ChangeLog:
>
> PR
gcc/ChangeLog:
PR target/101989
* config/i386/sse.md (_vternlog):
Enable avx512 embedded broadcast.
(*_vternlog_all): Ditto.
(_vternlog_mask): Ditto.
gcc/testsuite/ChangeLog:
PR target/101989
* gcc.target/i386/pr101989-broadcast-1.c: New te
Hi!
On 2021-08-19T22:13:56+0200, I wrote:
> On 2021-08-16T10:21:04+0200, Jakub Jelinek wrote:
>> On Mon, Aug 16, 2021 at 10:08:42AM +0200, Thomas Schwinge wrote:
> |> Concerning the current 'gcc/omp-low.c:omp_build_component_ref', for the
> |> current set of offloading testcases, we never see a
>
> >
> > I noticed loop-doloop.c use _int version and likely_max, maybe you want
> > that here?
> >
> > est_niter = get_estimated_loop_iterations_int (loop);
> > if (est_niter == -1)
> > est_niter = get_likely_max_loop_iterations_int (loop)
>
> I think that are two different things - ge
On Tue, Aug 24, 2021 at 9:36 AM liuhongt wrote:
>
> Also optimize below 3 forms to vpternlog, op1, op2, op3 are
> register_operand or unary_p as (not reg)
>
> A: (any_logic (any_logic op1 op2) op3)
> B: (any_logic (any_logic op1 op2) (any_logic op3 op4)) op3/op4 should
> be equal to op1/op2
> C: (
On Tue, Aug 24, 2021 at 5:40 PM Hongtao Liu wrote:
>
> On Tue, Aug 17, 2021 at 9:52 AM Hongtao Liu wrote:
> >
> > On Mon, Aug 9, 2021 at 4:34 PM Hongtao Liu wrote:
> > >
> > > On Fri, Aug 6, 2021 at 7:27 PM Richard Biener via Gcc-patches
> > > wrote:
> > > >
> > > > On Fri, Aug 6, 2021 at 11:05
On Tue, Aug 17, 2021 at 9:52 AM Hongtao Liu wrote:
>
> On Mon, Aug 9, 2021 at 4:34 PM Hongtao Liu wrote:
> >
> > On Fri, Aug 6, 2021 at 7:27 PM Richard Biener via Gcc-patches
> > wrote:
> > >
> > > On Fri, Aug 6, 2021 at 11:05 AM Richard Sandiford
> > > wrote:
> > > >
> > > > Richard Biener via
On Tue, Aug 17, 2021 at 9:53 AM Hongtao Liu wrote:
>
> On Fri, Aug 6, 2021 at 2:06 PM Hongtao Liu wrote:
> >
> > On Tue, Aug 3, 2021 at 10:44 AM Hongtao Liu wrote:
> > >
> > > On Tue, Aug 3, 2021 at 3:34 AM Joseph Myers
> > > wrote:
> > > >
> > > > On Mon, 2 Aug 2021, liuhongt via Gcc-patches
Hi:
This patch extend change_zero_ext to change illegitimate constant
into constant pool, this will enable simplification of below:
Trying 5 -> 7:
5: r85:V4SF=[`*.LC0']
REG_EQUAL const_vector
7: r84:V4SF=vec_select(vec_concat(r85:V4SF,r85:V4SF),parallel)
REG_DEAD r85:V4SF
Hi
The patch disables gimple fold for float or double vec_min/max
builtin when fast-math is not set. Two test cases are added to verify
the patch.
The attachments are the patch diff and change log file.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is
this okay
On Tue, 24 Aug 2021, Richard Biener wrote:
> On Tue, 24 Aug 2021, Kewen.Lin wrote:
>
> > Hi Richi,
> >
> > on 2021/8/23 ??10:33, Richard Biener via Gcc-patches wrote:
> > > This removes --param vect-inner-loop-cost-factor in favor of looking
> > > at the estimated number of iterations of the inn
On Sun, Aug 22, 2021 at 4:03 PM Roger Sayle wrote:
>
>
>
> This patch is the next in the series to improve bit bounds in tree-ssa's
>
> bit CCP pass, this time: bounds for shifts and rotates by unknown amounts.
>
> This allows us to optimize expressions such as ((x&15)<<(y&24))&64.
>
> In this cas
On Tue, 24 Aug 2021, Xionghu Luo wrote:
>
>
> On 2021/8/19 20:11, Richard Biener wrote:
> >> - class loop *inn_loop = loop;
> >>
> >> if (ALWAYS_EXECUTED_IN (loop->header) == NULL)
> >> {
> >> @@ -3232,19 +3231,6 @@ fill_always_executed_in_1 (class loop *loop,
> >> sbitmap contain
> -Original Message-
> From: Prathamesh Kulkarni
> Sent: 24 August 2021 09:02
> To: gcc Patches ; Kyrylo Tkachov
>
> Subject: Re: [ARM] PR66791: Replace builtins for signed vmul_n intrinsics
>
> On Fri, 13 Aug 2021 at 16:40, Prathamesh Kulkarni
> wrote:
> >
> > On Thu, 5 Aug 2021 at 1
> -Original Message-
> From: Prathamesh Kulkarni
> Sent: 24 August 2021 09:01
> To: Christophe Lyon
> Cc: Kyrylo Tkachov ; gcc Patches patc...@gcc.gnu.org>
> Subject: Re: [ARM] PR66791: Replace builtins for vdup_n and vmov_n
> intrinsics
>
> On Tue, 17 Aug 2021 at 11:55, Prathamesh Ku
> -Original Message-
> From: Prathamesh Kulkarni
> Sent: 24 August 2021 09:01
> To: gcc Patches ; Kyrylo Tkachov
> ; Richard Earnshaw
>
> Subject: Re: [ARM] PR66791: Replace builtin in vld1_dup intrinsics
>
> On Fri, 13 Aug 2021 at 16:40, Prathamesh Kulkarni
> wrote:
> >
> > On Thu, 5
On Tue, Aug 24, 2021 at 8:04 AM apinski--- via Gcc-patches
wrote:
>
> From: Andrew Pinski
>
> There are a few problems with download_prerequisites are
> described in PR 82704. The first is on busy-box version of
> shasum and md5sum the extended option --check don't exist
> so just use -c. The s
On Fri, 13 Aug 2021 at 16:40, Prathamesh Kulkarni
wrote:
>
> On Thu, 5 Aug 2021 at 15:44, Prathamesh Kulkarni
> wrote:
> >
> > On Mon, 12 Jul 2021 at 15:24, Prathamesh Kulkarni
> > wrote:
> > >
> > > On Mon, 12 Jul 2021 at 15:23, Prathamesh Kulkarni
> > > wrote:
> > > >
> > > > On Mon, 5 Jul 20
On Fri, 13 Aug 2021 at 16:40, Prathamesh Kulkarni
wrote:
>
> On Thu, 5 Aug 2021 at 15:37, Prathamesh Kulkarni
> wrote:
> >
> > On Thu, 29 Jul 2021 at 19:58, Prathamesh Kulkarni
> > wrote:
> > >
> > > Hi,
> > > The attached patch replaces builtins in vld1_dup intrinsics with call
> > > to corresp
On Tue, 17 Aug 2021 at 11:55, Prathamesh Kulkarni
wrote:
>
> On Thu, 12 Aug 2021 at 19:04, Christophe Lyon
> wrote:
> >
> >
> >
> > On Thu, Aug 12, 2021 at 1:54 PM Prathamesh Kulkarni
> > wrote:
> >>
> >> On Wed, 11 Aug 2021 at 22:23, Christophe Lyon
> >> wrote:
> >> >
> >> >
> >> >
> >> > On
On Tue, Aug 24, 2021 at 1:41 AM Martin Sebor via Gcc-patches
wrote:
>
> When determining the properties of objects referenced by a PHI's
> arguments, compute_objsize() has logic to filter out null pointers.
> It also has special logic that tries to deal with arguments that
> refer to the same obje
>>> So my worry here is this is really a host property -- ie, this is
>>> behavior of where GCC runs, not the target for which GCC is generating code.
>>>
>>> That implies that the change in aix.h is wrong. aix.h is for the
>>> target, not the host -- you don't want to define something like
>>> HO
On Mon, Aug 23, 2021 at 11:18 PM Indu Bhagat via Gcc-patches
wrote:
>
> Hello,
>
> What is the expected DWARF for extern variable in the following cases? I
> am seeing that the DWARF generated is different with gcc8.4.1 vs gcc-trunk.
>
> Testcase 1
> --
> extern const char a[];
>
> int foo
On 2021/8/19 20:11, Richard Biener wrote:
>> - class loop *inn_loop = loop;
>>
>> if (ALWAYS_EXECUTED_IN (loop->header) == NULL)
>> {
>> @@ -3232,19 +3231,6 @@ fill_always_executed_in_1 (class loop *loop, sbitmap
>> contains_call)
>> to disprove this if possible). */
>>
On Mon, Aug 23, 2021 at 4:30 PM Thomas Schwinge wrote:
>
> Hi!
>
> On 2021-08-20T09:51:36+0200, Richard Biener
> wrote:
> > On Thu, Aug 19, 2021 at 10:14 PM Thomas Schwinge
> > wrote:
> >> Richard, maybe you have an opinion here, in particular about my
> >> "SLP vectorizer" comment below? Plea
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