Hi,
This patch is to apply the same fix as r267528 to another similar case
bb-slp-over-widen-2.c which requires misaligned vector access.
Verified it on ppc64-redhat-linux (Power7 BE).
Is it ok for trunk?
BR,
Kewen
---
gcc/testsuite/ChangeLog
2020-02-26 Kewen Lin
PR testsu
On 2/21/20 5:02 AM, Richard Biener wrote:
This applies file mapping when emitting the directory table
directly instead of using the assemblers .file directive where
we already correctly apply the map. Notably the non-assembler
path is used for the early debug emission for LTO.
Bootstrapped and
On 2/24/20 11:44 AM, Marek Polacek wrote:
Here we crash when constexpr-initializing a class member of empty class
type with [[no_unique_address]]. Without the attribute we would have
a ctor (that initializes bar) of the form
{ .D.2173 = { .x = {} } }
but with the attribute reduced_constant_
On 2/24/20 12:30 PM, Patrick Palka wrote:
On Mon, 24 Feb 2020, Jason Merrill wrote:
On 2/20/20 7:27 PM, Patrick Palka wrote:
This patch improves our concept diagnostics in two ways. First, it sets a
more
precise location for the constraint expressions built in
finish_constraint_binary_op. As
On 2/24/20 1:09 PM, Marek Polacek wrote:
DR 1423, which supersedes DR 654, says that you can't copy-init
a bool from a std::nullptr_t:
bool b = nullptr; // error
Conversely, it works with direct-initialization which is more
permissive than copy-initialization.
No code changes necessary sin
On 2/24/20 3:41 PM, Marek Polacek wrote:
This ICEs since my patch for P0388, which allowed conversions to arrays
of unknown bound, but not the reverse, so these two static_casts are
ill-formed.
[expr.static.cast]/3 says that "cv1 T1" and "cv2 T2" have to be
reference-compatible and the comment i
On 2/25/20 6:07 PM, Jakub Jelinek wrote:
Hi!
The following testcase is rejected in 8.3, but was accepted in 8.2 and
is in 9.x. This started with my PR87934
* constexpr.c (cxx_eval_constant_expression) : Do
re-process TREE_CONSTANT CONSTRUCTORs if they aren't reduced constant
On 2/25/20 1:55 PM, Marek Polacek wrote:
On Tue, Feb 25, 2020 at 01:27:12PM -0500, Jason Merrill wrote:
On 2/25/20 12:52 PM, Marek Polacek wrote:
On Mon, Feb 24, 2020 at 05:15:45PM -0500, Jason Merrill wrote:
On 2/20/20 11:52 AM, Marek Polacek wrote:
On Thu, Feb 20, 2020 at 12:13:07AM +,
On 2/25/20 12:45 PM, Segher Boessenkool wrote:
Hi!
On Tue, Feb 25, 2020 at 04:53:17PM +, GT wrote:
‐‐‐ Original Message ‐‐‐
On Sunday, February 23, 2020 11:45 AM, Bill Schmidt
wrote:
As I just wrote on gcc-patches, we should disable libmvec for powerpc64.
The vector ABI as writ
Hi!
The following testcase is miscompiled in 8+.
The problem is that check_no_overlap has a special case for INTEGER_CST
marked stores (i.e. stores of constants), if both all currenly merged stores
and the one under consideration for merging with them are marked that way,
it anticipates that other
Hi!
The following testcase is rejected in 8.3, but was accepted in 8.2 and
is in 9.x. This started with my PR87934
* constexpr.c (cxx_eval_constant_expression) : Do
re-process TREE_CONSTANT CONSTRUCTORs if they aren't reduced constant
expressions.
backport, where the NSDMI
On Sat, 2020-02-22 at 18:15 -0600, Segher Boessenkool wrote:
> On Mon, Feb 17, 2020 at 02:48:20PM -0600, will schmidt wrote:
> > On Thu, 2020-02-13 at 17:23 -0600, Segher Boessenkool wrote:
> > > On Thu, Feb 13, 2020 at 04:41:09PM -0600, will schmidt wrote:
> > > > -/* { dg-final { scan-tree-dump-t
PowerPC Add has_arch_pwr* checks
Hi,
This adds some procs to target-supports.exp that will allow
our testcases to accurately determine which -mcpu= option
is enabled at the time of our testcase compile.
For completeness I've added blobs to cover the ARCH_PWR5
through ARCH_PWR9 targets.
With
Release checking has exposed a bug in the transformation of
attribute access to the condensed internal format: the handler
modifies the declaration's type in place, which subsequently
triggers an ICE. A fix also exposed another bug where
the condensed format sets the attribute argument's value
di
On Tue, Feb 25, 2020 at 10:49:16AM -0600, Peter Bergner wrote:
> POWER9 added the stxv instruction, which is d-form store. When we compile
> the FAILing test cases in PR93913 when -mcpu=power9 is the default, then
> we may sometimes get stxv rather than stvx generated. The fix here is
> to allow
On 2/25/20 4:00 PM, Segher Boessenkool wrote:
On Mon, Feb 24, 2020 at 03:20:30PM -0600, Bill Schmidt wrote:
These two test cases have assembly code that requires a valid TOC.
Make sure that we don't use the PC-relative ABI extensions that
violate this requirement.
Tested and verified on powerpc
On Mon, Feb 24, 2020 at 03:20:30PM -0600, Bill Schmidt wrote:
> These two test cases have assembly code that requires a valid TOC.
> Make sure that we don't use the PC-relative ABI extensions that
> violate this requirement.
>
> Tested and verified on powerpc64le-unknown-linux-gnu. Is this
> okay
Hi Carl,
On Mon, Feb 24, 2020 at 11:37:11AM -0800, Carl Love wrote:
> PR target/91276
> * doc/extend.texi (PowerPC AltiVec/VSX __builtin_crypto_vpmsum
> Built-in Functions): Fix builtin name for function taking vector
> unsigned short, vector unsigned int and vector unsign
On Tue, 25 Feb 2020, GT wrote:
> 2. In GCC making SIMD clones available only for powerpc64le should be
> sufficient to guarantee that the Vector Function ABI is applied only for
> systems implementing the ELFv2 ABI. Right? Then, which macro is to be
> tested for in rs6000_simd_clone_usable? I e
GT writes:
> Are we all agreed that the POWER Vector Function ABI will be implemented only
> for powerpc64le?
>
> If so, here are a few more questions:
>
> 1. The GLIBC implementation has files Makefile, Versions, configure,
> configure.ac among others
> in directory sysdeps/powerpc/powerpc64/fp
Hi!
Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk as
obvious.
2020-02-25 Jakub Jelinek
PR other/93912
* config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
-> probability.
* cfghooks.c (verify_flow_info): Likewise.
We consider all TYPE_ARGUMENT_PACKS distinct types, leading to problems
with redeclarations.
This patch fixes things by:
a) marking all such types for structural comparison
b) teaching structural_comptypes how to compare them.
1) It appears that NONTYPE_ARGUMENT_PACKS just work, I think because
There was a mistake in forward-porting and contributing some
vxworks7r2 changes, that caused a conditional to be dropped around a
couple of preprocessor directives, needed only up to vxworks6, that
change the compiler's behavior WRT introducing dollars and dots in
symbol names.
This deviates GCC's
Including limits.h on vxworks pollutes the global namespace with SH
and many other platform names; work around it.
Tested on the affected platform. Ok to install?
for gcc/testsuite/ChangeLog
* gcc.target/aarch64/vect-mull.x (SH): Undefine.
---
gcc/testsuite/gcc.target/aarch64/vect-mu
This adds constexpr to 11 algorithms defined in as per P1645R1.
Tested on x86_64-pc-linux-gnu, OK to commit?
libstdc++-v3/ChangeLog:
P1645R1 constexpr for algorithms
* include/bits/stl_numeric.h (iota, accumulate, inner_product,
partial_sum, adjacent_difference): Make c
Hi!
On Tue, Feb 25, 2020 at 12:15:52PM -0600, will schmidt wrote:
> Adds some logic in altivec_resolve_overloaded_builtin() to handle the
> scenario where const * arguments are passed in to the vec_xl_len()
> builtin.
> The existing logic to remove const from pointers does not kick in since
> th
Hello-
Just checking whether the below is OK for gcc 10 changes.html please. Thanks!
https://gcc.gnu.org/ml/gcc-patches/2020-01/msg01667.html
-Lewis
On Fri, Jan 24, 2020 at 10:25 AM Lewis Hyatt wrote:
>
> Hello-
>
> There was a comment on PR67224:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=
On Tue, Feb 25, 2020 at 01:55:24PM -0500, Marek Polacek wrote:
> On Tue, Feb 25, 2020 at 01:27:12PM -0500, Jason Merrill wrote:
> > On 2/25/20 12:52 PM, Marek Polacek wrote:
> > > On Mon, Feb 24, 2020 at 05:15:45PM -0500, Jason Merrill wrote:
> > > > On 2/20/20 11:52 AM, Marek Polacek wrote:
> > >
On Tue, Feb 25, 2020 at 01:27:12PM -0500, Jason Merrill wrote:
> On 2/25/20 12:52 PM, Marek Polacek wrote:
> > On Mon, Feb 24, 2020 at 05:15:45PM -0500, Jason Merrill wrote:
> > > On 2/20/20 11:52 AM, Marek Polacek wrote:
> > > > On Thu, Feb 20, 2020 at 12:13:07AM +, Jason Merrill wrote:
> > >
Hi!
On Tue, Feb 25, 2020 at 04:53:17PM +, GT wrote:
> ‐‐‐ Original Message ‐‐‐
> On Sunday, February 23, 2020 11:45 AM, Bill Schmidt
> wrote:
> > As I just wrote on gcc-patches, we should disable libmvec for powerpc64.
> > The vector ABI as written isn't compatible with ELFv1. We wo
Mihail Ionescu writes:
> Hi,
>
> On 02/17/2020 05:53 PM, Mihail Ionescu wrote:
>> Hi,
>>
>> This patch adds support for the bf16 duplicate and reinterpret intrinsics.
>> ACLE documents are at https://developer.arm.com/docs/101028/latest
>> ISA documents are at https://developer.arm.com/docs/ddi05
Mihail Ionescu writes:
> Hi Richard,
>
> On 02/18/2020 05:06 PM, Richard Sandiford wrote:
>> Thanks. When trying a bootstrap locally I get:
>>
>> include/arm_neon.h:34709:38: error: cannot convert ‘const __bf16*’ to ‘const
>> __fp16*’
>> 34709 | __o = __builtin_aarch64_ld1x2v4hf ((const
>> _
On 2/25/20 12:52 PM, Marek Polacek wrote:
On Mon, Feb 24, 2020 at 05:15:45PM -0500, Jason Merrill wrote:
On 2/20/20 11:52 AM, Marek Polacek wrote:
On Thu, Feb 20, 2020 at 12:13:07AM +, Jason Merrill wrote:
On 2/19/20 10:15 PM, Marek Polacek wrote:
On Fri, Feb 14, 2020 at 12:24:30AM +0100,
PR90763: PowerPC vec_xl_len should take const argument.
Hi,
Adds some logic in altivec_resolve_overloaded_builtin() to handle the
scenario where const * arguments are passed in to the vec_xl_len()
builtin.
The existing logic to remove const from pointers does not kick in since
the return type i
On Tue, 25 Feb 2020, Jonathan Wakely wrote:
> On 24/02/20 18:39 -0500, Patrick Palka wrote:
> > On Mon, 24 Feb 2020, Patrick Palka wrote:
> >
> > > libstdc++-v3/ChangeLog:
> > >
> > > LWG 3301 transform_view::_Iterator has incorrect iterator_category
> > > * include/std/ranges (transform_vie
On Mon, Feb 24, 2020 at 05:15:45PM -0500, Jason Merrill wrote:
> On 2/20/20 11:52 AM, Marek Polacek wrote:
> > On Thu, Feb 20, 2020 at 12:13:07AM +, Jason Merrill wrote:
> > > On 2/19/20 10:15 PM, Marek Polacek wrote:
> > > > On Fri, Feb 14, 2020 at 12:24:30AM +0100, Jason Merrill wrote:
> > >
Hi Kyrill,
On 25/02/2020 17:22, Kyrill Tkachov wrote:
Hi Dennis,
On 2/25/20 5:18 PM, Dennis Zhang wrote:
Hi Kyrill,
On 25/02/2020 12:18, Kyrill Tkachov wrote:
Hi Dennis,
On 2/25/20 11:54 AM, Dennis Zhang wrote:
Hi all,
On 07/01/2020 12:12, Dennis Zhang wrote:
> Hi all,
>
> This patch is p
On 24/02/20 18:26 -0500, Patrick Palka wrote:
libstdc++-v3/ChangeLog:
LWG 3397 basic_istream_view::iterator should not provide
iterator_category
* include/std/ranges (basic_istream_view:_Iterator::iterator_category):
Rename to ...
(basic_istream_view:_Iter
On 24/02/20 18:39 -0500, Patrick Palka wrote:
On Mon, 24 Feb 2020, Patrick Palka wrote:
libstdc++-v3/ChangeLog:
LWG 3301 transform_view::_Iterator has incorrect iterator_category
* include/std/ranges (transform_view::_Iterator::_S_iter_cat): Adjust
determination of iter
Hi Dennis,
On 2/25/20 5:18 PM, Dennis Zhang wrote:
Hi Kyrill,
On 25/02/2020 12:18, Kyrill Tkachov wrote:
Hi Dennis,
On 2/25/20 11:54 AM, Dennis Zhang wrote:
Hi all,
On 07/01/2020 12:12, Dennis Zhang wrote:
> Hi all,
>
> This patch is part of a series adding support for Armv8.6-A features.
>
On 24/02/20 18:26 -0500, Patrick Palka wrote:
libstdc++-v3/ChangeLog:
LWG 3313 join_view::_Iterator::operator-- is incorrectly constrained
* include/std/ranges (join_view::_Iterator::operator--): Require that
range_reference_t<_Base> models common_range.
* testsui
On 24/02/20 18:26 -0500, Patrick Palka wrote:
libstdc++-v3/ChangeLog:
LWG 3325 Constrain return type of transformation function for
transform_view
* include/std/ranges (transform_view): Constrain the return type of the
transformation function as per LWG 3325.
On 24/02/20 18:26 -0500, Patrick Palka wrote:
libstdc++-v3/ChangeLog:
LWG 3292 iota_view is under-constrained
* include/std/ranges (iota_view): Require that _Winc models semiregular
as per LWG 3292.
* testsuite/std/ranges/iota/lwg3292_neg.cc: New test.
OK.
On 25/02/20 16:01 +0200, Ville Voutilainen wrote:
On Tue, 25 Feb 2020 at 15:36, Jonathan Wakely wrote:
I think what I'd really like to do is get rid of __memmove entirely.
We already have code that does the explicit assignment in a loop, for
the cases where we can't use __builtin_memmove becaus
Hi Kyrill,
On 25/02/2020 12:18, Kyrill Tkachov wrote:
Hi Dennis,
On 2/25/20 11:54 AM, Dennis Zhang wrote:
Hi all,
On 07/01/2020 12:12, Dennis Zhang wrote:
> Hi all,
>
> This patch is part of a series adding support for Armv8.6-A features.
> It depends on the patch enabling Arm BFmode
> https:
‐‐‐ Original Message ‐‐‐
On Sunday, February 23, 2020 11:45 AM, Bill Schmidt
wrote:
> On 2/21/20 6:49 AM, Tulio Magno Quites Machado Filho wrote:
>
> > +Bill, +Segher
> >
> > GT writes:
> >
> > > Can I have until tomorrow morning to figure out exactly where/how to link
> > > the Power
POWER9 added the stxv instruction, which is d-form store. When we compile
the FAILing test cases in PR93913 when -mcpu=power9 is the default, then
we may sometimes get stxv rather than stvx generated. The fix here is
to allow both mnemonics when counting.
Ok for trunk and GCC 9, where these are
On Tue, 25 Feb 2020 at 14:44, Kyrill Tkachov
wrote:
>
> Hi Christophe,
>
> On 2/24/20 2:16 PM, Christophe Lyon wrote:
> > Ping?
> >
> > I'd also like to backport this and the main patch (svn r279463,
> > r10-5505-ge24f6408df1e4c5e8c09785d7b488c492dfb68b3)
> > to the gcc-9 branch.
> >
> > I found t
On Tue, Feb 25, 2020 at 09:28:59AM +0100, Tobias Burnus wrote:
> Thanks for the cleanup. Committed (with "git commit --author 'St...'" + git
> push) as Rev. r10-6836-gfe86f537f010828b7f77ff459cef138e84071660
>
Thanks.
--
Steve
Hi all,
Third version of the patch here addressing comments.
This patch enables the Armv8.1-M Mainline LOB (low overhead branch) extension
low overhead loops (LOL) feature by using the 'loop-doloop' pass.
Given the following function:
void
loop (int *a)
{
for (int i = 0; i < 1000; i++)
a[
Hi,
On 02/17/2020 05:53 PM, Mihail Ionescu wrote:
Hi,
This patch adds support for the bf16 duplicate and reinterpret intrinsics.
ACLE documents are at https://developer.arm.com/docs/101028/latest
ISA documents are at https://developer.arm.com/docs/ddi0596/latest
Regression tested on aarch64-no
Hi Richard,
On 02/18/2020 05:06 PM, Richard Sandiford wrote:
Thanks. When trying a bootstrap locally I get:
include/arm_neon.h:34709:38: error: cannot convert ‘const __bf16*’ to ‘const
__fp16*’
34709 | __o = __builtin_aarch64_ld1x2v4hf ((const __builtin_aarch64_simd_bf
*) __a);
|
On Tue, 25 Feb 2020 at 15:36, Jonathan Wakely wrote:
> I think what I'd really like to do is get rid of __memmove entirely.
> We already have code that does the explicit assignment in a loop, for
> the cases where we can't use __builtin_memmove because the type is not
> trivially copyable.
>
> We
Hi Christophe,
On 2/24/20 2:16 PM, Christophe Lyon wrote:
Ping?
I'd also like to backport this and the main patch (svn r279463,
r10-5505-ge24f6408df1e4c5e8c09785d7b488c492dfb68b3)
to the gcc-9 branch.
I found the problem addressed by this patch while validating the
backport to gcc-9: although
On 25/02/20 12:40 +, Jonathan Wakely wrote:
The std::move and std::move_backward algorithms dispatch to the
std::__memmove helper when appropriate. That function uses a
pointer-to-const for the source values, preventing them from being
moved. The two callers of that function have the same pro
On 25/02/20 12:33 +, Jonathan Wakely wrote:
On 25/02/20 09:52 +0100, Sebastian Huber wrote:
Hello Thomas,
some operating systems provide already an implementation of binary
semaphores with a compatible API, e.g. RTEMS. It would be nice if I
could use it in libstdc++. I guess you don't wan
On 25/02/20 12:40 +, Jonathan Wakely wrote:
The std::move and std::move_backward algorithms dispatch to the
std::__memmove helper when appropriate. That function uses a
pointer-to-const for the source values, preventing them from being
moved. The two callers of that function have the same pro
Hi!
On Tue, Feb 25, 2020 at 10:10:08AM +0100, Jakub Jelinek wrote:
> git is miscompiled on s390x-linux with -O2 -march=zEC12 -mtune=z13.
> I've managed to reduce it into the following testcase. The problem is that
> during combine we see the s->k = -1; bitfield store and change the SET_SRC
> from
The std::move and std::move_backward algorithms dispatch to the
std::__memmove helper when appropriate. That function uses a
pointer-to-const for the source values, preventing them from being
moved. The two callers of that function have the same problem.
Rather than altering __memmove and its call
On 25/02/20 09:52 +0100, Sebastian Huber wrote:
Hello Thomas,
some operating systems provide already an implementation of binary
semaphores with a compatible API, e.g. RTEMS. It would be nice if I
could use it in libstdc++. I guess you don't want to have #ifdef
__rtems__ stuff in this code. W
Hi Dennis,
On 2/25/20 11:54 AM, Dennis Zhang wrote:
Hi all,
On 07/01/2020 12:12, Dennis Zhang wrote:
> Hi all,
>
> This patch is part of a series adding support for Armv8.6-A features.
> It depends on the patch enabling Arm BFmode
> https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01448.html
>
> T
Hi all,
On 07/01/2020 12:12, Dennis Zhang wrote:
Hi all,
This patch is part of a series adding support for Armv8.6-A features.
It depends on the patch enabling Arm BFmode
https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01448.html
This patch adds intrinsics for brain half-precision float-point
On Tue, Feb 25, 2020 at 11:36 AM Eric Botcazou wrote:
>
> Hi,
>
> this is a regression present on all active branches: the attached testcase
> fails to link with debug info in LTO mode because of an undefined reference to
> a symbol coming from the object files containing the early debug info.
>
>
This adds a testcase for some basic FRE functionality.
2020-02-25 Richard Biener
* gcc.dg/tree-ssa/ssa-fre-86.c: New testcase.
---
gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-86.c | 20
1 file changed, 20 insertions(+)
create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/s
Hi,
On 2020/2/24 4:16 PM, Marc Glisse wrote:
On Mon, 24 Feb 2020, Li Jia He wrote:
Hi,
On 2020/2/22 11:12 PM, Marc Glisse wrote:
On Tue, 18 Feb 2020, Li Jia He wrote:
Also the pattern doing the standalone transform does
/* Optimize TRUNC_MOD_EXPR by a power of two into a BIT_AND_EXPR,
Hi, Jakub!
Jakub Jelinek writes:
>> +When the option is not specified, the active set of checks depends on
>> context.
>> +Namely, bootstrap stage 1 defaults to @samp{--enable-checking=yes}, builds
>> +from release archives default to @samp{--enable-checking=release}, and
> Is archives the right w
On Tue, Feb 25, 2020 at 01:36:13PM +0300, Roman Zhuykov wrote:
> Not sure how to formulate it better, just "builds from release branch or
> release archives default to ..." ?
"from a release branch or" or "from release branches or", otherwise LGTM.
Jakub
Hi,
this is a regression present on all active branches: the attached testcase
fails to link with debug info in LTO mode because of an undefined reference to
a symbol coming from the object files containing the early debug info.
Tested on x86_64-suse-linux, OK for all active branches?
2019-20
> Hi!
>
> dump_passes pushes a dummy function for which it evaluates the gates
> and checks whether the pass is enabled or disabled.
> Unfortunately, if any -fdisable-*-*/-fenable-*-* options were seen,
> we ICE during is_pass_explicitly_enabled_or_disabled because slot
> is non-NULL then and the
I've applied the following backports to gcc 8 (all approved earlier).
Tested on aarch64-linux-gnu and x86_64-linux-gnu.
Richard
>From 7a2f576c3b40eca0a846553af5b1dfb05d84eb71 Mon Sep 17 00:00:00 2001
From: Richard Sandiford
Date: Fri, 9 Aug 2019 09:37:55 +
Subject: [PATCH 1/5] Reject tail
Hi,
Several scev/IVOPTs cases aim to check some array references are sceved and
later marked as REFERENCE ADDRESS IV groups. With IV group type dumping
improving, these check strings can be improved. Otherwise, they become fragile
with dumping changes.
This patch is to keep check strings concise
Hi,
As the proposed hook changes, updated this with main changes:
1) Check with addr_offset_valid_p instead.
2) Check the 1st and the last use for the whole address group.
3) Scale up group costs accordingly.
Bootstrapped/regtested on powerpc64le-linux-gnu (LE).
BR,
Kewen
---
gcc/
on 2020/1/20 下午9:14, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Jan 20, 2020 at 10:42:12AM +, Richard Sandiford wrote:
>> "Kewen.Lin" writes:
>>> gcc/ChangeLog
>>>
>>> 2020-01-16 Kewen Lin
>>>
>>> * config/rs6000/rs6000.c (TARGET_STRIDE_DFORM_VALID_P): New macro.
>>> (rs6000_strid
This avoids altering possibly shared SLP subtrees when attempting
to get rid of permutations in SLP reductions by copying the SLP
subtree before re-arranging stmts in it.
It's a little bit awkward and some refactoring I've done for GCC11
would make this less so but it's not the point to push this
Hi!
In Fedora we configure GCC with --with-arch=zEC12 --with-tune=z13 right now
and furthermore redhat-rpm-config adds to rpm packages -march=zEC12 -mtune=z13
options (among others). While looking at the git compilation, I've been
surprised that -O2 actually behaves differently from -O2 -mtune=z1
On Tue, 25 Feb 2020, Jakub Jelinek wrote:
> Hi!
>
> dump_passes pushes a dummy function for which it evaluates the gates
> and checks whether the pass is enabled or disabled.
> Unfortunately, if any -fdisable-*-*/-fenable-*-* options were seen,
> we ICE during is_pass_explicitly_enabled_or_disabl
Hi!
git is miscompiled on s390x-linux with -O2 -march=zEC12 -mtune=z13.
I've managed to reduce it into the following testcase. The problem is that
during combine we see the s->k = -1; bitfield store and change the SET_SRC
from a pseudo into a constant:
(set (zero_extract:DI (mem/j:HI (plus:DI (re
Hello Thomas,
some operating systems provide already an implementation of binary
semaphores with a compatible API, e.g. RTEMS. It would be nice if I
could use it in libstdc++. I guess you don't want to have #ifdef
__rtems__ stuff in this code. What about defining a binary semaphore API
for gt
Hi!
dump_passes pushes a dummy function for which it evaluates the gates
and checks whether the pass is enabled or disabled.
Unfortunately, if any -fdisable-*-*/-fenable-*-* options were seen,
we ICE during is_pass_explicitly_enabled_or_disabled because slot
is non-NULL then and the code will do:
On Tue, Feb 25, 2020 at 11:20:58AM +0300, Roman Zhuykov wrote:
> Sandra and Richard, thank you for review!
>
> Since 'types' checks are included into 'yes' and I addressed all other
> hints, I have pushed updated patch as r10-6832.
>
> Jakub, Richard B, can I apply it to 8 and 9 ?
Yes.
> +When
Thanks for the cleanup. Committed (with "git commit --author 'St...'" +
git push) as Rev. r10-6836-gfe86f537f010828b7f77ff459cef138e84071660
Tobias
On 2/25/20 1:40 AM, Steve Kargl wrote:
Dead code is probably not the right description.
Something like 'result that is not used' is better.
In eve
Hi all!
22.02.2020 6:25, Sandra Loosemore wrote:
> On 2/11/20 7:46 AM, Roman Zhuykov wrote:
>> Since I have to ask again about backports, I've decided to make few more
>> steps and with Alexander's help created new patch which rewords the
>> whole option description and covers items (3), (4) and (
Hi!
All other diagnostic messages have ? after ; did you mean ..., but this one
doesn't.
Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, committed
to trunk as obvious.
2020-02-25 Jakub Jelinek
PR c/93858
* c-pragma.c (handle_pragma_diagnostic): Add missin
Hi!
Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk
as obvious.
2020-02-25 Jakub Jelinek
PR translation/93864
* config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
paramter -> parameter.
* config/aarch64/aarch64.c (aarch
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