Hi!
The following patch is first step towards fixing PR93582.
vn_reference_lookup_3 right now punts on anything that isn't byte aligned,
so to be able to lookup a constant bitfield store, one needs to use
the exact same COMPONENT_REF, otherwise it isn't found.
This patch lifts up that that restri
On Wed, 12 Feb 2020, Segher Boessenkool wrote:
> On Wed, Feb 12, 2020 at 11:53:22AM +0100, Richard Biener wrote:
> > On Wed, 12 Feb 2020, Segher Boessenkool wrote:
> > > On Wed, Feb 12, 2020 at 09:12:58AM +0100, Richard Biener wrote:
> > > > On Tue, 11 Feb 2020, Segher Boessenkool wrote:
> > > > >
On Thu, Feb 06, 2020 at 03:27:29PM -0500, David Malcolm wrote:
> gcc/testsuite/ChangeLog:
> PR analyzer/93212
> * g++.dg/analyzer/analyzer.exp: New subdirectory and .exp suite.
> * g++.dg/analyzer/malloc.C: New test.
> * g++.dg/analyzer/pr93212.C: New test.
The test FAILs w
I've submitted a bug tracker,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93707.
The root cause is that for a self-recursive function, a for-all-contexts clone
could generate
an edge whose callee is not the function. Therefore, to check whether an edge
stands for a
recursive call during clonin
We use this in the sim tree currently. Rather than require people to
have pkg-config installed, include it in the config/ dir.
2012-12-23 Mike Frysinger
* pkg.m4: New file from pkg-config-0.29.2.
---
config/pkg.m4 | 275 ++
1 file chang
SVN r216772 accidentally copied & pasted this prototype when adding
other ones nearby.
2020-02-13 Mike Frysinger
* libiberty.h (strverscmp): Delete duplicate prototype.
---
include/ChangeLog | 4
include/libiberty.h | 5 -
2 files changed, 4 insertions(+), 5 deletions(-)
d
vxworks7 headers haven't required fixes, and we've long avoided
running fixinc on them.
The problem with that is that, with a dummy fixinc, mkheaders wipes
out include-fixed but then multi_dir subdirs are not created again, so
we end up with a limits.h named after each multi_dir, when there are
Hi
As mentioned in PR93724, several intrinsic macros lack a closing
parenthesis. These macros are only used with -O0 option, and currently
unit tests use -O2, so not covered.
Bootstrap ok, regression tests on i386/x86_64 is ok.
Ok for trunk?
Changelog
gcc/
* config/i386/avx512vbmi2in
While partially instantiating a generic lambda, we can encounter pack
expansions or constexpr if where we can't actually do the substitution
immediately, and instead remember a partial instantiation context
in *_EXTRA_ARGS. This includes any local_specializations used in the
pattern or condition.
On Wed, Feb 12, 2020 at 11:27:01PM +0100, Jakub Jelinek wrote:
> On Mon, Feb 10, 2020 at 01:45:42PM -0500, Michael Meissner wrote:
> > This patch renames the PowerPC internal switch -mprefixed-addr to be
> > -mprefixed.
>
> --- gcc/config/rs6000/rs6000.opt
> +++ gcc/config/rs6000/rs6000.opt
> @@ -
On Wed, Feb 12, 2020 at 11:27:01PM +0100, Jakub Jelinek wrote:
> On Mon, Feb 10, 2020 at 01:45:42PM -0500, Michael Meissner wrote:
> > This patch renames the PowerPC internal switch -mprefixed-addr to be
> > -mprefixed.
> This change broke the gcc.target/powerpc/pr93122.c test, so it now
> FAIL: g
On Mon, Feb 10, 2020 at 01:45:42PM -0500, Michael Meissner wrote:
> This patch renames the PowerPC internal switch -mprefixed-addr to be
> -mprefixed.
--- gcc/config/rs6000/rs6000.opt
+++ gcc/config/rs6000/rs6000.opt
@@ -570,8 +570,8 @@ mfuture
Target Report Mask(FUTURE) Var(rs6000_isa_flags)
Us
On Wed, Feb 12, 2020 at 11:53:22AM +0100, Richard Biener wrote:
> On Wed, 12 Feb 2020, Segher Boessenkool wrote:
> > On Wed, Feb 12, 2020 at 09:12:58AM +0100, Richard Biener wrote:
> > > On Tue, 11 Feb 2020, Segher Boessenkool wrote:
> > > > Basic block partitioning has wildly disproportionate fall
Another minor cleanup for the H8 port.
There was another pattern that handles shortening of comparison
operators. It handles shortening from HI->QI (the other handled SI->HI
and SI->QI).
This patch uses a mode iterator to handle them all with one pattern.
It also installs the correct version o
On Wed, Feb 12, 2020 at 01:21:58PM -0700, Martin Sebor wrote:
> On 2/11/20 5:28 PM, Jason Merrill wrote:
> > On 2/11/20 9:00 PM, Martin Sebor wrote:
> > > r270155, committed in GCC 9, introduced a transformation that strips
> > > redundant trailing zero initializers from array initializer lists in
On Wed, Feb 12, 2020 at 09:07:27AM +0100, Richard Biener wrote:
> On Tue, 11 Feb 2020, Segher Boessenkool wrote:
>
> > On Tue, Feb 11, 2020 at 02:58:47PM +0100, Richard Biener wrote:
> > > On Tue, 11 Feb 2020, Roman Zhuykov wrote:
> > > > 11.02.2020 11:01, Richard Biener wrote:
> > > > Sound good,
On Thu, 2020-02-06 at 14:05 +0100, Mihailo Stojanovic wrote:
> Unnecessary moves around dpadd and dpsub are caused by different pseudos
> being assigned to the input-output operands which correspond to the same
> register.
>
> Just like for the MSA multiply-accumulate instructions, this forces the
On Mon, 2020-02-10 at 10:24 +0100, Jakub Jelinek wrote:
> Hi!
>
> I'd like to ping a couple of patches:
>
> PR target/91913 - arm movsi + cmpsi -> movsi_compare0 peephole2 ICE fix
>https://gcc.gnu.org/ml/gcc-patches/2020-02/msg00010.html
Letting the ARM guys deal with this.
>
> PR preproce
Ping
On Wed, Jan 29, 2020 at 8:07 AM Christian Biesinger
wrote:
>
> Ping
>
> On Sat, Nov 23, 2019 at 12:30 AM Christian Biesinger
> wrote:
> >
> > Normally the toplevel Makefile will pass various CC=foo and other
> > flags down to subdir Makefiles. However, for Gnulib this is a problem
> > becau
On Wed, 12 Feb 2020, Sandra Loosemore wrote:
> Hmmm, I tried again and saw that autoconf didn't even touch the timestamp on
> the existing configure file, but I was able to force it to regenerate the
> files by removing the old ones first. Is this version of the patch OK to
> check in?
OK.
--
Ping: https://gcc.gnu.org/ml/gcc-patches/2020-02/msg00290.html
On 2/5/20 1:13 PM, Martin Sebor wrote:
On 2/4/20 6:05 PM, Martin Sebor wrote:
GCC diagnoses declarations of function aliases whose type doesn't
match that of the target (ditto for attribute weakref). It doesn't
yet diagnose such in
On Wed, 12 Feb 2020, Jakub Jelinek wrote:
> As can be seen in the testcase, roundeven with inf or nan arguments
> ICE because of those asserts where nothing prevents from is_halfway_below
> being called with those arguments.
>
> The following patch fixes that by just returning false for rvc_inf/r
On 2/10/20 3:58 PM, Joseph Myers wrote:
On Sat, 8 Feb 2020, Sandra Loosemore wrote:
BTW, I did run autoconf in every subdirectory that contains a
configure.ac,
but it appears only libstc++-v3 actually uses this test; all the other
regenerated configure scripts were unchanged.
There's some pro
This implements all the ranges members defined in [specialized.algorithms]:
ranges::uninitialized_default_construct
ranges::uninitialized_value_construct
ranges::uninitialized_copy
ranges::uninitialized_copy_n
ranges::uninitialized_move
ranges::uninitialized_move_n
ranges::uninitiali
This roughly mirrors the existing split between and
. The ranges [specialized.algorithms] will use this new
header to avoid including all of of .
libstdc++-v3/ChangeLog:
* include/Makefile.am: Add bits/ranges_algobase.h
* include/Makefile.in: Regenerate.
* bits/ranges_al
On 2/11/20 5:28 PM, Jason Merrill wrote:
On 2/11/20 9:00 PM, Martin Sebor wrote:
r270155, committed in GCC 9, introduced a transformation that strips
redundant trailing zero initializers from array initializer lists in
order to support string literals as template arguments.
The transformation n
A small improvement for an error in build_user_type_conversion_1:
instead of
array-init1.C:11:1: error: conversion from ‘long int’ to ‘A’ is ambiguous
11 | };
| ^
we will print
array-init1.C:8:3: error: conversion from ‘long int’ to ‘A’ is ambiguous
8 | 0L,
| ^~
Bootstrap
This is another small H8 cleanup. This time we're killing a peephole2
that doesn't seem terribly useful. The peephole in question narrows a
SImode comparison to QImode when it's fed by an (and (xor)) and the
result is the same in either mode. I couldn't get this to trigger
within libgcc, newlib
Hi Andrew,
> Yes I agree a better cost model for CTZ/CLZ is the right solution but
> I disagree with 2 ALU instruction as the cost. It should either be
> the same cost as a multiply or have its own cost entry.
> For an example on OcteonTX (and ThunderX1), the cost of CLS/CLZ is 4
> cycles, the sa
Hi Richard,
See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93565#c8 - the problem is
more generic like I suspected and it's easy to create similar examples. So while
this turned out to be an easy worksaround for ctz, there general case is harder
to avoid since you still want to allow beneficial
On Wed, Feb 12, 2020 at 9:56 AM Richard Sandiford
wrote:
>
> Wilco Dijkstra writes:
> > Hi Richard,
> >
> > Right, so this is an alternative approach using costs - Combine won't try to
> > duplicate instructions if it increases costs, so increasing the ctz cost to
> > 2
> > instructions (which i
On Mon, 2020-02-10 at 15:47 -0700, Martin Sebor wrote:
> The reporter of RHBZ #1798636 was mislead and confused by GCC
> issuing -Wstringop-truncation for a possible overflow in strncat.
> It took a few iterations to appreciate this subtlety and realize
> the warning was of the wrong kind.
>
> The
On Tue, 2020-02-11 at 15:54 +0100, Hans-Peter Nilsson wrote:
> I was using ira-conflicts.c:print_hard_reg_set with a local
> patch to gdbinit.in in a debug-session, and noticed the
> erroneous output. I see there's an almost identical function in
> ira-color.c and on top of that, there's another f
Wilco Dijkstra writes:
> The popcount expansion uses umov to extend the result and move it back
> to the integer register file. If we model ADDV as a zero-extending
> operation, fmov can be used to move back to the integer side. This
> results in a ~0.5% speedup on deepsjeng on Cortex-A57.
>
> A
Wilco Dijkstra writes:
> Hi Richard,
>
> Right, so this is an alternative approach using costs - Combine won't try to
> duplicate instructions if it increases costs, so increasing the ctz cost to 2
> instructions (which is the correct cost for ctz anyway)
...agreed...
> ensures we still get effi
I needed some mindless work yesterday, so I took the opportunity to do
some light cleanups on the H8 port in the hopes that removing
unnecessary cruft will make cc0 conversion easier.
In this round I'm removing all the expanders, patterns and splitters
that have been disabled (in some cases for ~1
Hello, gentle maintainer.
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Fixed by r10-1975-g59febe0ece37bedab7f42ae51b9f2b7a372d2950.
2020-02-12 Marek Polacek
PR c++/88819
* g++.dg/cpp2a/nontype-class32.C: New test.
---
gcc/testsuite/ChangeLog | 5 +
gcc/testsuite/g++.dg/cpp2a/nontype-class32.C | 10 ++
2 files cha
Two equal atomic constraint expressions do not necessarily share the same tree,
so we can't assume that two ATOMIC_CONST_EXPRs are equal if and only if they
point to the same tree. The main consequence of this invalid assumption is that
the constraint subsumption checker may reject a valid partial
Hi Richard,
Right, so this is an alternative approach using costs - Combine won't try to
duplicate instructions if it increases costs, so increasing the ctz cost to 2
instructions (which is the correct cost for ctz anyway) ensures we still get
efficient code for this example:
[AArch64] Set ctz rt
On 12/02/20 12:31 +0100, Jakub Jelinek wrote:
Hi!
Before Joseph's changes when compiling
libstdc++-v3/libsupc++/fundamental_type_info.cc
we were emitting
_ZTIPDd, _ZTIPDe, _ZTIPDf, _ZTIPKDd, _ZTIPKDe, _ZTIPKDf, _ZTIDd, _ZTIDe, _ZTIDf
symbols even when DFP wasn't usable, but now we don't and thus
On 2/11/20 9:01 PM, Maciej W. Rozycki wrote:
> On Tue, 11 Feb 2020, Tom Tromey wrote:
>
>> Maciej> Correct fallout from commit 919adfe84092 ("Move gdbserver to top
>> level")
>> Maciej> and revert to not building `gdbserver' in a cross-configuration,
>> that is
>> Maciej> where host != target,
On Mon, Feb 10, 2020 at 12:01 PM Uros Bizjak wrote:
>
> On Mon, Feb 10, 2020 at 8:53 PM H.J. Lu wrote:
> >
> > On Mon, Feb 10, 2020 at 11:40 AM Uros Bizjak wrote:
> > >
> > > On Mon, Feb 10, 2020 at 8:22 PM H.J. Lu wrote:
> > > >
> > > > Since nested function isn't only called directly, there i
Hi!
Before Joseph's changes when compiling
libstdc++-v3/libsupc++/fundamental_type_info.cc
we were emitting
_ZTIPDd, _ZTIPDe, _ZTIPDf, _ZTIPKDd, _ZTIPKDe, _ZTIPKDf, _ZTIDd, _ZTIDe, _ZTIDf
symbols even when DFP wasn't usable, but now we don't and thus those 9
symbols @@CXXABI_1.3.4 are gone from li
On Wed, 12 Feb 2020, Segher Boessenkool wrote:
> On Wed, Feb 12, 2020 at 09:12:58AM +0100, Richard Biener wrote:
> > On Tue, 11 Feb 2020, Segher Boessenkool wrote:
> > > Basic block partitioning has wildly disproportionate fallout in all
> > > later passes, both in terms of what those *do* (or don
On Wed, Feb 12, 2020 at 10:27 AM Jakub Jelinek wrote:
>
> Hi!
>
> The VEXTRACT* insns have way too many different CPUID feature flags (ATT
> syntax)
> vextractf128 $imm, %ymm, %xmm/mem AVX
> vextracti128 $imm, %ymm, %xmm/mem AVX2
> vextract{f,i}32x4 $imm, %ymm, %xmm/mem
On Wed, Feb 12, 2020 at 09:12:58AM +0100, Richard Biener wrote:
> On Tue, 11 Feb 2020, Segher Boessenkool wrote:
> > Basic block partitioning has wildly disproportionate fallout in all
> > later passes, both in terms of what those *do* (or don't, if partitioning
> > is enabled), and of impact on th
> I just rebased and updated the vendors/axis branch
> axis/cris-decc0 with the following commits, which should bring
> back compare-elimination results to that of cc0 on master.
Nice work! An example of transition done properly...
> With the exception of the bit-test patterns (btst / btstq whic
Hi!
The VEXTRACT* insns have way too many different CPUID feature flags (ATT
syntax)
vextractf128 $imm, %ymm, %xmm/mem AVX
vextracti128 $imm, %ymm, %xmm/mem AVX2
vextract{f,i}32x4 $imm, %ymm, %xmm/mem {k}{z} AVX512VL+AVX512F
vextract{f,i}32x4 $imm, %zmm, %xmm/mem {k}{
Hello!
11.02.2020 16:40, Andrea Corallo wrote:
> Hi Richard,
>
> "Richard Earnshaw (lists)" writes:
>
>>> gcc/ChangeLog:
>>> 2020-??-?? Andrea Corallo
>>> 2020-??-?? Mihail-Calin Ionescu
>>> 2020-??-?? Iain Apreotesei
>>> * config/arm/arm.c (TARGET_INVALID_WITHIN_DOLOOP):
>>>
The warning was emitted inconsistently on targets, so disable it since
the testcase was for an ICE.
2020-02-12 Richard Biener
PR testsuite/93697
* gcc.dg/pr93661.c: Pass -w, remove dg-warning.
---
gcc/testsuite/gcc.dg/pr93661.c | 4 ++--
1 file changed, 2 insertions(+), 2 dele
On Wed, Feb 12, 2020 at 7:52 AM Prathamesh Kulkarni
wrote:
>
> On Tue, 4 Feb 2020 at 14:54, Prathamesh Kulkarni
> wrote:
> >
> > On Mon, 3 Feb 2020 at 14:56, Prathamesh Kulkarni
> > wrote:
> > >
> > > On Mon, 3 Feb 2020 at 14:41, Prathamesh Kulkarni
> > > wrote:
> > > >
> > > > On Thu, 30 Jan 2
On Tue, 11 Feb 2020, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Feb 11, 2020 at 03:46:05PM +0300, Roman Zhuykov wrote:
> > Hmm, even when trying to move it just few passes earlier many years ago,
> > got another opinion:
> > https://gcc.gnu.org/ml/gcc-patches/2011-10/msg01526.html
> > Although w
On Tue, 11 Feb 2020, Segher Boessenkool wrote:
> On Tue, Feb 11, 2020 at 02:58:47PM +0100, Richard Biener wrote:
> > On Tue, 11 Feb 2020, Roman Zhuykov wrote:
> > > 11.02.2020 11:01, Richard Biener wrote:
> > > Sound good, but IMHO modulo scheduler is not the best choice to be the
> > > first step
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