Hi Kyrill,
I think there's a typo in the documentation of the MINLOC and MAXLOC
intrinsics.
It implies that when the BACK argument is true it returns the first
occurrence of the min/max value,
but my understanding is that it should return the last occurrence.
This patch fixes the documentatio
Hello world,
the attached patch fixes a 7/8/9 regression. The problem was twofold:
If a subroutine was called more than once from a different subroutine,
the call was only checked the first time. Also, a type change in the
backend_decl initiated when there was already a declaration led to an
IC
This one seems wrong:
> - "-fno-strict-aliasing is used");
> + "%<-fno-strict-aliasing is used%>");
(only the option name should be quoted, not "is used").
--
Joseph S. Myers
jos...@codesourcery.com
On Thu, 2019-03-21 at 12:26 +0100, Matthias Klose wrote:
> Fix PR jit/87808, the embedded driver still needing the external gcc
> driver to
> find the gcc_lib_dir. This can happen in a packaging context when
> libgccjit
> doesn't depend on the gcc package, but just on binutils and libgcc-
> dev pac
On Thu, Mar 21, 2019 at 07:41:37PM -0400, Jason Merrill wrote:
> On 3/21/19 4:55 PM, Marek Polacek wrote:
> > On Thu, Mar 21, 2019 at 04:13:29PM -0400, Jason Merrill wrote:
> > > On 3/16/19 4:53 PM, Marek Polacek wrote:
> > > > Here we have code like
> > > >
> > > > struct X { operator const i
On Mon, 2019-03-18 at 10:27 -0600, Sandra Loosemore wrote:
> On 3/18/19 9:48 AM, Gerald Pfeifer wrote:
> > On Mon, 18 Mar 2019, David Malcolm wrote:
> > > Here's a patch for the website to add my changes for GCC 9
> > > (bearing
> > > a strong resemblance to my recent blog post)
> >
> > Wow, that.
The Doxygen docs do not have stable URLs, so linking to specific pages
doesn't work well.
* doc/xml/manual/backwards_compatibility.xml: Remove link to
Doxygen-generated pages with unstable URL.
* doc/xml/manual/concurrency_extensions.xml: Likewise.
* doc/xml/manual
On 3/22/19 4:12 PM, Jason Merrill wrote:
On 3/22/19 2:14 PM, Marek Polacek wrote:
On Fri, Mar 22, 2019 at 10:48:32AM -0400, Jason Merrill wrote:
+ B b10 = {{B{42}}};
+ B b11 = {{B{{42;
+ B b12 = {{B{{{42};
These look ill-formed to me: too many braces around the B value.
Looks li
On 3/22/19 2:14 PM, Marek Polacek wrote:
On Fri, Mar 22, 2019 at 10:48:32AM -0400, Jason Merrill wrote:
+ B b10 = {{B{42}}};
+ B b11 = {{B{{42;
+ B b12 = {{B{{{42};
These look ill-formed to me: too many braces around the B value.
Looks like the original testcase had the same prob
I cry uncle!
So I finally started looking at the fpr-moves regression in this BZ. No
surprise this is further fallout from the combiner changes.
Going into register allocation we have something like this:
(insn 13 7 14 2 (set (reg:TF 196)
(reg:TF 44 $f12 [ d ])) "j.c":7:1 376 {*movtf}
On Fri, Mar 22, 2019 at 10:48:32AM -0400, Jason Merrill wrote:
> On 3/21/19 4:51 PM, Marek Polacek wrote:
> > This is a crash in digest_init_r -- we encounter
> >
> >/* "If T is a class type and the initializer list has a single
> > element of type cv U, where U is T or a class derived f
On Fri, Mar 22, 2019 at 05:35:02PM +, James Greenhalgh wrote:
> On Mon, Mar 11, 2019 at 04:10:15PM +, Steve Ellcey wrote:
> > Richard,
> >
> > I don't necessarily disagree with anything in your comments and long
> > term I think that is the right direction, but I wonder if that level of
>
On 3/21/19 12:15 PM, Richard Biener wrote:
> On Sun, 10 Mar 2019, Bernd Edlinger wrote:
> Finally...
>
> Index: gcc/function.c
> ===
> --- gcc/function.c (revision 269264)
> +++ gcc/function.c (working copy)
> @@ -2210,6 +22
On Sun, Mar 10, 2019 at 06:26:07PM +, Andrew Pinski wrote:
> Hi,
> "uxtw x0, w1" is an alias for "mov w0, w1" but currently the
> back-end marks it as extend type rather than mov_reg. This patch
> fixes that. For most schedule models, this does not matter; I am
> adding one where mov (both
On Mon, Mar 11, 2019 at 04:10:15PM +, Steve Ellcey wrote:
> Richard,
>
> I don't necessarily disagree with anything in your comments and long
> term I think that is the right direction, but I wonder if that level of
> change is appropriate for GCC Stage 4 which is where we are now. Your
> cha
The following patch fixes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89676
The patch was successfully bootstrapped and tested on x86-64.
Committed as rev. 269878.
Index: ChangeLog
===
--- ChangeLog (revision 269876)
+++ Ch
Attribute vector_size applies to types as much as it does to
variables but is only documented for the latter. Attached is
an update to the manual to document the attribute's effects
in type definitions.
Martin
Index: gcc/doc/extend.texi
===
* include/bits/stl_algobase.h (__lg): Do arithmetic on type int to
avoid -Wconversion warnings.
Tested powerpc64le-linux, committed to trunk.
commit 81c48e4f55f03edf873fa8cadf5920a0e062
Author: Jonathan Wakely
Date: Fri Mar 22 16:27:10 2019 +
Avoid -Wconversion w
Hi all,
I think there's a typo in the documentation of the MINLOC and MAXLOC
intrinsics.
It implies that when the BACK argument is true it returns the first
occurrence of the min/max value,
but my understanding is that it should return the last occurrence.
This patch fixes the documentation.
On Wed, Mar 20, 2019 at 10:17:41AM +, Sudakshina Das wrote:
> Hi Kyrill
>
> On 12/03/2019 12:03, Kyrill Tkachov wrote:
> > Hi Sudi,
> >
> > On 2/22/19 10:45 AM, Sudakshina Das wrote:
> >> Hi
> >>
> >> This patch documents the addition of the new Armv8.5-A and corresponding
> >> extensions in
Hi,
> Are the values inside the tables the problem? Or just some of the
> helper functions/templates that interact with them to generate the
> static data?
>
> If the latter, then a rebuild of the files may not be necessary.
I managed to get this to work without rebuilding the files. After
chec
On 3/21/19 4:51 PM, Marek Polacek wrote:
This is a crash in digest_init_r -- we encounter
/* "If T is a class type and the initializer list has a single
element of type cv U, where U is T or a class derived from T,
the object is initialized from that element." */
if (flag_chec
On 3/22/19 8:55 AM, Jakub Jelinek wrote:
On Thu, Mar 21, 2019 at 07:31:44PM -0400, Jason Merrill wrote:
How about
else if (tree wrap = maybe_call_tls_wrapper_fn (expr))
expr = wrap;
LGTM. Here is the full patch I've bootstrapped/regtested on x86_64-linux
and i686-linux, ok for trunk?
OK
On 3/22/19 8:53 AM, Jakub Jelinek wrote:
On Fri, Mar 22, 2019 at 08:47:21AM -0400, Jason Merrill wrote:
On 3/21/19 7:45 PM, Jakub Jelinek wrote:
On Thu, Mar 21, 2019 at 07:27:03PM -0400, Jason Merrill wrote:
On 3/15/19 4:07 PM, Jakub Jelinek wrote:
+/* Number of cxx_eval_constant_expression c
I just pushed the attached patch. Tested on x86_64-pc-linux-gnu,
committed on trunk. Thank you Simon again for the bug report!
Commit message:
The support for IPv6 that was added since last release triggered
regressions on various platforms. The size of structures passed to low
level routines w
Ping
Richard Sandiford writes:
> Steve Ellcey writes:
>> Richard,
>>
>> I don't necessarily disagree with anything in your comments and long
>> term I think that is the right direction, but I wonder if that level of
>> change is appropriate for GCC Stage 4 which is where we are now. Your
>> cha
On Thu, Mar 21, 2019 at 07:31:44PM -0400, Jason Merrill wrote:
> How about
>
> else if (tree wrap = maybe_call_tls_wrapper_fn (expr))
> expr = wrap;
LGTM. Here is the full patch I've bootstrapped/regtested on x86_64-linux
and i686-linux, ok for trunk?
2019-03-22 Jakub Jelinek
PR c
On Fri, Mar 22, 2019 at 08:47:21AM -0400, Jason Merrill wrote:
> On 3/21/19 7:45 PM, Jakub Jelinek wrote:
> > On Thu, Mar 21, 2019 at 07:27:03PM -0400, Jason Merrill wrote:
> > > On 3/15/19 4:07 PM, Jakub Jelinek wrote:
> > > > +/* Number of cxx_eval_constant_expression calls (except skipped ones,
On 3/21/19 7:45 PM, Jakub Jelinek wrote:
On Thu, Mar 21, 2019 at 07:27:03PM -0400, Jason Merrill wrote:
On 3/15/19 4:07 PM, Jakub Jelinek wrote:
+/* Number of cxx_eval_constant_expression calls (except skipped ones,
+ on simple constants or location wrappers) encountered during current
+ cx
Hi,
Przemyslaw Wirkus writes:
> Hi all,
>
> Vectorise __builtin_signbit (v4sf) with unsigned shift right vector
> instruction.
>
> Bootstrapped and tested on aarch64-none-linux-gnu.
>
> Assembly output for:
> $ aarch64-elf-gcc -S -O3 signbitv4sf.c -dp
>
> Before patch:
>
> foo:
> adrpx3
On Fri, Mar 22, 2019 at 11:40 AM Jakub Jelinek wrote:
>
> On Fri, Mar 22, 2019 at 11:11:58AM +0100, Uros Bizjak wrote:
> > > For FMA, naturally only the two operands that are multiplied should be
> > > commutative, but in most patterns one of those two uses "0" or "0,0"
> >
> > This should be safe
On Fri, Mar 22, 2019 at 11:11:58AM +0100, Uros Bizjak wrote:
> > For FMA, naturally only the two operands that are multiplied should be
> > commutative, but in most patterns one of those two uses "0" or "0,0"
>
> This should be safe, we have had "*add_1" for decades that does
> just the above.
Su
On Fri, Mar 22, 2019 at 11:02 AM Jakub Jelinek wrote:
>
> On Fri, Mar 22, 2019 at 10:35:45AM +0100, Uros Bizjak wrote:
> > On Fri, Mar 22, 2019 at 9:41 AM Jakub Jelinek wrote:
> > > The following patch adds forgotten avx512f fma instrinsics for masked
> > > scalar
> > > operations.
> > >
> > > B
On 3/20/19 6:54 PM, Simon Wright wrote:
Thanks, Pierre-Marie: it'd be a shame if 9.1 couldn't handle IPv4.
Yes indeed :-) The change is ready to go: may I commit your testcase as
well?
--
Pierre-Marie de Rodat
On Fri, Mar 22, 2019 at 10:35:45AM +0100, Uros Bizjak wrote:
> On Fri, Mar 22, 2019 at 9:41 AM Jakub Jelinek wrote:
> > The following patch adds forgotten avx512f fma instrinsics for masked scalar
> > operations.
> >
> > Bootstrapped/regtested on x86_64-linux and i686-linux (on skylake-avx512),
>
On Fri, Mar 22, 2019 at 9:41 AM Jakub Jelinek wrote:
>
> Hi!
>
> The following patch adds forgotten avx512f fma instrinsics for masked scalar
> operations.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux (on skylake-avx512),
> ok for trunk?
There are several possibilities to mark the 1s
Hi Kito,
Thanks for the patch.
Kito Cheng 於 2019年2月22日 週五 下午4:42寫道：
> From: Kito Cheng
>
> ChangeLog:
> gcc/
> * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3):
> Fix wrong code gen with large shift amount.
> ---
> gcc/config/nds32/nds32-md-auxiliary.c | 21 +
> > And I still think this function and the static variable which never changes
> > once set does not require any GC. Just setting the cached_wd variable to
> > the unchanged pointer from get_src_pwd() or allocating one in the function
> > itself is enough. This solves the problem and relieves th
On Thu, 21 Mar 2019 at 14:44, Richard Biener wrote:
>
> On Thu, 21 Mar 2019, Richard Biener wrote:
>
> >
> > This also avoids the ICE in PR89779 but IMHO is not a real fix.
> >
> > Still it restores a previously active check against released SSA names
> > which now have error_mark_node type rather
On Fri, Mar 22, 2019 at 9:56 AM Jakub Jelinek wrote:
>
> Hi!
>
> While working on the PR89784 patch, I've noticed various inconsistencies
> in the fma patterns between constraints and predicates. Most of them time
> it was correct though.
> This is what I found:
>
> 1) if the constraint is like
Hi!
While working on the PR89784 patch, I've noticed various inconsistencies
in the fma patterns between constraints and predicates. Most of them time
it was correct though.
This is what I found:
1) if the constraint is like or ,v
or v,, then it will be just v or v,v with rounding,
while withou
Hi!
The following patch adds forgotten avx512f fma instrinsics for masked scalar
operations.
Bootstrapped/regtested on x86_64-linux and i686-linux (on skylake-avx512),
ok for trunk?
2019-03-22 Jakub Jelinek
PR target/89784
* config/i386/i386.c (enum ix86_builtins): Remove
On Thu, 21 Mar 2019, Jason Merrill wrote:
> On 3/21/19 9:43 AM, Richard Biener wrote:
> > On Thu, 21 Mar 2019, Richard Biener wrote:
> >
> > >
> > > This also avoids the ICE in PR89779 but IMHO is not a real fix.
> > >
> > > Still it restores a previously active check against released SSA names
43 matches
Mail list logo
