Re: [PATCH] Fix recent tree-if-conv ICE (PR tree-optimization/89268)

On February 10, 2019 12:16:12 AM GMT+01:00, Jakub Jelinek wrote: >Hi! > >WHen tree_if_conversion is called from within the vectorizer (for >masked >epilogues), preds is NULL, so we shouldn't be pushing anything there, >the caller doesn't care anyway. Oops. >Bootstrapped/regtested on x86_64-lin

Re: [PATCH][libbacktrace] Declare external backtrace fns noinline

On 09-02-19 22:07, Ian Lance Taylor wrote: > On Fri, Feb 8, 2019 at 9:26 AM Thomas Schwinge > wrote: >> >> On Fri, 8 Feb 2019 10:41:47 +0100, Tom de Vries wrote: >>> The backtrace functions backtrace_full, backtrace_print and backtrace_simple >>> walk the call stack, but make sure to skip the fi

Re: please approval my patch - add new logical traits to type_traits for logical completeness

hi Marc, I am very glad to receive you reply, in fact , I have neither " C++ standard these are specified" nor "feature test macro" , I saw negation, conjunction and disjunction have added in type_traits , and similar , after I reference to https://whatis.techtarget.com/definition/logic-gate-A

[PATCH 40/43] i386: Enable 8-byte vectorizer for TARGET_MMX_WITH_SSE

In 64-bit, we support 8-byte vectorizer with SSE. Also xfail x86-64 targets for gcc.dg/tree-ssa/pr84512.c. gcc/ PR target/89028 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Enable 8-byte vectorizer for TARGET_MMX_WITH_SSE. gcc/testsuite/ PR target/890

[PATCH 38/43] i386: Add tests for MMX intrinsic emulations with SSE

Test MMX intrinsics with -msse2 -mno-mmx in 64-bit mode. PR target/89021 * gcc.target/i386/mmx-vals.h: New file. * gcc.target/i386/sse2-mmx-2.c: Likewise. * gcc.target/i386/sse2-mmx-3.c: Likewise. * gcc.target/i386/sse2-mmx-4.c: Likewise. * gcc.targe

[PATCH 31/43] i386: Emulate MMX pshufb with SSE version

Emulate MMX version of pshufb with SSE version by masking out the bit 3 of the shuffle control byte. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_pshufbv8qi3): Renamed to ... (ssse3_pshufbv8qi3_mmx): This. (ssse3_pshufbv8

[PATCH 41/43] i386: Implement V2SF add/sub/mul with SSE

In 64-bit mode, implement V2SF add/sub/mul with SEE. Only SSE register source operand is allowed. gcc/ PR target/89028 * config/i386/i386.md (comm): Handle mult. * config/i386/mmx.md (plusminusmult): New. (plusminusmult_insn): Likewse. (plusminusmult_mnemo

[PATCH 39/43] i386: Also enable SSSE3 __m64 tests in 64-bit mode

Since we now emulate MMX intrinsics with SSE in 64-bit mode without 3DNOW, we can enable SSSE3 __m64 tests even when AVX is enabled. PR target/89021 * gcc.target/i386/ssse3-pabsb.c: Also enable __m64 check in 64-bit mode without 3DNOW, * gcc.target/i386/ssse3-pabsd.

[PATCH 21/43] i386: Emulate MMX maskmovq with SSE2 maskmovdqu

Emulate MMX maskmovq with SSE2 maskmovdqu in 64-bit mode by zero-extending source and mask operands to 128 bits. Handle unmapped bits 64:127 at memory address by adjusting source and mask operands together with memory address. PR target/89021 * config/i386/xmmintrin.h: Emulate MMX

[PATCH 22/43] i386: Emulate MMX mmx_uavgv8qi3 with SSE

Emulate MMX mmx_uavgv8qi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_uavgv8qi3): Add SSE emulation support. (*mmx_uavgv8qi3): Add SSE emulation. --- gcc/config/i386/mmx.md | 21 + 1 file changed, 13

[PATCH 37/43] i386: Allow MMX intrinsic emulation with SSE

Allow MMX intrinsic emulation with SSE/SSE2/SSSE3. Don't enable MMX ISA by default with TARGET_MMX_WITH_SSE. For pr82483-1.c and pr82483-2.c, "-mssse3 -mno-mmx" compiles in 64-bit mode since MMX intrinsics can be emulated wit SSE. gcc/ PR target/89021 * config/i386/i386-builtin.

[PATCH 17/43] i386: Emulate MMX mmx_pinsrw with SSE

Emulate MMX mmx_pinsrw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pinsrw): Add SSE emulation. --- gcc/config/i386/mmx.md | 30 +- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/gcc/c

[PATCH 30/43] i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE

Emulate MMX ssse3_pmulhrswv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (*ssse3_pmulhrswv4hi3): Add SSE emulation. --- gcc/config/i386/sse.md | 20 +--- 1 file changed, 13 insertions(+), 7 deletions(-) diff --gi

[PATCH 16/43] i386: Emulate MMX mmx_pextrw with SSE

Emulate MMX mmx_pextrw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pextrw): Add SSE emulation. --- gcc/config/i386/mmx.md | 16 +--- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/gcc/config/i386/mmx.

[PATCH 24/43] i386: Emulate MMX mmx_psadbw with SSE

Emulate MMX mmx_psadbw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_psadbw): Add SSE emulation. --- gcc/config/i386/mmx.md | 19 --- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/gcc/config/i386/

[PATCH 23/43] i386: Emulate MMX mmx_uavgv4hi3 with SSE

Emulate MMX mmx_uavgv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_uavgv4hi3): Add SSE emulation support. (*mmx_uavgv4hi3): Add SSE emulation. --- gcc/config/i386/mmx.md | 22 ++ 1 file changed, 1

[PATCH 32/43] i386: Emulate MMX ssse3_psign3 with SSE

Emulate MMX ssse3_psign3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_psign3): Add SSE emulation. --- gcc/config/i386/sse.md | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/gcc/config/i3

[PATCH 29/43] i386: Emulate MMX ssse3_pmaddubsw with SSE

Emulate MMX ssse3_pmaddubsw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation. --- gcc/config/i386/sse.md | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/gcc/con

[PATCH 26/43] i386: Emulate MMX umulv1siv1di3 with SSE2

Emulate MMX umulv1siv1di3 with SSE2. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation support. (*sse2_umulv1siv1di3): Add SSE2 emulation. --- gcc/config/i386/mmx.md | 22 ++---

[PATCH 27/43] i386: Emulate MMX ssse3_phwv4hi3 with SSE

Emulate MMX ssse3_phwv4hi3 with SSE by moving bits 64:95 to bits 32:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_phwv4hi3): Changed to define_insn_and_split to support SSE emulation. --- gcc/config/i386/sse.m

[PATCH 25/43] i386: Emulate MMX movntq with SSE2 movntidi

Emulate MMX movntq with SSE2 movntidi. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (sse_movntq): Renamed to ... (*sse_movntq): This. (sse_movntq): New. Emulate MMX movntq with SSE2 movntidi. --- gcc/config/i386/mmx.md | 20 ++

[PATCH 36/43] i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE

PR target/89021 * config/i386/i386.c (ix86_expand_vector_init_duplicate): Set mmx_ok to true if TARGET_MMX_WITH_SSE is true. (ix86_expand_vector_init_one_nonzero): Likewise. (ix86_expand_vector_init_one_var): Likewise. (ix86_expand_vector_init_general

[PATCH 18/43] i386: Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE

Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_v4hi3): Add SSE emulation support. (mmx_v8qi3): Likewise. (smaxmin:v4hi3): New. (umaxmin:v8qi3): Likewise.

[PATCH 42/43] i386: Implement V2SF <-> V2SI conversions with SSE

In 64-bit mode, implement V2SF <-> V2SI conversions with SEE. Only SSE register source operand is allowed. gcc/ PR target/89028 * config/i386/sse.md (floatv2siv2sf2): New. (fix_truncv2sfv2si2): Likewise. gcc/testsuite/ PR target/89028 * gcc.target/i386/p

[PATCH 43/43] i386: Implement V2SF comparisons with SSE

In 64-bit mode, implement V2SF comparisons with SEE. Only SSE register source operand is allowed. gcc/ PR target/89028 * config/i386/sse.md (V_128_64): New mode iterator. (VF_128_64): Likewise. (sseintvecmode): Add V2SF. (sseintvecmodelower): Likewise.

[PATCH 34/43] i386: Emulate MMX abs2 with SSE

Emulate MMX abs2 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (abs2): Add SSE emulation. --- gcc/config/i386/sse.md | 15 +-- 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/conf

[PATCH 20/43] i386: Emulate MMX mmx_umulv4hi3_highpart with SSE

Emulate MMX mmx_umulv4hi3_highpart with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (*mmx_umulv4hi3_highpart): Add SSE emulation. --- gcc/config/i386/mmx.md | 19 --- 1 file changed, 12 insertions(+), 7 deletions(-) diff

[PATCH 19/43] i386: Emulate MMX mmx_pmovmskb with SSE

Emulate MMX mmx_pmovmskb with SSE by zero-extending result of SSE pmovmskb from QImode to SImode. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pmovmskb): Changed to define_insn_and_split to support SSE emulation. --- gcc/config/i3

[PATCH 35/43] i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE

PR target/89021 * config/i386/mmx.md (MMXMODE:mov): Also allow TARGET_MMX_WITH_SSE. (MMXMODE:*mov_internal): Likewise. (MMXMODE:movmisalign): Likewise. --- gcc/config/i386/mmx.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/c

[PATCH 33/43] i386: Emulate MMX ssse3_palignrdi with SSE

Emulate MMX version of palignrq with SSE version by concatenating 2 64-bit MMX operands into a single 128-bit SSE operand, followed by SSE psrldq. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_palignrdi): Changed to define_insn_an

[PATCH 28/43] i386: Emulate MMX ssse3_phdv2si3 with SSE

Emulate MMX ssse3_phdv2si3 with SSE by moving bits 64:95 to bits 32:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_phdv2si3): Changed to define_insn_and_split to support SSE emulation. --- gcc/config/i386/sse.m

[PATCH 15/43] i386: Emulate MMX sse_cvtpi2ps with SSE

Emulate MMX sse_cvtpi2ps with SSE2 cvtdq2ps, preserving upper 64 bits of destination XMM register. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (UNSPEC_CVTPI2PS): New. (sse_cvtpi2ps): Renamed to ... (*mmx_cvtpi2ps): This. Disab

[PATCH 13/43] i386: Emulate MMX pshufw with SSE

Emulate MMX pshufw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pshufw_1): Add SSE emulation. (*vec_dupv4hi): Likewise. emulation. --- gcc/config/i386/mmx.md | 33 + 1 file changed

[PATCH 07/43] i386: Emulate MMX mmx_pmaddwd with SSE

Emulate MMX pmaddwd with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE. (*mmx_pmaddwd): Also allow TARGET_MMX_WITH_SSE. Add SSE support. --- gcc/config/i386/mmx.md | 21 +--

[PATCH 05/43] i386: Emulate MMX mulv4hi3 with SSE

Emulate MMX mulv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mulv4hi3): New. (*mmx_mulv4hi3): Also allow TARGET_MMX_WITH_SSE. Add SSE support. --- gcc/config/i386/mmx.md | 26 +++--- 1 file

[PATCH 06/43] i386: Emulate MMX smulv4hi3_highpart with SSE

Emulate MMX mulv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. (*mmx_smulv4hi3_highpart): Also allow TARGET_MMX_WITH_SSE. Add SSE support. --- gcc/c

[PATCH 09/43] i386: Emulate MMX 3 with SSE

Emulate MMX 3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (any_logic:3): New. (any_logic:*mmx_3): Also allow TARGET_MMX_WITH_SSE. Add SSE support. --- gcc/config/i386/mmx.md | 27 --- 1 file c

[PATCH 12/43] i386: Emulate MMX vec_dupv2si with SSE

Emulate MMX vec_dupv2si with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (*vec_dupv2si): Changed to define_insn_and_split and also allow TARGET_MMX_WITH_SSE to support SSE emulation. * config/i386/sse.md (*vec_dupv

[PATCH 14/43] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE

Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE. PR target/89021 * config/i386/mmx.md (sse_cvtps2pi): Add SSE emulation. (sse_cvttps2pi): Likewise. --- gcc/config/i386/sse.md | 30 ++ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git

[PATCH 11/43] i386: Emulate MMX mmx_eq/mmx_gt3 with SSE

Emulate MMX mmx_eq/mmx_gt3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_eq3): Also allow TARGET_MMX_WITH_SSE. (*mmx_eq3): Also allow TARGET_MMX_WITH_SSE. Add SSE support. (mmx_gt3): Likewise. ---

[PATCH 10/43] i386: Emulate MMX mmx_andnot3 with SSE

Emulate MMX mmx_andnot3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_andnot3): Also allow TARGET_MMX_WITH_SSE. Add SSE support. --- gcc/config/i386/mmx.md | 18 +++--- 1 file changed, 11 insertions(+), 7 del

[PATCH 08/43] i386: Emulate MMX ashr3/3 with SSE

Emulate MMX ashr3/3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_ashr3): Disallow with TARGET_MMX_WITH_SSE. (mmx_3): Likewise. (ashr3): New. (3): Likewise. --- gcc/config/i386/mmx.md | 38

[PATCH 04/43] i386: Emulate MMX plusminus/sat_plusminus with SSE

Emulate MMX plusminus/sat_plusminus with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (3): New. (*mmx_3): Changed to define_insn_and_split to support SSE emulation. (*mmx_3): Likewise. (mmx_3): Also allow TA

[PATCH 03/43] i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX

Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX. For MMX punpckhXX, move bits 64:127 to bits 0:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/i386-protos.h (ix86_split_mmx_punpck): New prototype. * config/i386/i38

[PATCH 00/43] V3: Emulate MMX intrinsics with SSE

On x86-64, since __m64 is returned and passed in XMM registers, we can emulate MMX intrinsics with SSE instructions. To support it, we added #define TARGET_MMX_WITH_SSE \ (TARGET_64BIT && TARGET_SSE2 && !TARGET_3DNOW) SSE emulation is disabled for 3DNOW since 3DNOW patterns haven't been update

[PATCH 02/43] i386: Emulate MMX packsswb/packssdw/packuswb with SSE2

Emulate MMX packsswb/packssdw/packuswb with SSE packsswb/packssdw/packuswb plus moving bits 64:95 to bits 32:63 in SSE register. Only SSE register source operand is allowed. 2019-02-08 H.J. Lu Uros Bizjak PR target/89021 * config/i386/i386-protos.h (ix86_move_vec

[PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

In 64-bit mode, SSE2 can be used to emulate MMX instructions without 3DNOW. We can use SSE2 to support 64-bit vectors. PR target/89021 * config/i386/i386.c (ix86_set_reg_reg_cost): Also support VALID_MMX_WITH_SSE_REG_MODE. (ix86_vector_mode_supported_p): Likewise.

Re: Fix odr ICE on Ada LTO

On Sat, Feb 9, 2019 at 10:10 AM Jan Hubicka wrote: > > Hi, > this patch fixes ICE in free_lang_data compiling lto8.adb. > The fix is bit symptomatic becuase type_with_linkage_p should return > false for Ada types. Perhaps adding explicit flag to DECL_NAME would > make sense but it can wait for nex

[PATCH] Fix recent tree-if-conv ICE (PR tree-optimization/89268)

Hi! WHen tree_if_conversion is called from within the vectorizer (for masked epilogues), preds is NULL, so we shouldn't be pushing anything there, the caller doesn't care anyway. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2019-02-09 Jakub Jelinek PR tree-opt

Re: [PATCH][libbacktrace] Add btest_lto

On Sat, Feb 9, 2019 at 2:59 PM Tom de Vries wrote: > > On 09-02-19 22:49, Ian Lance Taylor wrote: > > On Fri, Feb 8, 2019 at 1:42 AM Tom de Vries wrote: > >> > >> Add libbacktrace test-case using -flto. > >> > >> OK for trunk? > >> > >> Thanks, > >> - Tom > >> > >> [libbacktrace] Add btest_lto >

Re: [PATCH][libbacktrace] Add btest_lto

On 09-02-19 22:49, Ian Lance Taylor wrote: > On Fri, Feb 8, 2019 at 1:42 AM Tom de Vries wrote: >> >> Add libbacktrace test-case using -flto. >> >> OK for trunk? >> >> Thanks, >> - Tom >> >> [libbacktrace] Add btest_lto >> >> 2019-02-08 Tom de Vries >> >> * Makefile.am (BUILDTESTS): Add

Re: [PATCH] Updated patches for the port of gccgo to GNU/Hurd

On Sat, 2019-02-09 at 14:40 -0800, Ian Lance Taylor wrote: > On Fri, Feb 8, 2019 at 3:07 PM Matthias Klose wrote: > > On 07.02.19 06:04, Ian Lance Taylor wrote: > What are the lines before that in the log? For some reason libtool is > being invoke with no source files. The lines before the fail

Re: [PATCH][libbacktrace] Declare external backtrace fns noinline

On 09-02-19 22:07, Ian Lance Taylor wrote: > On Fri, Feb 8, 2019 at 9:26 AM Thomas Schwinge > wrote: >> >> On Fri, 8 Feb 2019 10:41:47 +0100, Tom de Vries wrote: >>> The backtrace functions backtrace_full, backtrace_print and backtrace_simple >>> walk the call stack, but make sure to skip the fi

Re: [PATCH] Updated patches for the port of gccgo to GNU/Hurd

On Fri, Feb 8, 2019 at 3:07 PM Matthias Klose wrote: > > On 07.02.19 06:04, Ian Lance Taylor wrote: > > On Thu, Jan 31, 2019 at 7:40 AM Svante Signell > > wrote: > >> > >> As advised by the Debian gcc maintainer Matthias Klose and golang > >> developer Ian Lance Taylor I'm re-submitting the patc

Do not use TYPE_NEED_CONSTRUCTING in may_be_aliased

Hi, this patch drops test for TYPE_NEEDS_CONSTRUCTING in tree.h and instead sets TREE_READONLY to 0 for external vars of this type. For vars declared locally we drop TREE_READONLY while expanding constructor. Note that I have tried to drop TREE_READONLY always (not only for DECL_EXTERNAL) and it br

Re: [poweprc] RFA: patch changing expected code generation for test vsx-simode2.c

On Sat, Feb 09, 2019 at 04:13:57PM -0500, Vladimir Makarov wrote: > > On 2019-02-09 8:28 a.m., Segher Boessenkool wrote: > >Hi Vlad, > > > >On Fri, Feb 08, 2019 at 02:18:40PM -0500, Vladimir Makarov wrote: > >>Recently I committed a patch solving > >> > >>https://gcc.gnu.org/bugzilla/show_bug.cgi?

Fix localization of comdats

Hi, this patch fixes undefined symbols when COMDAT group contains some symbols with LDPR_PREVAILING_DEF_IRONLY_EXP and others with LDPR_PREVIALING_DEF. In this case we can not optimized out the symbol defined LDPR_PREVAILING_DEF because it will be used by linker for second stage linking. We can s

Re: [PATCH][libbacktrace] Add btest_lto

On Fri, Feb 8, 2019 at 1:42 AM Tom de Vries wrote: > > Add libbacktrace test-case using -flto. > > OK for trunk? > > Thanks, > - Tom > > [libbacktrace] Add btest_lto > > 2019-02-08 Tom de Vries > > * Makefile.am (BUILDTESTS): Add btest_lto. > * Makefile.in: Regenerate. >

Re: [poweprc] RFA: patch changing expected code generation for test vsx-simode2.c

On 2019-02-09 8:28 a.m., Segher Boessenkool wrote: Hi Vlad, On Fri, Feb 08, 2019 at 02:18:40PM -0500, Vladimir Makarov wrote: Recently I committed a patch solving https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88560 The patch resulted in test vsx-simode2.c failure.  Here is the difference in

Re: [PATCH][libbacktrace] Declare external backtrace fns noinline

On Fri, Feb 8, 2019 at 9:26 AM Thomas Schwinge wrote: > > On Fri, 8 Feb 2019 10:41:47 +0100, Tom de Vries wrote: > > The backtrace functions backtrace_full, backtrace_print and backtrace_simple > > walk the call stack, but make sure to skip the first entry, in order to skip > > over the functions

Re: [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

On Sat, Feb 9, 2019 at 10:41 AM Uros Bizjak wrote: > > On 2/9/19, H.J. Lu wrote: > >> >> Hm, this is a bit worrying, we don't want to introduce ABI > >> >> incompatibilites w.r.t. alignment. We still need to be ABI compatible > >> >> for MMX values and emit unaligned loads/stores when necessary.

Re: [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

On 2/9/19, H.J. Lu wrote: >> >> Hm, this is a bit worrying, we don't want to introduce ABI >> >> incompatibilites w.r.t. alignment. We still need to be ABI compatible >> >> for MMX values and emit unaligned loads/stores when necessary. >> > >> > We need to audit all usages of SSE_REG_MODE_P and VA

Re: [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

On Sat, Feb 9, 2019 at 10:27 AM Uros Bizjak wrote: > > On 2/9/19, H.J. Lu wrote: > > On Sat, Feb 9, 2019 at 7:03 AM Uros Bizjak wrote: > >> > >> On 2/9/19, H.J. Lu wrote: > >> > On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote: > >> >> > >> >> On 2/9/19, H.J. Lu wrote: > >> >> > In 64-bit mod

Re: [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

On 2/9/19, H.J. Lu wrote: > On Sat, Feb 9, 2019 at 7:03 AM Uros Bizjak wrote: >> >> On 2/9/19, H.J. Lu wrote: >> > On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote: >> >> >> >> On 2/9/19, H.J. Lu wrote: >> >> > In 64-bit mode, SSE2 can be used to emulate MMX instructions without >> >> > 3DNOW.

Re: [PATCH, RFC] Avoid the -D option which is not available install-sh

On 2/9/19 7:18 PM, Jakub Jelinek wrote: > On Sat, Feb 09, 2019 at 06:11:00PM +, Bernd Edlinger wrote: >> --- libphobos/libdruntime/Makefile.am(revision 268614) >> +++ libphobos/libdruntime/Makefile.am(working copy) >> @@ -140,10 +140,12 @@ clean-local: >> # Handles generated fi

Re: [PATCH, RFC] Avoid the -D option which is not available install-sh

On Sat, Feb 09, 2019 at 06:11:00PM +, Bernd Edlinger wrote: > --- libphobos/libdruntime/Makefile.am (revision 268614) > +++ libphobos/libdruntime/Makefile.am (working copy) > @@ -140,10 +140,12 @@ clean-local: > # Handles generated files as well > install-data-local: > for file in $(ALL

Re: [testsuite, ada] Don't XPASS gnat.dg/lto19.adb

> Between 20181106 (r265849) and 20181107 (r265879), gnat.dg/lto19.adb > started to XPASS everywhere: > > XPASS: gnat.dg/lto19.adb (test for excess errors) > > Fixed as follows, tested on i386-pc-solaris2.11 and sparc-sun-solaris2.11. Jan just fixed the lto8 failure (thanks!) so you can go ahead

Re: [PATCH, RFC] Avoid the -D option which is not available install-sh

On 1/31/19 12:38 PM, Bernd Edlinger wrote: > Hi, > > I have an issue with the installation of gcc when configured with > --enable-languages=all > on an arm-target where install-sh is used, and make install fails at > libphobos as follows: > > if test -f $file; then \ > /home/ed/gnu/gcc-9-

Fix odr ICE on Ada LTO

Hi, this patch fixes ICE in free_lang_data compiling lto8.adb. The fix is bit symptomatic becuase type_with_linkage_p should return false for Ada types. Perhaps adding explicit flag to DECL_NAME would make sense but it can wait for next stage1. The fix works because at this stage of free_lang_data

Fix overflow issues with new --params

Hi, as demonstrated in the PR, adding using verly large values for uninlined-function-insns and friends leads to overflow. It is easiest to handle this by artificial upper bound on the parameter. I can imagine that for some architectures, like GCN, function calls can be considered expensvie but n

Re: [PR fortran/89077, patch, part 2] - ICE using * as len specifier for character parameter

Committed to trunk as rev. 268726. after adding a comment that a check for negative substring length is already present. The updated version is attached. Thanks for the review. Will not backport unless requested. Harald On 02/08/19 21:36, Harald Anlauf wrote: > The attached patch attempts a su

Re: [PATCH] ARM: fix -masm-syntax-unified (PR88648)

Hi Kyrill, On 10.01.2019 12:38, Kyrill Tkachov wrote: > Hi Stefan, > > On 08/01/19 09:33, Kyrill Tkachov wrote: >> Hi Stefan, >> >> On 01/01/19 23:34, Stefan Agner wrote: >> > This allows to use unified asm syntax when compiling for the >> > ARM instruction. This matches documentation and seems

Re: [PATCH][libbacktrace] Declare external backtrace fns noinline

On 08-02-19 18:25, Thomas Schwinge wrote: > Hi Tom! > > On Fri, 8 Feb 2019 10:41:47 +0100, Tom de Vries wrote: >> The backtrace functions backtrace_full, backtrace_print and backtrace_simple >> walk the call stack, but make sure to skip the first entry, in order to skip >> over the functions them

Re: [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

On Sat, Feb 9, 2019 at 7:03 AM Uros Bizjak wrote: > > On 2/9/19, H.J. Lu wrote: > > On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote: > >> > >> On 2/9/19, H.J. Lu wrote: > >> > In 64-bit mode, SSE2 can be used to emulate MMX instructions without > >> > 3DNOW. We can use SSE2 to support 64-bit

Re: [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

On 2/9/19, H.J. Lu wrote: > On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote: >> >> On 2/9/19, H.J. Lu wrote: >> > In 64-bit mode, SSE2 can be used to emulate MMX instructions without >> > 3DNOW. We can use SSE2 to support 64-bit vectors. >> > >> > PR target/89021 >> > * config/i386

New Finnish PO file for 'gcc' (version 9.1-b20190203)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Finnish team of translators. The file is available at: https://translationproject.org/latest/gcc/fi.po (This file, 'gcc-9.1-b20190203.fi.po',

Re: [PATCH] Fix PR89247

On Fri, Feb 8, 2019 at 4:49 AM Richard Biener wrote: > > > The following fixes LOOP_VECTORIZED IFNs made useless by CFG cleanup > after if-conversion by re-verifying the mentioned loops still exist. > > Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. > > Richard. > > 2019-02-08 Ric

Re: [PATCH 37/43] i386: Allow MMX intrinsic emulation with SSE

On 2/9/19, H.J. Lu wrote: > Allow MMX intrinsic emulation with SSE/SSE2/SSSE3. For pr82483-1.c and > pr82483-2.c, "-mssse3 -mno-mmx" no longer ICEs in 64-bit mode since MMX > intrinsics can be emulated wit SSE. > > gcc/ > > PR target/89021 > * config/i386/i386-builtin.def: Enable MMX

Re: [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

On Sat, Feb 9, 2019 at 6:09 AM Uros Bizjak wrote: > > On 2/9/19, H.J. Lu wrote: > > In 64-bit mode, SSE2 can be used to emulate MMX instructions without > > 3DNOW. We can use SSE2 to support 64-bit vectors. > > > > PR target/89021 > > * config/i386/i386.h (TARGET_MMX_WITH_SSE): New.

Re: [PATCH 14/43] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE

On 2/9/19, H.J. Lu wrote: > Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE. > > PR target/89021 > * config/i386/mmx.md (sse_cvtps2pi): Add SSE emulation. > (sse_cvttps2pi): Likewise. > --- > gcc/config/i386/sse.md | 26 -- > 1 file changed, 16 insertions

Re: [PATCH 04/43] i386: Emulate MMX plusminus/sat_plusminus with SSE

On 2/9/19, H.J. Lu wrote: > Emulate MMX plusminus/sat_plusminus with SSE. Only SSE register source > operand is allowed. > > 2019-02-08 H.J. Lu > Uros Bizjak > > PR target/89021 > * config/i386/mmx.md (MMXMODEI8): Require TARGET_SSE2 for V1DI. > (3): New. >

Re: [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers

On 2/9/19, H.J. Lu wrote: > In 64-bit mode, SSE2 can be used to emulate MMX instructions without > 3DNOW. We can use SSE2 to support 64-bit vectors. > > PR target/89021 > * config/i386/i386.h (TARGET_MMX_WITH_SSE): New. > * config/i386/i386.h (VALID_SSE2_REG_MODE): Allow 64-bit

Re: [PATCH 00/43] V2: Emulate MMX intrinsics with SSE

On 2/9/19, H.J. Lu wrote: > On x86-64, since __m64 is returned and passed in XMM registers, we can > emulate MMX intrinsics with SSE instructions. To support it, we added > > #define TARGET_MMX_WITH_SSE \ > (TARGET_64BIT && TARGET_SSE2 && !TARGET_3DNOW) > > SSE emulation is disabled for 3DNOW s

Re: [PATCH] i386: Use EXT_REX_SSE_REG_P in *movoi_internal_avx/movti_internal

On Sat, Feb 09, 2019 at 01:22:30PM +0100, Jakub Jelinek wrote: > On Sat, Feb 09, 2019 at 04:11:43AM -0800, H.J. Lu wrote: > > I believe all usages of > > > > (ior (match_operand 0 "ext_sse_reg_operand") > > (match_operand 1 "ext_sse_reg_operand")) > > > > should be checked. I am not sure i

[PATCH 34/43] i386: Emulate MMX abs2 with SSE

Emulate MMX abs2 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (abs2): Add SSE emulation. --- gcc/config/i386/sse.md | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/gcc/config/i386/sse.md b/gcc/config

Re: [poweprc] RFA: patch changing expected code generation for test vsx-simode2.c

Hi Vlad, On Fri, Feb 08, 2019 at 02:18:40PM -0500, Vladimir Makarov wrote: > Recently I committed a patch solving > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88560 > > The patch resulted in test vsx-simode2.c failure.  Here is the > difference in generated code: > > @@ -13,9 +13,8 @@ foo:

[PATCH 38/43] i386: Add tests for MMX intrinsic emulations with SSE

Test MMX intrinsics with -msse2 -mno-mmx in 64-bit mode. PR target/89021 * gcc.target/i386/mmx-vals.h: New file. * gcc.target/i386/sse2-mmx-2.c: Likewise. * gcc.target/i386/sse2-mmx-3.c: Likewise. * gcc.target/i386/sse2-mmx-4.c: Likewise. * gcc.targe

[PATCH 28/43] i386: Emulate MMX ssse3_phdv2si3 with SSE

Emulate MMX ssse3_phdv2si3 with SSE by moving bits 64:95 to bits 32:63 in SSE register. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_phdv2si3): Changed to define_insn_and_split to support SSE emulation. --- gcc/config/i386/sse.m

[PATCH 39/43] i386: Also enable SSSE3 __m64 tests in 64-bit mode

Since we now emulate MMX intrinsics with SSE in 64-bit mode without 3DNOW, we can enable SSSE3 __m64 tests even when AVX is enabled. PR target/89021 * gcc.target/i386/ssse3-pabsb.c: Also enable __m64 check in 64-bit mode without 3DNOW, * gcc.target/i386/ssse3-pabsd.

[PATCH 43/43] i386: Implement V2SF comparisons with SSE

In 64-bit mode, implement V2SF comparisons with SEE. Only SSE register source operand is allowed. gcc/ PR target/89028 * config/i386/sse.md (V_128_64): New mode iterator. (VF_128_64): Likewise. (sseintvecmode): Add V2SF. (sseintvecmodelower): Likewise.

[PATCH 40/43] i386: Enable 8-byte vectorizer for TARGET_MMX_WITH_SSE

In 64-bit, we support 8-byte vectorizer with SSE. Also xfail x86-64 targets for gcc.dg/tree-ssa/pr84512.c. gcc/ PR target/89028 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Enable 8-byte vectorizer for TARGET_MMX_WITH_SSE. gcc/testsuite/ PR target/890

[PATCH 29/43] i386: Emulate MMX ssse3_pmaddubsw with SSE

Emulate MMX ssse3_pmaddubsw with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_pmaddubsw): Add SSE emulation. --- gcc/config/i386/sse.md | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/gcc/confi

[PATCH 36/43] i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE

PR target/89021 * config/i386/i386.c (ix86_expand_vector_init_duplicate): Set mmx_ok to true if TARGET_MMX_WITH_SSE is true. (ix86_expand_vector_init_one_nonzero): Likewise. (ix86_expand_vector_init_one_var): Likewise. (ix86_expand_vector_init_general

[PATCH 32/43] i386: Emulate MMX ssse3_psign3 with SSE

Emulate MMX ssse3_psign3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_psign3): Add SSE emulation. --- gcc/config/i386/sse.md | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/gcc/config/i386

[PATCH 31/43] i386: Emulate MMX pshufb with SSE version

Emulate MMX version of pshufb with SSE version by masking out the bit 3 of the shuffle control byte. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_pshufbv8qi3): Renamed to ... (ssse3_pshufbv8qi3_mmx): This. (ssse3_pshufbv8

[PATCH 33/43] i386: Emulate MMX ssse3_palignrdi with SSE

Emulate MMX version of palignrq with SSE version by concatenating 2 64-bit MMX operands into a single 128-bit SSE operand, followed by SSE psrldq. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (ssse3_palignrdi): Changed to define_insn_an

[PATCH 30/43] i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE

Emulate MMX ssse3_pmulhrswv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/sse.md (*ssse3_pmulhrswv4hi3): Add SSE emulation. --- gcc/config/i386/sse.md | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/

[PATCH 41/43] i386: Implement V2SF add/sub/mul with SEE

In 64-bit mode, implement V2SF add/sub/mul with SEE. Only SSE register source operand is allowed. gcc/ PR target/89028 * config/i386/i386.md (comm): Handle mult. * config/i386/mmx.md (plusminusmult): New. (plusminusmult_insn): Likewse. (plusminusmult_mnemo

[PATCH 42/43] i386: Implement V2SF <-> V2SI conversions with SEE

In 64-bit mode, implement V2SF <-> V2SI conversions with SEE. Only SSE register source operand is allowed. gcc/ PR target/89028 * config/i386/sse.md (floatv2siv2sf2): New. (fix_truncv2sfv2si2): Likewise. gcc/testsuite/ PR target/89028 * gcc.target/i386/p

[PATCH 23/43] i386: Emulate MMX mmx_uavgv4hi3 with SSE

Emulate MMX mmx_uavgv4hi3 with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (*mmx_uavgv4hi3): Add SSE emulation. --- gcc/config/i386/mmx.md | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/gcc/config/i

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