On Sat, Feb 02, 2019 at 05:17:31PM -0600, Aaron Sawdey wrote:
> I needed to introduce a local label in this pattern because output_cbranch
> put out a second instruction
> in the long branch case. This fixes the issue but there are a couple ways
> this could be improved:
>
> * output_cbranch() i
On 2/1/19 4:32 AM, Marc Glisse wrote:
Hello,
first, I expect this to be controversial, so feel free to complain.
I don't feel too strongly about whether -Wmaybe-uninitialized should
be in -Wall or in -Wextra, and I might even be somewhat more inclined
to expect to find it in the latter. But s
I needed to introduce a local label in this pattern because output_cbranch put
out a second instruction
in the long branch case. This fixes the issue but there are a couple ways this
could be improved:
* output_cbranch() is passed the original insn and assumes from that that the
branch is a lon
Hi!
On Fri, Feb 01, 2019 at 02:58:48PM -0600, Kelvin Nilsen wrote:
> Overnight regression testing revealed a portability problem with several
> recently installed tests. The tests were observed to fail on a power7 test
> platform.
>
> The tests, which are intended to execute, are compiled with
Committed as revision r268480 after approval by Jerry on IRC.
Cheers,
Dominique
Hi Rainer,
I suspect the two testsuite regressions (compared to a build with
dlpi_tls_modid present) I mentioned are exactly of the kind you mention:
e.g. the gdc.test/runnable/testaa.d failures are like this
core.exception.rangeer...@gdc.test/runnable/testaa.d(410): Range violation
-
On Fri, Feb 01, 2019 at 12:27:57PM -0700, Jeff Law wrote:
> On 2/1/19 7:01 AM, Marek Polacek wrote:
> > On Fri, Feb 01, 2019 at 07:19:25AM -0600, Segher Boessenkool wrote:
> >> On Fri, Feb 01, 2019 at 12:32:45PM +0100, Marc Glisse wrote:
> >>> My opinion is that -Wmaybe-uninitialized would serve it
On Sat, Feb 2, 2019 at 9:07 AM Florian Weimer wrote:
>
> * H. J. Lu:
>
> > 1. MMX maskmovq and SSE2 maskmovdqu aren't equivalent. We emulate MMX
> > maskmovq with SSE2 maskmovdqu by zeroing out the upper 64 bits of the
> > mask operand. A warning is issued since invalid memory access may
> > hap
* H. J. Lu:
> 1. MMX maskmovq and SSE2 maskmovdqu aren't equivalent. We emulate MMX
> maskmovq with SSE2 maskmovdqu by zeroing out the upper 64 bits of the
> mask operand. A warning is issued since invalid memory access may
> happen when bits 64:127 at memory location are unmapped:
>
> xmmintrin
OK - thanks for the patch.
Paul
On Sat, 2 Feb 2019 at 14:41, Thomas Koenig wrote:
>
> Hi,
>
> the attached patch fixes a 7/8/9 regression where a conversion warning
> was emitted for DIM. The problem was that the no-warn flag had not been
> passed down to the arithmetic conversion routines, whi
On Sat, Feb 02, 2019 at 10:18:43AM -0500, David Malcolm wrote:
> > > Alternatively, should these patches go into a branch of queued jit
> > > changes for gcc 10?
> >
> > Is there anything like an ABI involved? If so we should avoid
> > breaking it all the time. Otherwise JIT is not release critica
On Sat, 2019-02-02 at 08:26 +0100, Richard Biener wrote:
> On February 1, 2019 10:11:12 PM GMT+01:00, David Malcolm dhat.com> wrote:
> > On Mon, 2019-01-21 at 08:40 +, Andrea Corallo wrote:
> > > Hi all,
> > > Second version of the patch addressing David's comment about all-
> > > non-
> > > f
Hi,
the attached patch fixes a 7/8/9 regression where a conversion warning
was emitted for DIM. The problem was that the no-warn flag had not been
passed down to the arithmetic conversion routines, which is solved here
by adding and using a flag in gfc_expr.
Regression-tested. OK for affected
Sorry, Dave,
what should I do with this patch?
Bernd.
On 11/9/18 5:52 PM, Bernd Edlinger wrote:
> Hi Dave,
>
> is the patch OK, or do you still have questions?
>
>
> Thanks
> Bernd.
>
> On 11/2/18 10:48 PM, Bernd Edlinger wrote:
>> On 11/2/18 9:40 PM, David Malcolm wrote:
>>> On Sun, 2018-0
On Sat, Feb 02, 2019 at 11:22:55AM +0100, Jakub Jelinek wrote:
> The only "regression" was gcc.target/i386/call-1.c with
> -fstack-protector-strong, but that is because the test is invalid:
> void set_eax(int val)
> {
> __asm__ __volatile__ ("mov %0, %%eax" : : "m" (val));
> }
> - missing "eax" c
On Sat, Feb 02, 2019 at 11:01:10AM +0100, Johannes Pfau wrote:
> Adds a configure test for qsort_r and use the fallback code path if
> it's not available. Fixes d/88127. rt/qsort.d changes have been
> pushed upstream and reviewed there:
> https://github.com/dlang/druntime/pull/2480
> Bootstrapped
On Fri, Feb 01, 2019 at 11:52:04PM +0100, Eric Botcazou wrote:
> > So, can we e.g. keep emitting the epilogue where it is now for
> > naked_return_label != NULL_RTX and move it otherwise?
> > For __builtin_return the setter and use of the hard register won't be
> > adjacent in any case.
>
> See my
Adds a configure test for qsort_r and use the fallback code path if
it's not available. Fixes d/88127. rt/qsort.d changes have been
pushed upstream and reviewed there: https://github.com/dlang/druntime/pull/2480
Bootstrapped & ran D test suite on x86_64_linux with a recent glibc,
checked that Have_
Unfortunately, it doesn't. I have taken it though since it should
pretty low hanging fruit.
Cheers
Paul
On Fri, 1 Feb 2019 at 19:31, Steve Kargl
wrote:
>
> On Fri, Feb 01, 2019 at 06:15:21PM +, Paul Richard Thomas wrote:
> > I will commit this patch as 'obvious' tomorrow.
> >
> > Cheers
> >
Hi Steve,
> taking taking
>
OK OK
> > Index: gcc/fortran/trans-expr.c
> > ===
> > *** gcc/fortran/trans-expr.c (revision 268231)
> > --- gcc/fortran/trans-expr.c (working copy)
> > *** gfc_conv_procedure_call (gfc_se *
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