On 02/28/2016 07:34 AM, tbsaunde+...@tbsaunde.org wrote:
From: Trevor Saunders
when run in repos other than gcc mklog fails to find ChangeLog files
because it looks for $0/../$dir/ChangeLog, but of course if the diff is
for a project other than gcc that might not exist. It should be fine to
> From: Alan Lawrence
> Date: Tue, 19 Jan 2016 13:22:13 +
(Regarding some incidentally failing tests)
> Hmm, I still see these passing, both natively on arm-none-linux-gnueabihf and
> with a cross-build. hf implies --with-float=hard, right?
(Since you mention it...)
Oddly, it doesn't; you
On Mon, Feb 29, 2016 at 11:11:11AM -0800, Richard Henderson wrote:
> >>> If you check for fixed registers as well here, does that work for you?
> >>
> >> Maybe. It prevents canonicalization of reg+fp vs fp+reg, which could well
> >> occur via arithmetic on locally allocated arrays.
> >
> > Where
On Mon, Feb 29, 2016 at 11:49 AM, Bill Schmidt
wrote:
> Hi,
>
> PR70011 identifies an old vectorization test that recently started
> failing on GCC 6 with POWER8 hardware. This "failure" is that we now
> find vectorization of the test case to be profitable, where it didn't
> used to be. A combin
PR preprocessor/69985 reports an ICE due to the failure of:
linemap_assert_fails (map == linemap_lookup (set, r)))
The root cause seems to be the range-packing optimization I added in
r230331; it looks like I forgot to update
linemap_position_for_loc_and_offset accordingly. Sorry.
The followi
On 01/27/2016 10:39 AM, H.J. Lu wrote:
Here is the updated patch with new testcases. OK for trunk?
This is not a complete patch.
Please update type_is_empty_record_p to use the definition from the
recent discussion:
An empty type is a type where it and all of its subobjects (recursively)
> +/* Number of words (partially) occupied for a given size in units. */
> +#define NWORDS_UP(SIZE) (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
>
> -#define ROUND_ADVANCE(SIZE) (((SIZE) + UNITS_PER_WORD - 1) /
> UNITS_PER_WORD)
>
> You can use CEIL macro from system.h here.
Good idea, than
This mirrors a fix that was made to DOM a while back. Essentially we've
got a test of a boolean ranged object against a value outside the range
of a boolean. That's not correctly handled by uncprop at the moment,
and is fixed by this patch.
There's clearly a missed optimization there (and
On 02/29/16 12:07, Wilco Dijkstra wrote:
Evandro Menezes wrote:
Please, verify the new "simd" and "fp" attributes for SF and DF.
Both movsf and movdf should be:
(set_attr "simd" "*,yes,*,*,*,*,*,*,*,*")
(set_attr "fp" "*,*,*,yes,yes,yes,yes,*,*,*")
Did you check that with -mcpu=generic+nos
We've recently started looking at getting loop fixups scheduled when
removing edges to address a regression.
This BZ is a closely related problem, namely that duplicating a block
can turn an irreducible loop into a natural loop as well. After the
problems with tying into the low level CFG
sourceforge.net now uses https.
Committed.
Gerald
Index: extensions.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/extensions.html,v
retrieving revision 1.57
diff -u -r1.57 extensions.html
--- extensions.html 28 Feb 2016 19:50:07 -0
Committed.
Gerald
Index: gcc-4.7/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-4.7/changes.html,v
retrieving revision 1.142
diff -u -r1.142 changes.html
--- gcc-4.7/changes.html14 Nov 2015 23:27:24 - 1.142
+
Hi,
As discussed in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69708 and
corresponding mailing list discussion, IPA CP is not detecting a
jump-function with the sq function as value.
static int sq(int x) {
return x * x;
}
static const F f = {sq};
...
dosomething (g(f, x));
...
I added
Hi,
On Mon, 29 Feb 2016, Mikael Pettersson wrote:
> Well, almost. While it is true that a signal handler cannot
> *accidentally* clobber the register state of the interrupted thread, it
> can in fact access and update any part of that state via the ucontext_t
> passed to it. Doing so is unco
Michael Matz writes:
> > > FWIW: signal handlers need no consideration (if they were allowed to
> > > inspect/alter global reg vars we would have lost and no improvement on
> > > fixed_regs[] could be done). They are explicitely documented to not be
> > > able to access global reg vars. (They
Hi David,
Please ignore this request. I had asked Paul to do this, but was
confused that it relied on other patches that are not in GCC 5. My
fault.
Thanks,
Bill
On Mon, 2016-02-29 at 11:33 -0600, Paul E. Murphy wrote:
> Hi David,
>
> Bill merged this into trunk last week.
>
> Is it okay to
On 02/26/2016 01:52 PM, Segher Boessenkool wrote:
> On Fri, Feb 26, 2016 at 01:35:10PM -0800, Richard Henderson wrote:
>> On 02/26/2016 01:03 PM, Segher Boessenkool wrote:
>>> On Thu, Feb 25, 2016 at 09:08:32PM -0800, Richard Henderson wrote:
+ /* Perform rematerialization if only all ope
Hi,
On Mon, 29 Feb 2016, Bernd Schmidt wrote:
> On 02/29/2016 06:07 PM, Michael Matz wrote:
>
> > %rbx would have to be implicitly used/clobbered by the asm. In addition
> > it would have to be used by all function entries and exits (so that a
> > function body where the global reg var is merel
Evandro Menezes wrote:
>
> Please, verify the new "simd" and "fp" attributes for SF and DF.
Both movsf and movdf should be:
(set_attr "simd" "*,yes,*,*,*,*,*,*,*,*")
(set_attr "fp" "*,*,*,yes,yes,yes,yes,*,*,*")
Did you check that with -mcpu=generic+nosimd you get fmov s0, wzr?
In my version
Hi all,
Now that we've moved to pragmas guarding the various intrinsics in arm_neon.h I
think we should still
throw a #error if someone tries to include the header while compiling for
-mfloat-abi=soft.
This gives a more helpful error message when someone has a compiler configured
--with-float
On Fri, Feb 26, 2016 at 09:32:53AM +0100, Richard Biener wrote:
>
> The following fixes PR69951, hopefully the last case of decl alias
> issues with alias analysis. This time it's points-to and the DECL_UIDs
> used in points-to sets not being canonicalized.
>
> The simplest (and cheapest) fix is
Hi David,
Bill merged this into trunk last week.
Is it okay to backport this to GCC 5?
Thanks,
Paul
On 02/22/2016 05:51 PM, David Edelsohn wrote:
> libgcc
> * config/rs6000/sfp-machine.h:
> (_FP_DECL_EX): Declare _fpsr as a union of u64 and double.
> (FP_TRAPPING_EXCEPTIONS): Return a bitmask o
On 02/29/2016 06:07 PM, Michael Matz wrote:
%rbx would have to be implicitly used/clobbered by the asm. In addition
it would have to be used by all function entries and exits (so that a
function body where the global reg var is merely visible but not used
doesn't accidentally clobber that regis
Hi,
On Fri, 26 Feb 2016, Bernd Schmidt wrote:
> Calls do, asms currently don't AFAICT. Not sure whether it's allowed to
> use them, but I think it should be straightforward to adjust df-scan.
>
> > Some jit-like code uses global reg vars to reserve registers for the
> > generated code. It wou
Hi,
PR70011 identifies an old vectorization test that recently started
failing on GCC 6 with POWER8 hardware. This "failure" is that we now
find vectorization of the test case to be profitable, where it didn't
used to be. A combination of two factors allowed this to become
profitable here: Firs
Hi all,
The gcc.dg/lto/pr54709, pr61526, pr64415 linking testcases keep failing on
arm/aarch64 bare-metal target.
It's because statically built newlib library is used to link with shared object.
And the linker complains about relocations which cannot be used in
shared object.
For example, the f
Hi Vladimir,
Thank you for explain it.
I have a few comments inlined.
On 26/02/16 23:54, Vladimir Makarov wrote:
Thanks for working on this and providing a good description of the
problem. Could you fill a PR and provide a test even if you can not
reduce it.
I will fill a PR. Try to reduc
Hi all,
I've had this one sitting in my tree for some time.
The arm1020e automaton has no business being as large as it is (3185 states).
Most of the bloat is due to overly large reservation durations for calls and FP
division.
This patch reduces the durations to something more sensible.
This b
On Mon, Feb 29, 2016 at 04:26:12PM +0100, Richard Biener wrote:
> *** get_unary_op (tree name, enum tree_code
> *** 621,626
> --- 641,680
> return NULL_TREE;
> }
>
> + /* Return true if OP1 and OP2 have the same value if casted to either type.
> */
> +
> + static b
Hi Eric.
> In sparc systems glibc uses libgcc's unwinder to implement the
> backtrace(3) function, defaulting to a simple non-dwarf unwinder if
> libgcc_s doesn't provide a working _Unwind_Backtrace.
>
> However, libgcc's unwinder uses .eh_frame instead of .frame_debug, and
On 2/29/2016 5:37 AM, Kyrill Tkachov wrote:
On 28/02/16 21:34, Joel Sherrill wrote:
On February 28, 2016 3:20:24 PM CST, Gerald Pfeifer wrote:
On Wed, 24 Feb 2016, Richard Earnshaw (lists) wrote:
I propose to commit this patch later this week.
+ Support for revisions of the ARM arc
On Mon, Feb 29, 2016 at 2:38 PM, Bernd Schmidt wrote:
> On 02/27/2016 08:12 PM, Richard Biener wrote:
>>
>>
>>
>> Am Freitag, 26. Februar 2016 schrieb Jeff Law :
>>
>> The other case that came to mind was signal handlers. What happens
>> if we're using the global register as a scratch, we
On 29/02/16 11:21, Michael Collison wrote:
>
>
> On 2/29/2016 4:06 AM, Kyrill Tkachov wrote:
>> Hi Michael,
>>
>> On 29/02/16 04:47, Michael Collison wrote:
>>> This patches address PR 70008, where a reverse subtract with carry
>>> instruction can be generated in thumb2 mode. It was tested with n
This fixes fallout of my SCEV correctness change where reassoc no longer
sees the ~A + A simplification opportunity due to casts that are in the
way.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2016-02-29 Richard Biener
PR tree-optimization/69994
Hello.
Following patch limits the number of dump information which is printed
to *.hsagen dump file. Patch has been pre-approved by Martin Jambor
and survives regbootstrap on x86_64-linux-gnu.
Installed as r233814.
Thanks,
Martin
>From 30e91f90196fcf4c2180bd907ad0f775611f7135 Mon Sep 17 00:00:00
On 02/29/2016 08:18 AM, Richard Biener wrote:
On Mon, Feb 29, 2016 at 2:38 PM, Bernd Schmidt wrote:
On 02/27/2016 08:12 PM, Richard Biener wrote:
Am Freitag, 26. Februar 2016 schrieb Jeff Law :
The other case that came to mind was signal handlers. What happens
if we're using the
Andreas Krebbel wrote:
> S/390: Use enabled attribute overrides to disable alternatives.
> S/390: Get rid of Y constraint in rotate patterns.
> S/390: Get rid of Y constraint in left and logical right shift
> patterns.
> S/390: Get rid of Y constraint in arithmetic right shift patterns
Andreas Krebbel wrote:
> +; vec_set is supposed to *modify* an existing vector so operand 0 is
> +; duplicated as input operand.
> +(define_expand "vec_set"
> + [(set (match_operand:V0 "register_operand"
> "")
> + (unspec:V [(match_operand: 1 "general_operan
On 29 February 2016 at 15:28, Kyrill Tkachov
wrote:
> Hi Crhistophe,
>
>
> On 29/02/16 14:10, Christophe Lyon wrote:
>>
>> On 26 February 2016 at 16:51, James Greenhalgh
>> wrote:
>>>
>>> On Thu, Feb 25, 2016 at 11:04:21AM +, Kyrill Tkachov wrote:
Hi all,
Seems like aarch6
Hi Crhistophe,
On 29/02/16 14:10, Christophe Lyon wrote:
On 26 February 2016 at 16:51, James Greenhalgh wrote:
On Thu, Feb 25, 2016 at 11:04:21AM +, Kyrill Tkachov wrote:
Hi all,
Seems like aarch64 is suffering from something similar to PR 69245 as well.
If a target pragma sets the targe
The bug here was that we were sharing the CONSTRUCTOR between the value
of 'a' and the elements of 'result', so changing 'a' also changed the
value of result[0]. Oops.
Tested x86_64-pc-linux-gnu, applying to trunk and 5.
commit 20c203ae124fd4fb2975eb3fb0c50ce7ade35e69
Author: Jason Merrill
Da
On 26 February 2016 at 16:51, James Greenhalgh wrote:
> On Thu, Feb 25, 2016 at 11:04:21AM +, Kyrill Tkachov wrote:
>> Hi all,
>>
>> Seems like aarch64 is suffering from something similar to PR 69245 as well.
>> If a target pragma sets the target state to the same as the
>> target_option_defau
On Mon, Feb 29, 2016 at 05:03:38PM +0300, Yuri Rumyantsev wrote:
> 2016-02-29 Yuri Rumyantsev
>
> PR tree-optimization/69652
> gcc/testsuite/ChangeLog:
> * gcc.dg/torture/pr69652.c: Delete test.
> * gcc.dg/vect/pr69652.c: New test.
Ok, with:
/* { dg-additional-options "-mavx -ffast-math" { tar
Jacub!
Here is patch and ChangeLog to move pr69652.c to /vect directory.
Is it OK for trunk.
Thanks.
Yuri.
ChangeLog:
2016-02-29 Yuri Rumyantsev
PR tree-optimization/69652
gcc/testsuite/ChangeLog:
* gcc.dg/torture/pr69652.c: Delete test.
* gcc.dg/vect/pr69652.c: New test.
2016-02-29 16:
On 02/27/2016 08:12 PM, Richard Biener wrote:
Am Freitag, 26. Februar 2016 schrieb Jeff Law :
The other case that came to mind was signal handlers. What happens
if we're using the global register as a scratch, we hit a memory
reference that faults and inside the signal handler the
On 02/29/2016 09:46 AM, Andreas Krebbel wrote:
Ok for mainline?
* gensupport.c (process_substs_on_one_elem): Split loop to
complete mark_operands_used_in_match_dup on all expressions in the
vector first.
(adjust_operands_numbers): Inline into process_substs_on_one
On Wed, Feb 24, 2016 at 03:49:09PM +0100, Richard Biener wrote:
> 2016-02-24 Richard Biener
> Jakub Jelinek
>
> PR middle-end/69760
> * tree-scalar-evolution.c (interpret_rhs_expr): Re-write
> conditionally executed ops to well-defined overflow behavior.
>
> * g
On Mon, Feb 29, 2016 at 05:01:52AM -0800, H.J. Lu wrote:
> On Mon, Feb 29, 2016 at 3:53 AM, Yuri Rumyantsev wrote:
> > This test simply checks that ICE is not occurred but not any
> > vectorization issues.
>
> Can we remove
>
> /* { dg-options "-O2 -ffast-math -ftree-vectorize " } */
>
> then?
On Mon, Feb 29, 2016 at 3:53 AM, Yuri Rumyantsev wrote:
> This test simply checks that ICE is not occurred but not any
> vectorization issues.
Can we remove
/* { dg-options "-O2 -ffast-math -ftree-vectorize " } */
then?
H.J.
> Best regards.
> Yuri.
>
> 2016-02-28 20:29 GMT+03:00 H.J. Lu :
>>
On 04/02/16 09:00, Ramana Radhakrishnan wrote:
On Fri, Jan 22, 2016 at 9:52 AM, Kyrill Tkachov
wrote:
Hi all,
As part of investigating the codegen effects of a fix for PR 65932 I found
we assign
too high a cost for the sign-extending multiply instruction SMULBB.
This is because we add the cos
This test simply checks that ICE is not occurred but not any
vectorization issues.
Best regards.
Yuri.
2016-02-28 20:29 GMT+03:00 H.J. Lu :
> On Wed, Feb 10, 2016 at 2:26 AM, Yuri Rumyantsev wrote:
>> Thanks Richard for your comments.
>> I changes algorithm to remove dead scalar statements as yo
Hi All,
Here is a simple patch for gcc.dg/ifcvt5.c test - detect "6 basic
blocks" string in rtl dump also to accept speculative motion of
else-part of if-stmt before test-part aka IF-CASE-2.
Is it OK for trunk?
ChanageLog:
2016-02-29 Yuri Rumyantsev
PR rtl-optimization/69942
gcc/testsuite/Ch
On 28/02/16 21:34, Joel Sherrill wrote:
On February 28, 2016 3:20:24 PM CST, Gerald Pfeifer wrote:
On Wed, 24 Feb 2016, Richard Earnshaw (lists) wrote:
I propose to commit this patch later this week.
+ Support for revisions of the ARM architecture prior to ARMv4t
has
+ been depr
On Fri, Feb 26, 2016 at 02:45:38PM -0700, Jeff Law wrote:
> This one leaves the type incomplete, right? So ISTM it's somewhat more
> likely than the second to expose other errors later with code that doesn't
> expect the type to be incomplete (much like other code doesn't expect to
> find error_ma
On 2/29/2016 4:13 AM, Kyrill Tkachov wrote:
On 26/02/16 10:32, Michael Collison wrote:
On 02/25/2016 02:51 AM, Kyrill Tkachov wrote:
Hi Michael,
On 24/02/16 23:02, Michael Collison wrote:
This patch adds support for builtin overflow of add, subtract and
negate. This patch is targeted for
On 2/29/2016 4:06 AM, Kyrill Tkachov wrote:
Hi Michael,
On 29/02/16 04:47, Michael Collison wrote:
This patches address PR 70008, where a reverse subtract with carry
instruction can be generated in thumb2 mode. It was tested with no
regressions in arm and thumb modes on the following targets
Hello!
> This is both an ICE and an ABI bug dating back to the implementation of the
> 64-bit calling conventions in 1998: for structures larger than 8 bytes and not
> larger than 16 bytes containing a FP field in the second half and passed in
> slot #15 of the parameter array, the compiler passes
On 26/02/16 10:32, Michael Collison wrote:
On 02/25/2016 02:51 AM, Kyrill Tkachov wrote:
Hi Michael,
On 24/02/16 23:02, Michael Collison wrote:
This patch adds support for builtin overflow of add, subtract and negate. This
patch is targeted for gcc 7 stage 1. It was tested with no regressi
Hi Michael,
On 29/02/16 04:47, Michael Collison wrote:
This patches address PR 70008, where a reverse subtract with carry instruction
can be generated in thumb2 mode. It was tested with no regressions in arm and
thumb modes on the following targets:
arm-none-linux-gnueabi
arm-none-linux-gnuab
Err. I think the way you implement that in reassoc is ad-hoc and not
related to reassoc at all.
In fact what reassoc is missing is to handle
-y * z * (-w) * x -> y * x * w * x
thus optimize negates as if they were additional * -1 entries in a
multiplication chain. And
then optimize a singl
On 15/02/16 10:33, Andre Vieira (lists) wrote:
On 18/01/16 11:04, Andre Vieira (lists) wrote:
Hi there,
Can we have the "#pragma GCC pop_options" fix backported to GCC-5?
Patch found in https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01261.html
and was committed in r228794.
The same patch appli
On 25/02/16 11:00, Yvan Roux wrote:
Hi,
On 26 January 2015 at 18:01, Matthew Wahab wrote:
Hello,
The LEGITIMIZE_RELOAD_ADDRESS macro is only needed for reload. Since the
Aarch64 backend no longer supports reload, this macro is not needed and this
patch removes it.
Tested aarch64-none-linux-g
Hi,
this documents the following changes:
- new scalar_storage_order type attribute in C,
- ABI change for SPARC 64-bit,
- automatic enabling of -mstackrealign with SSE for Windows 32-bit.
OK to apply?
--
Eric BotcazouIndex: htdocs/gcc-6/changes.html
=
ks. Remove commented out code.
(sparc_arg_partial_bytes): Adjust to above renaming. Deal with the
case of a structure passed in slot #15
(sparc_function_arg_advance): Likewise.
(function_arg_padding): Minor tweak.
2016-02-29 Eric Botcazou
* gcc.target/sparc/20160229-1.c: New
This one is not a regression but the fix is trivial and also enables a nice
cleanup in the processing of access types: for a circular array type (an array
type whose component type is a pointer to itself), gigi enters an infinite
recursion and then eventually crashes.
Tested on x86_64-suse-linu
This one is a very recent regression introduced on the mainline in ASIS mode.
Tested on x86_64-suse-linux, applied on the mainline.
2016-02-29 Eric Botcazou
* gcc-interface/decl.c (gnat_to_gnu_entity) : In
ASIS mode, fully lay out the minimal record type.
--
Eric BotcazouIn
Another long-standing regression present in the compiler (dating back to the
Tree-SSA merge): the compiler generates code that has an unexpectedly large
stack usage for nested calls on strings, because the gimplifier creates
temporaries in the outermost scope that have overlapping live ranges.
This is a long-standing regression present in the compiler: it issues an
unexpected error on the renaming of a component of the return value of a
function call, when the return type has dynamic size and the renaming is
declared at library level.
Tested on x86_64-suse-linux, applied on the mainl
After Y is never used anymore with SImode operands we can finally
disallow SImode (if != Pmode) in s390_decompose_address. In fact that
was the whole point of the patch series.
gcc/ChangeLog:
2016-02-29 Andreas Krebbel
* config/s390/s390.c (s390_decompose_address): Don't accept SImod
The arithmetic shift patterns set also the condition code. This adds
more substitution potential. Depending on whether the actual result
or the CC output will be used 3 different variants of each of these
patterns are needed. This multiplied with the PLUS and the AND
operands from the earlier su
While trying to get rid of the Y constraint in the setmem patterns I
noticed that for these patterns it isn't even a problem since these
always only use the constraint with a Pmode match_operand. But while
being at it I've tried to fold some of the patterns a bit.
gcc/ChangeLog:
2016-02-29 Andr
This finally removes the Y constraint from the vector patterns while
folding some of them using a code iterator.
gcc/ChangeLog:
2016-02-29 Andreas Krebbel
* config/s390/subst.md (DSI_VI): New mode iterator.
("addr_style_op_subst"): Use DSI_VI instead of DSI.
* config/s
So far whenever we wanted to disable an alternative we have used mode
attributes emitting constraints matching an earlier alternative
assuming that due to this the later alternative will never be chosen.
With this patch the `enabled' attribute, which so far is only set from
`cpu_facility', is over
With this patch the substitution patterns added earlier are used for
the logical right shift and all the left shift patterns.
2016-02-29 Andreas Krebbel
* config/s390/s390.md ("3"): Change predicate of
op2 to nonmemory_operand.
("*di3_31", "*di3_31_and"):
Merge
here is an updated version of the shift count rework in the S/390
backend.
Bootstrapped and regtested on s390 and s390x --with-arch=z196,zEC12,z13
Changes:
- Merge the address reg and immediate alternatives as suggested in:
https://gcc.gnu.org/ml/gcc-patches/2016-02/msg01744.html
- Add constr
This removes the Y constraint from the tabort pattern definition. In
this case it is easier without using substitutions.
gcc/ChangeLog:
2016-02-29 Andreas Krebbel
* config/s390/s390.md ("*tabort_1"): Change predicate to
nonmemory_operand. Add a second alternative to cover
When processing substitutions the operands are renumbered. To find a
free operand number the array used_operands_numbers is used.
Currently this array is used to assign new numbers before all the
RTXes in the vector have been processed. I did run into problems with
this for insns where a match_du
This patch introduces substitution patterns to add PLUS const_int, and
AND operands to patterns and uses this to rewrite the existing rotate
pattern.
gcc/ChangeLog:
2016-02-29 Andreas Krebbel
* config/s390/predicates.md (const_int_6bitset_operand): New
predicates.
* co
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