Re: Enable pointer TBAA for LTO

Hi! On Mon, 23 Nov 2015 18:34:30 +0300, Ilya Verbin wrote: > On Mon, Nov 23, 2015 at 16:31:42 +0100, Richard Biener wrote: > > I think it also causes the following and one related ICE > > > > FAIL: gcc.dg/vect/pr62021.c -flto -ffat-lto-objects (internal compiler > > error) > > > > /space/rguen

[gomp4] Merge trunk r230720 (2015-11-22) into gomp-4_0-branch

Hi! Committed to gomp-4_0-branch in r230992: commit 8373bdf9386875ed123bef3344bbbfddff5f7eec Merge: 3ce2a2e 2ec3c6f Author: tschwinge Date: Fri Nov 27 06:21:15 2015 + svn merge -r 230627:230720 svn+ssh://gcc.gnu.org/svn/gcc/trunk git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc

Re: Fix verify_type ICE during Ada bootstrap

> On Tue, 24 Nov 2015, Jan Hubicka wrote: > > > > > > > > > We do already wrap all bases into MEM_REFs at streaming time, it would > > > > be easy to adjust it to make it effectively alias-set zero. But of > > > > course the overhead and the downstream effects of having more MEM_REFs > > > > (we

Re: [PATCH 7/N] Fix newly introduced memory leak in tree-ssa-loop-ivopts.c

On Fri, Nov 27, 2015 at 5:08 AM, Martin Liška wrote: > Hi. > > There's one more patch that fixes really of lot memory leaks related to loop > ivopts. > The regression was introduced by r230647. > > Patch was tested in the series with the rest and the compiler bootstraps > successfully. > > Ready f

Re: [PING] Re: [PATCH] c++/67913, 67917 - fix new expression with wrong number of elements

On 11/26/2015 10:45 AM, Martin Sebor wrote: On 11/26/2015 04:33 AM, Ramana Radhakrishnan wrote: Cookies on ARM are 8-bytes [1], but sizeof ((size_t) n) is only 4-bytes, so this check will fail (We'll ask for 500 bytes, the test here will only be looking for 496). Would it undermine the test f

Re: [PR67335] drop dummy zero from reverse VTA ops, fix infinite recursion

On Nov 26, 2015, Alexandre Oliva wrote: > for gcc/ChangeLog > PR debug/67355 > * var-tracking.c (reverse_op): Don't add dummy zero to reverse > ops that simplify back to the original value. > * alias.c (refs_newer_value_p): Cut off recursion for > expressions conta

[PR67335] drop dummy zero from reverse VTA ops, fix infinite recursion

VTA's cselib expression hashing compares expressions with the same hash before adding them to the hash table. When there is a collision involving a self-referencing expression, we could get infinite recursion, in spite of the cycle breakers already in place. The problem is currently latent in the

[patch] Fix PR c++/68290

Hi, this is a variant of the just fixed PR c++/68434 on SPARC64/Solaris: /vol/gcc/src/hg/trunk/local/gcc/testsuite/g++.dg/concepts/auto1.C:16:6: internal compiler error: canonical types differ for identical types C and C with the same underlying issue, which is that TYPE_CANONICAL is computed

[PATCH 7/N] Fix newly introduced memory leak in tree-ssa-loop-ivopts.c

Hi. There's one more patch that fixes really of lot memory leaks related to loop ivopts. The regression was introduced by r230647. Patch was tested in the series with the rest and the compiler bootstraps successfully. Ready for trunk? Thanks, Martin >From 1f06962c8f126de5aa847882dadba4b95fc89

Re: [PATCH] Fix memory leaks in tree-ssa-uninit.c

On 11/26/2015 09:53 PM, Martin Liška wrote: Is the patch still candidate to be merged in current stage3, or should I leave it to the next stage1? What about the first patch or the patch, where I just applied replacement of whitespaces? As I said previously, the one to just replace whitespace is

Re: [PATCH 3/6] Fix memory leaks in IPA devirt

On 11/23/2015 11:29 PM, Trevor Saunders wrote: On Mon, Nov 23, 2015 at 02:48:37PM +0100, marxin wrote: gcc/ChangeLog: 2015-11-20 Martin Liska * ipa-devirt.c (ipa_devirt): Use auto_vec instead of a local-scope vec. Release final_warning_records. --- gcc/ipa-devirt.c | 5 +++

Re: [PATCH 2/6] Fix memory leak in tree-ssa

On 11/23/2015 02:48 PM, marxin wrote: gcc/ChangeLog: 2015-11-20 Martin Liska * tree-ssa.c (redirect_edge_var_map_destroy): Release vectors that are used as a second argument of a hash_map. --- gcc/tree-ssa.c | 5 + 1 file changed, 5 insertions(+) diff --git a/gcc/tree

Re: [PATCH 1/6] Fix memory leak in cilk

On 11/23/2015 02:48 PM, marxin wrote: gcc/c/ChangeLog: 2015-11-20 Martin Liska PR c++/68312 * c-array-notation.c (fix_builtin_array_notation_fn): Use release_vec_vec instead of vec::release. (build_array_notation_expr): Likewise. (fix_conditional_array

Re: [PATCH] Fix memory leaks in tree-ssa-uninit.c

On 11/20/2015 12:15 PM, Martin Liška wrote: On 11/20/2015 03:14 AM, Bernd Schmidt wrote: BTW, I'm with whoever said absolutely no way to the idea of making automatic changes like this as part of a commit hook. I think the whitespace change can go in if it hasn't already, but I think the other

fix formatting

I checked this in to fix a formatting issue. != binds more tightly than &&. Index: lra-constraints.c === --- lra-constraints.c (revision 230982) +++ lra-constraints.c (working copy) @@ -2556,8 +2556,8 @@ process_alt_operands (in

RE: [PATCH] MIPS/GCC/doc: Reorder `-mcompact-branches='

On Thu, 26 Nov 2015, Moore, Catherine wrote: > > OK to apply? > > > Yes -- thanks. Applied, thanks for your review. Maciej

Re: [RFC] Getting LTO incremental linking work

> > what about allowing -flinker-output=XXX at link time as a driver option > and avoiding to override it if already present? That sounds good. I will implement that. > > > > >struct cgraph_node *node = order[i]; > > > > > > > > - if (node->has_gimple_body_p ()) > > > > + if

Re: [PATCH] Fix VEC_PERM_EXPR expansion regression (PR tree-optimization/68552)

On November 26, 2015 7:07:57 PM GMT+01:00, Jakub Jelinek wrote: >Hi! > >My recent tree-vect-generic.c changes broke Alpha. My changes assume >that if there is vec_shr_optab, middle argument 0 vector and last >argument >shift-ish selector, then expand_vec_perm will always handle it, but it >turns

Re: [PATCH] Fix genmatch dependency issue

On November 26, 2015 7:12:34 PM GMT+01:00, Jakub Jelinek wrote: >Hi! > >When upgrading a gcc tree < r230888 with objdir to r230888 or later >and just doing make in the gcc subdir, I'm getting errors - genmatch >complains that it doesn't know IFN_FMAX. >The problem seems to be a missing dependency

[PATCH] fix PR65726

Hi all, the attached patch fixes the build issue from this ticket if bootstrap is disabled. Tested on x86_64-*-linux* and on x86_64-*-freebsd* with gcc and clang. Ok for trunk? And 5.3? Thanks, Andreas 2015-11-26 Andreas Tobler PR libffi/65726 * Makefile.def (lang_env_d

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On November 26, 2015 5:36:34 PM GMT+01:00, Joseph Myers wrote: >On Thu, 26 Nov 2015, Marek Polacek wrote: > >> My worry was of course C_MAYBE_CONST_EXPR_PRE. But it seems we'll >never have >> any at that point, since it's already been processed and transformed >to a >> COMPOUND_EXPR. But do I l

[PATCH] Fix genmatch dependency issue

Hi! When upgrading a gcc tree < r230888 with objdir to r230888 or later and just doing make in the gcc subdir, I'm getting errors - genmatch complains that it doesn't know IFN_FMAX. The problem seems to be a missing dependency, build/gencfn-macros depends on internal-fn.def and thus cfn-operators.

[PATCH] Fix VEC_PERM_EXPR expansion regression (PR tree-optimization/68552)

Hi! My recent tree-vect-generic.c changes broke Alpha. My changes assume that if there is vec_shr_optab, middle argument 0 vector and last argument shift-ish selector, then expand_vec_perm will always handle it, but it turns out it does not, because expand_vec_perm does not call expand_vec_perm_1

[PATCH] Diagnose OpenMP standalone directives after labels (PR c/63326)

Hi! Old OpenMP standard versions for standalone directives just said that they shouldn't be placed in places where it would make a difference for parsing other statements whether the directive is ignored or not, later versions of the standard clarified it (not completely correctly) to after if, wh

Re: [Fortran, Patch] (RFC, Coarray) Implement TS18508's EVENTS

Hi all, in attachment the patch for tests and missing functions in libcaf_single (needed by the test suite). Built and regtested on x86_64-pc-linux-gnu. 2015-11-26 17:51 GMT+01:00 Steve Kargl : > On Wed, Nov 25, 2015 at 06:24:49PM +0100, Alessandro Fanfarillo wrote: >> Dear all, >> >> in attachm

Re: [PING] Re: [PATCH] c++/67913, 67917 - fix new expression with wrong number of elements

On 11/26/2015 04:33 AM, Ramana Radhakrishnan wrote: Cookies on ARM are 8-bytes [1], but sizeof ((size_t) n) is only 4-bytes, so this check will fail (We'll ask for 500 bytes, the test here will only be looking for 496). Would it undermine the test for other architectures if I were to swap out

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On Thu, 26 Nov 2015, Jakub Jelinek wrote: > > > But the condition whether to call c_save_expr or whether to call save_expr > > > instead is not constant in the C FE. > > > If c_fully_fold is expected to be called on the expression, then > > > c_save_expr > > > needs to be used, otherwise save_exp

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On Thu, Nov 26, 2015 at 05:05:09PM +, Joseph Myers wrote: > On Thu, 26 Nov 2015, Jakub Jelinek wrote: > > > > Also, on further consideration: the folding via c_fully_fold is relied > > > upon to get information about whether an expression contains anything > > > that > > > cannot occur in a

Re: [PR68432 00/26] Handle size/speed choices for internal functions

Bernd Schmidt writes: > On 11/26/2015 05:22 PM, Richard Sandiford wrote: >> It also isn't suitable for optabs because the conditions are cached >> by init_optabs. I suppose we could have a separate cache for size >> and speed though. > > That sounds necessary given the existence of such insn cond

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On Thu, 26 Nov 2015, Jakub Jelinek wrote: > > Also, on further consideration: the folding via c_fully_fold is relied > > upon to get information about whether an expression contains anything that > > cannot occur in an evaluated part of a constant expression / outside > > sizeof in a constant e

Re: [PATCH][RTL-ifcvt] PR rtl-optimization/68506: Fix emitting order of insns in IF-THEN-JOIN case

On 26/11/15 16:49, Bernd Schmidt wrote: On 11/26/2015 05:45 PM, Kyrill Tkachov wrote: that doesn't help, punt. */ - modified_in_a = emit_a != NULL_RTX && modified_in_p (orig_b, emit_a); if (tmp_b && then_bb) { These bits I thought would be part of a followup patch (which

Re: [Patch 2/3][Aarch64] Add support for IEEE-conformant versions of scalar fmin* and fmax*

On Thu, Nov 26, 2015 at 04:20:35PM -, David Sherwood wrote: > Hi, > > Here is the second patch of the fmin/fmax change, which adds the optabs > to the aarch64 backend. > > Tested: > > x86_64-linux: no regressions > aarch64-none-elf: no regressions > > Good to go? > David Sherwood. Could yo

Re: [Fortran, Patch] (RFC, Coarray) Implement TS18508's EVENTS

On Wed, Nov 25, 2015 at 06:24:49PM +0100, Alessandro Fanfarillo wrote: > Dear all, > > in attachment the previous patch compatible with the current trunk. > The patch also includes the changes introduced in the latest TS 18508. > > Built and regtested on x86_64-pc-linux-gnu. > > PS: I will add t

Re: [PATCH][RTL-ifcvt] PR rtl-optimization/68506: Fix emitting order of insns in IF-THEN-JOIN case

On 11/26/2015 05:45 PM, Kyrill Tkachov wrote: that doesn't help, punt. */ - modified_in_a = emit_a != NULL_RTX && modified_in_p (orig_b, emit_a); if (tmp_b && then_bb) { These bits I thought would be part of a followup patch (which would also guard against single_set proble

Re: [PATCH][RTL-ifcvt] PR rtl-optimization/68506: Fix emitting order of insns in IF-THEN-JOIN case

On 26/11/15 14:35, Kyrill Tkachov wrote: On 26/11/15 14:23, Bernd Schmidt wrote: On 11/26/2015 02:52 PM, Kyrill Tkachov wrote: On 26/11/15 13:40, Bernd Schmidt wrote: On 11/26/2015 12:12 PM, Kyrill Tkachov wrote: modified_in_b = emit_b != NULL_RTX && modified_in_p (orig_a, emit_b);

Re: [PR68432 00/26] Handle size/speed choices for internal functions

On 11/26/2015 05:22 PM, Richard Sandiford wrote: It also isn't suitable for optabs because the conditions are cached by init_optabs. I suppose we could have a separate cache for size and speed though. That sounds necessary given the existence of such insn conditions, unless we want to disallo

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On Thu, Nov 26, 2015 at 04:36:34PM +, Joseph Myers wrote: > On Thu, 26 Nov 2015, Marek Polacek wrote: > > > My worry was of course C_MAYBE_CONST_EXPR_PRE. But it seems we'll never > > have > > any at that point, since it's already been processed and transformed to a > > COMPOUND_EXPR. But d

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On Thu, 26 Nov 2015, Marek Polacek wrote: > My worry was of course C_MAYBE_CONST_EXPR_PRE. But it seems we'll never have > any at that point, since it's already been processed and transformed to a > COMPOUND_EXPR. But do I like this patch? No. It's not obvious to me that it will always have be

Re: [PATCH] libstdc++: Fix libstdc++/67440: pretty-printing of a const set fails

On 26/11/15 16:10 +, Jonathan Wakely wrote: On 26/11/15 15:42 +, Jonathan Wakely wrote: On 25/11/15 19:55 +, Jonathan Wakely wrote: On 25 November 2015 at 17:29, Alan Lawrence wrote: On 16/11/15 21:04, Doug Evans wrote: Hi. Apologies for the delay. https://gcc.gnu.org/bugzilla/

Re: [PR68432 00/26] Handle size/speed choices for internal functions

Bernd Schmidt writes: > On 11/26/2015 04:13 PM, Richard Sandiford wrote: >> That would mean that the validity of a gimple call would depend on both >> the target predicates and whether the block containing the statement >> is optimised for size or speed. So whenever we want to test whether >> a g

[COMMITTED] libitm: Use multiplicative hashing in the multi-lock TM method.

This changes the hash function used in the multi-lock TM method for mapping the address of a transactional access by an application to synchronization metadata. The previous hash function was very simple and just used a range of bits from the address; the new function uses multiplicative hashing (

[Patch 2/3][Aarch64] Add support for IEEE-conformant versions of scalar fmin* and fmax*

Hi, Here is the second patch of the fmin/fmax change, which adds the optabs to the aarch64 backend. Tested: x86_64-linux: no regressions aarch64-none-elf: no regressions Good to go? David Sherwood. ChangeLog: 2015-11-26 David Sherwood gcc/ * config/aarch64/aarch64.md: New patt

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On Thu, Nov 26, 2015 at 05:10:26PM +0100, Marek Polacek wrote: > Bootstrapped/regtested on x86_64-linux, ok for trunk? > > 2015-11-26 Marek Polacek > > PR c/68513 > * c-gimplify.c (strip_c_maybe_const_expr_r): New. > (c_gimplify_expr): Call it. > > * gcc.dg/torture/pr6

Re: [PATCH 7/7][ARM] Add ACLE intrinsics vqrdmlah_lane and vqrdmlsh_lane

Attached the missing patch. Matthew On 26/11/15 16:04, Matthew Wahab wrote: Hello, This patch adds the ACLE intrinsics for the instructions introduced in ARMv8.1. It adds the vqrmdlah_lane and vqrdmlsh_lane forms of the instrinsics to the arm_neon.h header, together with the ARM builtins used t

Re: [PATCH 5/7][Testsuite] Support ARMv8.1 ARM tests.

Attached the missing patch. Matthew On 26/11/15 16:02, Matthew Wahab wrote: Hello, This patch adds ARMv8.1 support to GCC Dejagnu, to allow ARM tests to specify targest and to set up command line options. It builds on the ARMv8.1 target support added for AArch64 tests, partly reworking that sup

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On Thu, Nov 26, 2015 at 12:34:55PM +, Joseph Myers wrote: > On Thu, 26 Nov 2015, Marek Polacek wrote: > > > I had a go at this, but I'm now skeptical about removing c_save_expr. > > save_expr calls fold (), so we need to ensure that we don't pass any > > C_MAYBE_CONST_EXPRs into it, meaning th

Re: [PATCH] libstdc++: Fix libstdc++/67440: pretty-printing of a const set fails

On 26/11/15 15:42 +, Jonathan Wakely wrote: On 25/11/15 19:55 +, Jonathan Wakely wrote: On 25 November 2015 at 17:29, Alan Lawrence wrote: On 16/11/15 21:04, Doug Evans wrote: Hi. Apologies for the delay. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67440 Tested with current trunk.

Re: [PR68432 00/26] Handle size/speed choices for internal functions

On 11/26/2015 04:13 PM, Richard Sandiford wrote: That would mean that the validity of a gimple call would depend on both the target predicates and whether the block containing the statement is optimised for size or speed. So whenever we want to test whether a gimple call is valid, we'd need to

[PATCH 7/7][ARM] Add ACLE intrinsics vqrdmlah_lane and vqrdmlsh_lane

Hello, This patch adds the ACLE intrinsics for the instructions introduced in ARMv8.1. It adds the vqrmdlah_lane and vqrdmlsh_lane forms of the instrinsics to the arm_neon.h header, together with the ARM builtins used to implement them. The intrinsics are available when -march=armv8.1-a is enable

[PATCH 6/7][ARM] Add ACLE intrinsics vqrdmlah and vqrdmlsh

Hello, This patch adds the ACLE intrinsics for the instructions introduced in ARMv8.1. It adds the vqrmdlah and vqrdmlsh forms of the instrinsics to the arm_neon.h header, together with the ARM builtins used to implement them. The intrinsics are available when -march=armv8.1-a is enabled together

Re: [wwwdocs] Update C++ conformance status

On 21/11/15 16:54 +0100, Gerald Pfeifer wrote: On Sat, 21 Nov 2015, Jonathan Wakely wrote: I forgot to respond to this, and never committed the patch, sorry. I've committed the changes to htdocs/projects/cxx0x.html now, but not the htdocs/bugs/index.html change. I wasn't opposed to the bugs/i

[PATCH 5/7][Testsuite] Support ARMv8.1 ARM tests.

Hello, This patch adds ARMv8.1 support to GCC Dejagnu, to allow ARM tests to specify targest and to set up command line options. It builds on the ARMv8.1 target support added for AArch64 tests, partly reworking that support to take into account the different configurations that tests may be run u

[PATCH 4/7][ARM] Add ACLE feature macro for ARMv8.1 instructions.

Hello, This patch adds the feature macro __ARM_FEATURE_QRDMX to indicate the presence of the ARMv8.1 instructions vqrdmlah and vqrdmlsh. It is defined when the instructions are available, as it is when -march=armv8.1-a is enabled with suitable fpu options. Tested the series for arm-none-eabi wit

[PATCH 3/7][ARM] Add patterns for new instructions

Hello, This patch adds patterns for the instructions, vqrdmlah and vqrdmlsh, introduced in the ARMv8.1 architecture. The instructions are made available when -march=armv8.1-a is enabled with suitable fpu settings, such as -mfpu=neon-fp-armv8 -mfloat-abi=hard. Tested the series for arm-none-eabi

[PATCH 2/7][ARM] Multilib support for ARMv8.1.

This patch sets up multilib support for ARMv8.1, treating it as a synonym for ARMv8. Since ARMv8.1 integer, FP or SIMD instructions are only generated for the new, instruction-specific instrinsics, mapping to ARMv8 rather than adding a new multilib variant is sufficient. Tested the series for arm

RE: [PATCH] MIPS/GCC/doc: Reorder `-mcompact-branches='

> -Original Message- > From: Maciej W. Rozycki [mailto:ma...@imgtec.com] > Sent: Thursday, November 26, 2015 9:01 AM > To: gcc-patches@gcc.gnu.org > Cc: Moore, Catherine; Matthew Fortune > Subject: [PATCH] MIPS/GCC/doc: Reorder `-mcompact-branches=' > > Move the `-mcompact-branches=' opt

[PATCH 1/7][ARM] Add support for ARMv8.1.

Hello, ARMv8.1 includes an extension to ARM which adds two Adv.SIMD instructions, vqrdmlah and vqrdmlsh. This patch set adds support for ARMv8.1 and for the new instructions, enabling the architecture with --march=armv8.1-a. The new instructions are enabled when both ARMv8.1 and a suitable fpu o

Re: [PATCH] libstdc++: Fix libstdc++/67440: pretty-printing of a const set fails

On 25/11/15 19:55 +, Jonathan Wakely wrote: On 25 November 2015 at 17:29, Alan Lawrence wrote: On 16/11/15 21:04, Doug Evans wrote: Hi. Apologies for the delay. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67440 Tested with current trunk. 2015-11-16 Doug Evans PR libstdc++/674

Re: [PR68432 00/26] Handle size/speed choices for internal functions

Bernd Schmidt writes: > On 11/25/2015 01:20 PM, Richard Sandiford wrote: >> This series fixes PR 68432, a regression caused by my internal-functions- >> for-optabs series. Some of the libm optabs in i386.md have a true HAVE_* >> condition but conditionally FAIL if we're optimising for size: >> >>

Re: [PATCH, PING*4] PR debug/53927: fix value for DW_AT_static_link

On 11/26/2015 03:50 PM, Eric Botcazou wrote: Here’s the updated patch. Regtested again on x86_64-linux. Thanks, it looks good as far as I'm concerned (modulo the missing "in order" before "not to shift all other offsets" in a comment). Fixed and pushed. Thank you again for reviewing! -- Pier

Re: [PATCH, PING*4] PR debug/53927: fix value for DW_AT_static_link

> Here’s the updated patch. Regtested again on x86_64-linux. Thanks, it looks good as far as I'm concerned (modulo the missing "in order" before "not to shift all other offsets" in a comment). -- Eric Botcazou

Improving the cxx0x_warning.h diagnostic

We have lots of headers that do this: #if __cplusplus < 201103L # include #else and that file has a #error (not #warning as the name would suggest). Unfortunately a #error does not stop compilation, so when users try to compile C++11 source code (which includes standard headers) and they don't

Re: [PATCH] Improve verification of loop->latch in verify_loop_structure

On 26/11/15 13:15, Richard Biener wrote: On Thu, 26 Nov 2015, Alan Lawrence wrote: This caused an ICE compiling value.c from gdb on aarch64-none-linux-gnu; the testcase, after preprocessing on aarch64, ICEs on both aarch64 and x86_64, but is about 1MB - I'm working on reducing that down to some

Re: [PATCH][RTL-ifcvt] PR rtl-optimization/68506: Fix emitting order of insns in IF-THEN-JOIN case

On 11/26/2015 03:35 PM, Kyrill Tkachov wrote: Would it be ok if I did that as a separate follow-up patch? We don't have a testcase where this actually causes trouble and I'd like to keep the fix for this PR as self-contained as possible. Sure. Bernd

Re: [PATCH][RTL-ifcvt] PR rtl-optimization/68506: Fix emitting order of insns in IF-THEN-JOIN case

On 26/11/15 14:23, Bernd Schmidt wrote: On 11/26/2015 02:52 PM, Kyrill Tkachov wrote: On 26/11/15 13:40, Bernd Schmidt wrote: On 11/26/2015 12:12 PM, Kyrill Tkachov wrote: modified_in_b = emit_b != NULL_RTX && modified_in_p (orig_a, emit_b); Can this ever be true? We arrange for emit

[PATCH RFC 2/2] MIPS/GCC: IEEE Std 754 NaN interlinking support

Implement the GCC interface for IEEE Std 754 NaN interlinking, following "MIPS ABI Extension for IEEE Std 754 Non-Compliant Interlinking" and the recommendations set out there as follows: * implement driver and compiler command-line

[PATCH RFC 1/2] MIPS/GCC: Factor out LINK_SPEC

Factor out common linker specs to LINK_SPEC, to be included from individual SUBTARGET_LINK_SPEC definitions, along the lines of SUBTARGET_ASM_SPEC, SUBTARGET_CC1_SPEC, SUBTARGET_CPP_SPEC, etc. This essentially revives the use of the LINK_SPEC definition from mips.h which by now has become over

[PATCH RFC 0/2] GCC: MIPS IEEE Std 754 NaN interlinking support

Hi, This implements the GCC interface for IEEE Std 754 NaN interlinking, following the recommendations set out in the "MIPS ABI Extension for IEEE Std 754 Non-Compliant Interlinking" document available here: . Two patches comprise t

Re: [PR68432 20/22] Record attributes for define_expand

On 11/25/2015 05:08 PM, Richard Sandiford wrote: Also, using a string like that rather than some kind of identifier or a define_icode_attr maybe isn't the best approach? By "some kind of identifier" do you just mean replacing "code,alternative" with a string that doesn't have a comma? Yeah. I

Re: [PATCH][RTL-ifcvt] PR rtl-optimization/68506: Fix emitting order of insns in IF-THEN-JOIN case

On 11/26/2015 02:52 PM, Kyrill Tkachov wrote: On 26/11/15 13:40, Bernd Schmidt wrote: On 11/26/2015 12:12 PM, Kyrill Tkachov wrote: modified_in_b = emit_b != NULL_RTX && modified_in_p (orig_a, emit_b); Can this ever be true? We arrange for emit_b to set a new pseudo, don't we? Are we a

Re: [PATCH, PING*4] PR debug/53927: fix value for DW_AT_static_link

Thank you Jason! On 11/25/2015 09:35 PM, Eric Botcazou wrote: We try to declare variables only at the first use point now I think. Fixed, thanks! + /* Debugging information needs to compute the frame base address of the +nestee frame out of the static chain from the nested frame

Re: [PR68432 00/26] Handle size/speed choices for internal functions

On 11/25/2015 01:20 PM, Richard Sandiford wrote: This series fixes PR 68432, a regression caused by my internal-functions- for-optabs series. Some of the libm optabs in i386.md have a true HAVE_* condition but conditionally FAIL if we're optimising for size: if (SSE_FLOAT_MODE_P (mode) && TA

[PTX] simplify call emission

I've committed this patch to simplify some more call emission machinery. write_func_decl_from_insn was doing more work than necessary. 1) it doesn't need to examine the callee to figure out whether this is an indirect call or not. It's callers have already done this, and can pass in the releva

[PATCH] MIPS/GCC/doc: Reorder `-mcompact-branches='

Move the `-mcompact-branches=' option out of the middle of a block of floating-point options. The option is not related to FP in any way. Place it immediately below other branch instruction selection options. gcc/ * doc/invoke.texi (Option Summary) : Reorder `-mcompact-

Re: [PATCH 1/2][ARM] PR/65956 AAPCS update for alignment attribute

On 6 November 2015 at 16:59, Jakub Jelinek wrote: > > In any case, to manually reproduce, compile > gnatmake -g -gnatws macrosub.adb > with GCC 5.1.1 (before the ARM changes) and then try to run that process > against > GCC 5.2.1 (after the ARM changes) libgnat-5.so, which is what make check > do

[PATCH] Fix PR68555

Committed. Richard. 2015-11-26 Richard Biener PR testsuite/68555 * gcc.dg/vect/bb-slp-10.c: Adjust pattern, use target selector and not XFAIL. Index: gcc/testsuite/gcc.dg/vect/bb-slp-10.c === --- gcc/tes

Re: [PATCH][RTL-ifcvt] PR rtl-optimization/68506: Fix emitting order of insns in IF-THEN-JOIN case

On 26/11/15 13:40, Bernd Schmidt wrote: On 11/26/2015 12:12 PM, Kyrill Tkachov wrote: diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index af7a3b9..3e3dc8d 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -2220,7 +2220,7 @@ noce_try_cmove_arith (struct noce_if_info *if_info) } } -if (em

[PATCH] Fix PR68554

Committed. Richard. 2015-11-26 Richard Biener PR testsuite/68554 * gcc.dg/vect/bb-slp-subgroups-2.c: Require vect_perm. Index: gcc/testsuite/gcc.dg/vect/bb-slp-subgroups-2.c === --- gcc/testsuite/gcc.dg/vect/bb-

Re: [PATCH][RTL-ifcvt] PR rtl-optimization/68506: Fix emitting order of insns in IF-THEN-JOIN case

On 11/26/2015 12:12 PM, Kyrill Tkachov wrote: diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index af7a3b9..3e3dc8d 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -2220,7 +2220,7 @@ noce_try_cmove_arith (struct noce_if_info *if_info) } } -if (emit_a && modified_in_a) +if (emit_a |

[PATCH] Fix genmatch SAVE_TEMPS usage for multi-uses

This fixes the issue that genmatch wraps captures in SAVE_TEMPS only for correctness reasons right now (for TREE_SIDE_EFFECTS captures) but not to avoid duplicating expensive computations. The following fixes that. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk, testing on

Re: [PATCH] Fix up reduction-1{1,2} testcases (PR middle-end/68221)

Hi! On Mon, 23 Nov 2015 12:13:07 +0100 (CET), Richard Biener wrote: > On Fri, 20 Nov 2015, Jakub Jelinek wrote: > > If C/C++ array section reductions have non-zero (positive) bias, it is > > implemented by declaring a smaller private array and subtracting the bias > > from the start of the priva

Re: [PATCH][combine] PR rtl-optimization/68381: Only restrict pure simplification in mult-extend subst case, allow other substitutions

On Thu, Nov 19, 2015 at 10:26:25AM +, Kyrill Tkachov wrote: > Ok for trunk? > > Thanks, > Kyrill > > 2015-11-19 Kyrylo Tkachov > > PR rtl-optimization/68381 > * combine.c (subst): Do not return clobber of zero in widening mult > case. Just return x unchanged if it is a no-op

Re: [PATCH][combine] PR rtl-optimization/68381: Only restrict pure simplification in mult-extend subst case, allow other substitutions

On Thu, Nov 26, 2015 at 09:50:50AM +, Kyrill Tkachov wrote: > As I mentioned on IRC, this patch improves codegen on aarch64 as well. > I've re-checked SPEC2006 and it seems to improve codegen around > multiply-extend-accumulate > instructions. For example the sequence: > movw4, 64 >

Re: [PATCH 01/15] Selftest framework (unittests v4)

On 11/25/2015 11:47 PM, David Malcolm wrote: FWIW, the reason I special-cased the linked list was to avoid any dynamic memory allocation: the ctors run before main, so I wanted to keep them as simple as possible. Is there any particular reason for this? C++ doesn't disallow memory allocation i

Re: [PATCH] Fix pattern causing C_MAYBE_CONST_EXPRs leak into gimplifier (PR c/68513)

On Thu, 26 Nov 2015, Marek Polacek wrote: > I had a go at this, but I'm now skeptical about removing c_save_expr. > save_expr calls fold (), so we need to ensure that we don't pass any > C_MAYBE_CONST_EXPRs into it, meaning that we'd need to call c_fully_fold > before > save_expr anyway... > > S

Re: [PATCHES, PING*5] Enhance standard DWARF for Ada

On 11/25/2015 07:35 PM, Jason Merrill wrote: Actually, even though my patches introduce DWARF procedures for only one case (size functions from stor-layout.c), they don’t necessarily come from code generation (GENERIC): they are just a way to factorize common DWARF operations. Thinking more abou

Re: [PATCH, PR target/68416, i386, MPX] Add bounds registers to ALL_REGS set

2015-11-26 15:18 GMT+03:00 Richard Biener : > On Thu, 26 Nov 2015, Uros Bizjak wrote: > >> On Thu, Nov 26, 2015 at 12:46 PM, Ilya Enkovich >> wrote: >> > 2015-11-26 13:15 GMT+03:00 Uros Bizjak : >> >> >>> 2015-11-26 Vladimir Makarov >> >>> >> >>> PR target/68416 >> >>> * config/i386/i386.h (en

Re: [PATCH, PR target/68416, i386, MPX] Add bounds registers to ALL_REGS set

On Thu, 26 Nov 2015, Uros Bizjak wrote: > On Thu, Nov 26, 2015 at 12:46 PM, Ilya Enkovich > wrote: > > 2015-11-26 13:15 GMT+03:00 Uros Bizjak : > > >>> 2015-11-26 Vladimir Makarov > >>> > >>> PR target/68416 > >>> * config/i386/i386.h (enum reg_class): Add > >>> bounds registers to ALL_REGS.

[patch] Copy-edit the Option Summary in invoke.texi

At https://gcc.gnu.org/onlinedocs/gcc/Option-Summary.html we document -Waggressive-loop-optimizations but you can't find that option at https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html because we document -Wno-aggressive-loop-optimizations instead. Similarly, you can't find -Wpedantic-ms-f

Re: [PATCH] Improve verification of loop->latch in verify_loop_structure

On Thu, 26 Nov 2015, Alan Lawrence wrote: > This caused an ICE compiling value.c from gdb on > aarch64-none-linux-gnu; the testcase, after preprocessing on aarch64, > ICEs on both aarch64 and x86_64, but is about 1MB - I'm working on > reducing that down to something small enough to post... > > $

Re: [PATCH, PR target/68416, i386, MPX] Add bounds registers to ALL_REGS set

On Thu, Nov 26, 2015 at 12:46 PM, Ilya Enkovich wrote: > 2015-11-26 13:15 GMT+03:00 Uros Bizjak : >>> 2015-11-26 Vladimir Makarov >>> >>> PR target/68416 >>> * config/i386/i386.h (enum reg_class): Add >>> bounds registers to ALL_REGS. >>> >>> gcc/testsuite/ >>> >>> 2015-11-26 Ilya Enkovich

[PATCH] Fix PR66799

This should fix the gcc.dg/vect/pr20122.c testcase by not making GCC see all accesses are aligned. Tested on x86_64, applied. Richard. 2015-11-26 Richard Biener PR testsuite/66799 * gcc.dg/vect/pr20122.c (main): Do not align Kernel, do not vectorize init loop and adj

Fix PR c++/68527

This is a tree checking failure on invalid C++ code with -fdump-ada-spec. I guess that we could simply bail out if there are errors in the code, but we already have guards for error_mark_node so the patch adds a couple more. Tested on x86_64-suse-linux, applied on the mainline as obvious. 2015-

[PATCH] Add PR rtl-optimization/68249 and PR rtl-optimization/68321 testcases

Hi! These PRs are dups of PR68194 that has been fixed recently. I've added the testcases for them to the trunk and 5 branch. 2015-11-26 Jakub Jelinek PR rtl-optimization/68249 PR rtl-optimization/68321 * gcc.c-torture/execute/pr68249.c: New test. * gcc.c-tortur

Re: [PATCH] Improve verification of loop->latch in verify_loop_structure

Here's a reduced testcase (reduced to the point of generating lots of warnings, I'm compiling with -O2 -w, on x86_64): struct __jmp_buf_tag { }; typedef struct __jmp_buf_tag sigjmp_buf[1]; extern struct cmd_list_element *showlist; struct internalvar { struct internalvar *next; }; static stru

[PATCH] -Wshift-overflow: Warn for shifting sign bit out of a negative number

maybe_warn_shift_overflow is checking for patterns such as (1 << 31) and not warning for them. However, if the shifted value is negative, a shift by a non-zero amount will always shift *out* of the sign bit rather than into it. Thus it should be warned about, even if the value only requires one bi

[PATCH] Fix PR67203

This fixes the g++.dg/tree-ssa/pr61034.C to make the expected result dependent on PUSH_ARGS_REVERSED (via an explicit list of targets). With swapping the final cd_dce and dse passes I get all targets to produce zero 'free' calls in .optimized but that doesn't sound appropriate at this stage. And

Re: [PATCH, PR target/68416, i386, MPX] Add bounds registers to ALL_REGS set

2015-11-26 13:15 GMT+03:00 Uros Bizjak : > Hello! > >> gcc/ >> >> 2015-11-26 Vladimir Makarov >> >> PR target/68416 >> * config/i386/i386.h (enum reg_class): Add >> bounds registers to ALL_REGS. >> >> gcc/testsuite/ >> >> 2015-11-26 Ilya Enkovich >> >> PR target/68416 >> * gcc.target/i386/mpx

Re: [PING] Re: [PATCH] c++/67913, 67917 - fix new expression with wrong number of elements

> Cookies on ARM are 8-bytes [1], but sizeof ((size_t) n) is only 4-bytes, > so this check will fail (We'll ask for 500 bytes, the test here will only > be looking for 496). > > Would it undermine the test for other architectures if I were to swap out > the != for a >= ? I think that is in line w

Re: [PATCH] Improve verification of loop->latch in verify_loop_structure

This caused an ICE compiling value.c from gdb on aarch64-none-linux-gnu; the testcase, after preprocessing on aarch64, ICEs on both aarch64 and x86_64, but is about 1MB - I'm working on reducing that down to something small enough to post... $ ./gcc/xgcc -B ./gcc -O2 -g value.c ../../binutils-gdb/

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