Similar to the previous patch, except this time working on
avail_expr_stack. It's a bit more complex because tree-ssa-threadedge.c
calls back into lookup_avail_expr, so we need to get avail_expr_stack
passed around in there too. But we were going to need to do that anyway.
I believe this i
On 09/15/2015 11:20 AM, Steve Ellcey wrote:
On Tue, 2015-09-15 at 19:10 +0200, Jakub Jelinek wrote:
On Tue, Sep 15, 2015 at 10:02:15AM -0700, Steve Ellcey wrote:
I am not sure I like this change. It broke the GLIBC build for me on
MIPS. Basically GLIBC has a header file with initialized stati
I've committed this patch to rework and simplify the ptx backend's
implementation of the reduction lowering hooks.
The current implementation had a number of bugs (multiple
gimplify_push_contexts, for instance), and overcomplicated in a number of ways.
Most of the changes are straightforwards
Thanks Jonathan! I will work on what you suggest.
Regarding bug 55815: thank you for pointing that out. I'll update the
bug this weekend.
Geoff
OK.
Jason
On Fri, 18 Sep 2015, Michael Collison wrote:
Can you elaborate on merging the patterns using 'ext' as mentioned in your
post? I don't see any documentation or examples.
https://gcc.gnu.org/onlinedocs/gccint/The-Language.html
"for" lets you iterate on several variables at the same time.
For in
Marc,
Can you elaborate on merging the patterns using 'ext' as mentioned in
your post? I don't see any documentation or examples.
On 09/18/2015 12:00 AM, Marc Glisse wrote:
On Thu, 17 Sep 2015, Michael Collison wrote:
Here is the the patch modified with test cases for MIN_EXPR and
MAX_EXPR
2015-09-18 18:31 GMT+02:00 Jason Merrill :
> On 09/18/2015 02:19 AM, Kai Tietz wrote:
>>
>> Hi Jason,
>>
>> Sounds like an interesting idea. Do have already a specific approach in
>> mind?
>>
>> My idea might be just hard to model, as we aren't sure we walked
>> before the complete chain. Due cp_
Next step in eliminating problematical file scoped variables from DOM on
the way to fixing 47679. In this patch its const_and_copies.
Bootstrapped and regression tested on x86_64-linux-gnu. Applied to the
trunk.
* tree-ssa-dom.c (const_and_copies): No longer file scoped. Move
> Index: libgcc/libgcc-std.ver.in
> ===
> --- libgcc/libgcc-std.ver.in (revision 226409)
> +++ libgcc/libgcc-std.ver.in (working copy)
> @@ -1918,6 +1918,7 @@ GCC_4.6.0 {
>__morestack_current_segment
>__morestack_initial_sp
>
So the next step in fixing 47679 is to continue the process of allowing
tree-ssa-threadedge to modify the expression hash tables in well defined
ways. The key is we want to be able to call
record_temporary_equivalences in the threader.
record_temporary_equivalences will modify the const_and
The attached change fixes build error on trunk and makes the argument types for
various constant
checks more consistent.
Tested on hppa2.0w-hp-hpux11.11 and hppa-unknown-linux-gnu. Committed to trunk.
Dave
--
John David Anglin dave.ang...@bell.net
2014-09-18 John David Anglin
On 18 September 2015 at 20:46, Ville Voutilainen
wrote:
> Argh, no. An attribute immediately following a nesting namespace would need
> to be parsed before the nested namespace definition handling is done,
> otherwise
> the nested namespace definition handling is never entered because the next
>
On 09/18/15 05:13, Bernd Schmidt wrote:
Is that so difficult though? See if nvptx ignores (let's say) intelmic arguments
in favour of the default and accepts nvptx ones.
I'm sorry, I think it is unreasonable to require support in this patch for
something that's not yet implemented in the rest
In https://sourceware.org/ml/libc-alpha/2014-12/msg00300.html, we give a
"called from here" note without actually having a location, which looks
strange. I haven't been able to generate such a testcase. In this patch, we
assert this cannot happen when checking and simply skip the extra note in
rele
And now with the patch.
On 18 September 2015 at 20:40, Manuel López-Ibáñez
wrote:
> In https://sourceware.org/ml/libc-alpha/2014-12/msg00300.html, we give a
> "called from here" note without actually having a location, which looks
> strange. I haven't been able to generate such a testcase. In thi
On Fri, Sep 18, 2015 at 2:26 PM, Bill Schmidt
wrote:
> On Fri, 2015-09-18 at 16:39 +0100, Alan Lawrence wrote:
>> This is a respin of https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01024.html
>> after discovering that patch was broken on power64le - thanks to Bill Schmidt
>> for pointing out that g
On Mon, 2015-09-14 at 13:35 -0600, Jeff Law wrote:
> On 09/10/2015 02:28 PM, David Malcolm wrote:
> > The function "diagnostic_show_locus" gains new functionality in the
> > next patch, so this preliminary patch breaks it out into a new source
> > file, diagnostic-show-locus.c, along with a couple
On Fri, 2015-09-18 at 16:39 +0100, Alan Lawrence wrote:
> This is a respin of https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01024.html
> after discovering that patch was broken on power64le - thanks to Bill Schmidt
> for pointing out that gcc112 is the opposite endianness to gcc110...
>
> This tim
On 18/09/15 18:45, Martin Sebor wrote:
but it makes me wonder how common this pattern is in portable
code and whether adding workarounds for it is the right solution
(or if it might prompt people to disable the warning, which would
be a shame).
Perhaps if we are going to warn, we could look for
On 18 September 2015 at 20:38, Ville Voutilainen
wrote:
> On 18 September 2015 at 20:30, Ville Voutilainen
> wrote:
>> On 18 September 2015 at 20:26, Jason Merrill wrote:
> I suppose so, but it seems pretty trivial. In any case, looks like your
> patch would accept the odd
> namespa
On 18 September 2015 at 20:30, Ville Voutilainen
wrote:
> On 18 September 2015 at 20:26, Jason Merrill wrote:
I suppose so, but it seems pretty trivial. In any case, looks like your
patch would accept the odd
namespace A __attribute ((visibility ("default"))) ::B { }
>>> Yes, or n
On 18 September 2015 at 20:26, Jason Merrill wrote:
>>> I suppose so, but it seems pretty trivial. In any case, looks like your
>>> patch would accept the odd
>>> namespace A __attribute ((visibility ("default"))) ::B { }
>> Yes, or namespace A[[nonsense]]::B {}. Those cases are easy to fix,
>> b
Attached is the final version of the patch that allows AIX to use a
read-only version of DWARF2 frame tables for exception handling
instead of placing the tables in the data section. This allows the
tables to be shared by multiple processes on AIX and reduces memory
requirements.
The common bits
On 09/18/2015 12:58 PM, Ville Voutilainen wrote:
On 18 September 2015 at 19:34, Jason Merrill wrote:
This patch doesn't handle attributes yet, it looks to
me as if gcc doesn't support namespace attributes in the location that
the standard grammar puts them into.
Mind fixing that, too?
Can we
Hi!
This patch implements DOACROSS expansion (both tweaks the omp for
expansion to set up everything that is needed and call new APIs,
and expands ordered depend regions too). In addition to that
it fixes some bugs in lower_omp_ordered_clauses, in particular
the indices other than the first one (
On 18 September 2015 at 19:34, Jason Merrill wrote:
This patch doesn't handle attributes yet, it looks to
me as if gcc doesn't support namespace attributes in the location that
the standard grammar puts them into.
>>> Mind fixing that, too?
>> Can we please do that separately?
> I s
On 09/18/2015 06:21 AM, Ilya Enkovich wrote:
>>> +machine_mode
>>> +default_get_mask_mode (unsigned nunits, unsigned vector_size)
>>> +{
>>> + unsigned elem_size = vector_size / nunits;
>>> + machine_mode elem_mode
>>> += smallest_mode_for_size (elem_size * BITS_PER_UNIT, MODE_INT);
>>
>> Why
Done in the below. This version actually bootstraps, because I've added
-Wno-duplicated-cond for insn-dfatab.o and insn-latencytab.o (don't know
how to fix these) + I've tweaked a condition in genemit.c. The problem
here is that we have
if (INTVAL (x) == 0)
printf ("const0_rtx")
Hello!
When expanding __bultin_eh_return, its address pointers can degrade to
a modeless constant. Use copy_addr_to_reg to always give temporary
register a Pmode.
2015-09-18 Uros Bizjak
PR middle-end/67619
* except.c (expand_builtin_eh_return): Use copy_addr_to_reg to copy
the add
On 09/17/2015 06:23 PM, Ville Voutilainen wrote:
This patch doesn't handle attributes yet, it looks to
me as if gcc doesn't support namespace attributes in the location that
the standard grammar puts them into.
Mind fixing that, too?
+ "-std=c++17 or -std=gnu++17");
Please u
On 09/18/2015 12:30 PM, Ville Voutilainen wrote:
On 18 September 2015 at 19:27, Jason Merrill wrote:
On 09/17/2015 06:23 PM, Ville Voutilainen wrote:
This patch doesn't handle attributes yet, it looks to
me as if gcc doesn't support namespace attributes in the location that
the standard gramm
On 18 September 2015 at 19:27, Jason Merrill wrote:
> On 09/17/2015 06:23 PM, Ville Voutilainen wrote:
>>
>> This patch doesn't handle attributes yet, it looks to
>> me as if gcc doesn't support namespace attributes in the location that
>> the standard grammar puts them into.
> Mind fixing that, t
On 09/18/2015 02:19 AM, Kai Tietz wrote:
Hi Jason,
Sounds like an interesting idea. Do have already a specific approach in mind?
My idea might be just hard to model, as we aren't sure we walked
before the complete chain. Due cp_fold is caching, we won't try to
fold an expression a second time
Hi Andrew,
>>
>> Tested the series for aarch64-none-linux-gnu with native bootstrap and
>> make check. Also tested for aarch64-none-elf with cross-compiled
>> check-gcc on an ARMv8.1 emulator with +lse enabled by default.
>
>
> Are you going to add some builtins for MIN/MAX support too?
The AC
Hello,
On 18 Sep 10:31, Richard Biener wrote:
> On Thu, 17 Sep 2015, Ilya Enkovich wrote:
>
> > 2015-09-16 15:30 GMT+03:00 Richard Biener :
> > > On Mon, 14 Sep 2015, Kirill Yukhin wrote:
> > >
> > >> Hello,
> > >> I'd like to initiate discussion on vectorization of loops which
> > >> boundaries a
Current conditional compare (CCMP) support in GCC aim to optimize
short circuit for cascade comparision, given a simple conditional
compare candidate:
if (a == 17 || a == 32)
it's represented like the following in IR:
t0 = a == 17
t1 = a == 32
t2 = t0 || t1
Normally, CCMP contains two
On 18/09/15 11:17 -0400, Jennifer Yao wrote:
A number of functions in libstdc++ are guarded by the _GLIBCXX_USE_C99
preprocessor macro, which is only defined on systems that pass all of
the checks for a large set of C99 functions. Consequently, on systems
which lack any of the required C99 facili
On 02/09/15 23:12, Alexandre Oliva wrote:
On Sep 2, 2015, Alan Lawrence wrote:
One more failure to report, I'm afraid. On AArch64 Bigendian,
aapcs64/func-ret-4.c ICEs in simplify_subreg (line refs here are from
r227348):
Thanks. The failure mode was different in the current, revamped git
b
On 18/09/15 09:35, Richard Biener wrote:
Btw, we ditched the original reduce-to-vector variant due to its
endianess issues (it only had _one_ element of the vector contain
the reduction result). Re-introducing reduce-to-vector but with
the reduction result in all elements wouldn't have any issu
This is a respin of https://gcc.gnu.org/ml/gcc-patches/2014-12/msg01024.html
after discovering that patch was broken on power64le - thanks to Bill Schmidt
for pointing out that gcc112 is the opposite endianness to gcc110...
This time I decided to avoid any funny business with making RTL match othe
The caller of try_shrink_wrapping wants to be returned a single edge to
put the prologue on. To make that work even if there are multiple edges
(all pointing to the PRO block) that need the prologue, add a new block
that becomes the destination of all such edges, and then jumps to PRO.
In the gen
On 09/18/2015 07:32 AM, Trevor Saunders wrote:
On Wed, Sep 16, 2015 at 03:11:14PM -0400, David Malcolm wrote:
On Wed, 2015-09-16 at 09:16 -0400, Trevor Saunders wrote:
Hi,
I gave changing from gimple to gimple * a shot last week. It turned out
to be not too hard. As you might expect the patc
I was tackling another bit of infrastructure (eliminating various file
scoped statics) needed in DOM to address 47679 , I figured the time to
split out the phi-only-cprop code to its own file had long since passed.
That's precisely what this patch does. It moves all the phi-only-cprop
bits
On 09/17/2015 04:38 PM, Robert Suchanek wrote:
We came across a situation for MIPS64 where moves for sign-extension were
not converted into a nop because of IRA spilled some of the allocnos and
assigned different hard register for the output operand in the move.
LRA is not fixing this up as most
A number of functions in libstdc++ are guarded by the _GLIBCXX_USE_C99
preprocessor macro, which is only defined on systems that pass all of
the checks for a large set of C99 functions. Consequently, on systems
which lack any of the required C99 facilities (e.g. Cygwin, which
lacks some C99 complex
On 18/09/15 15:38, Christian Bruel wrote:
>
>
> On 09/18/2015 04:16 PM, Richard Earnshaw wrote:
>> On 17/09/15 09:46, Christian Bruel wrote:
>>> As obvious, bad operand number.
>>>
>>> OK for trunk ?
>>>
>>> Christian
>>>
>>>
>>> p1.patch
>>>
>>>
>>> 2015-09-18 Christian Bruel
>>>
>>> * co
Hi,
On Tue, Sep 08, 2015 at 11:41:50AM +0300, Kirill Yukhin wrote:
> Hi,
> On 07 Sep 19:07, Alexander Fomin wrote:
> > + tmp = TARGET_AVX512VL ? "p" : "p";
> Suppose masking is applied and 1st alternative chosen...
> > + ops = "%s\t{%%2, %%0|%%0, %%2}";
> We'll reach here having p %xm
On Wed, Sep 02, 2015 at 01:36:28PM +0100, Wilco Dijkstra wrote:
> Cleanup the remainder of aarch64_internal_mov_immediate. Compute the number
> of 16-bit aligned 16-bit masks that are all-zeroes or all-ones, and emit the
> smallest sequence using a single loop skipping either all-ones or all-zeroes
On Wed, Sep 02, 2015 at 01:36:03PM +0100, Wilco Dijkstra wrote:
> The code that emits a movw with an add/sub is hardly ever used, and all cases
> in actual code are already covered by mov+movk, so it is redundant (an
> example of such an immediate is 0x00000abcul).
>
> Passes GCC regressio
On Wed, Sep 02, 2015 at 01:35:33PM +0100, Wilco Dijkstra wrote:
> Remove aarch64_bitmasks, aarch64_build_bitmask_table and aarch64_bitmasks_cmp
> as they are no longer used by the immediate generation code.
>
> No change in generated code, passes GCC regression tests/bootstrap.
OK.
Thanks,
James
On Wed, Sep 02, 2015 at 01:35:19PM +0100, Wilco Dijkstra wrote:
> aarch64_internal_mov_immediate uses loops iterating over all legal bitmask
> immediates to find 2-instruction immediate combinations. One loop is
> quadratic and despite being extremely expensive very rarely finds a matching
> immedi
On 17/09/15 09:46, Christian Bruel wrote:
> As obvious, bad operand number.
>
> OK for trunk ?
>
> Christian
>
>
> p1.patch
>
>
> 2015-09-18 Christian Bruel
>
> * config/arm/arm.md (*call_value_symbol): Fix operand for interworking.
>
> 2015-09-18 Christian Bruel
>
> * gc
On Wed, Sep 02, 2015 at 01:34:48PM +0100, Wilco Dijkstra wrote:
> This patch reimplements aarch64_bitmask_imm using bitwise arithmetic rather
> than a slow binary search. The algorithm searches for a sequence of set bits.
> If there are no more set bits and not all bits are set, it is a valid mask.
On 18/09/2015 14:26, "Alan Lawrence" wrote:
>On 18/09/15 13:17, Richard Biener wrote:
>>
>> Ok, I see.
>>
>> That this case is already vectorized is because it implements MAX_EXPR,
>> modifying it slightly to
>>
>> int foo (int *a)
>> {
>>int val = 0;
>>for (int i = 0; i < 1024; ++i)
>>
2015-09-18 15:29 GMT+03:00 Richard Biener :
> On Tue, Sep 15, 2015 at 3:52 PM, Ilya Enkovich wrote:
>> On 08 Sep 15:37, Ilya Enkovich wrote:
>>> 2015-09-04 23:42 GMT+03:00 Jeff Law :
>>> >
>>> > So do we have enough confidence in this representation that we want to go
>>> > ahead and commit to it?
On Fri, 2015-09-18 at 15:15 +0200, Richard Biener wrote:
> On Fri, 18 Sep 2015, Bill Schmidt wrote:
>
> > On Fri, 2015-09-18 at 10:38 +0200, Richard Biener wrote:
> > > On Thu, 17 Sep 2015, Segher Boessenkool wrote:
> > >
> > > > On Thu, Sep 17, 2015 at 09:18:42AM -0500, Bill Schmidt wrote:
> > >
On 09/18/2015 01:39 AM, Thomas Schwinge wrote:
> On Tue, 1 Sep 2015 18:29:55 +0200, Tom de Vries
> wrote:
>> On 27/08/15 03:37, Cesar Philippidis wrote:
>>> - ctx->ganglocal_size_host = align_and_expand (&gl_host, host_size, align);
>>
>> I suspect this caused a bootstrap failure (align_and_exp
On Fri, Sep 18, 2015 at 3:32 PM, Trevor Saunders wrote:
> On Wed, Sep 16, 2015 at 03:11:14PM -0400, David Malcolm wrote:
>> On Wed, 2015-09-16 at 09:16 -0400, Trevor Saunders wrote:
>> > Hi,
>> >
>> > I gave changing from gimple to gimple * a shot last week. It turned out
>> > to be not too hard.
2)
Reply-To:
In-Reply-To: <20150918100606.gf27...@redhat.com>
On Fri, Sep 18, 2015 at 12:06:06PM +0200, Marek Polacek wrote:
> > Since we don't know bar's side-effects we must assume they change
> > the value of a and so we must avoid diagnosing the third if.
>
> Ok, I'm convinced now. We have
2015-09-18 15:22 GMT+03:00 Richard Biener :
> On Thu, Sep 3, 2015 at 3:57 PM, Ilya Enkovich wrote:
>> 2015-09-03 15:11 GMT+03:00 Richard Biener :
>>> On Thu, Sep 3, 2015 at 2:03 PM, Ilya Enkovich
>>> wrote:
Adding CCs.
2015-09-03 15:03 GMT+03:00 Ilya Enkovich :
> 2015-09-01 17
Hi Cesar!
On Fri, 17 Jul 2015 11:13:59 -0700, Cesar Philippidis
wrote:
> This patch updates the libgomp OpenACC reduction test cases to check
> worker, vector and combined gang worker vector reductions. I tried to
> use some macros to simplify the c test cases a bit. I probably could
> have made
On Wed, Sep 16, 2015 at 03:11:14PM -0400, David Malcolm wrote:
> On Wed, 2015-09-16 at 09:16 -0400, Trevor Saunders wrote:
> > Hi,
> >
> > I gave changing from gimple to gimple * a shot last week. It turned out
> > to be not too hard. As you might expect the patch is huge so its
> > attached com
On 18/09/15 13:17, Richard Biener wrote:
Ok, I see.
That this case is already vectorized is because it implements MAX_EXPR,
modifying it slightly to
int foo (int *a)
{
int val = 0;
for (int i = 0; i < 1024; ++i)
if (a[i] > val)
val = a[i] + 1;
return val;
}
makes it no lo
2015-09-17 20:35 GMT+03:00 Richard Henderson :
> On 09/15/2015 06:52 AM, Ilya Enkovich wrote:
>> I made a step forward forcing vector comparisons have a mask (vec)
>> result and disabling bool patterns in case vector comparison is supported by
>> target. Several issues were met.
>>
>> - c/c++ f
On Fri, 18 Sep 2015, Bill Schmidt wrote:
> On Fri, 2015-09-18 at 10:38 +0200, Richard Biener wrote:
> > On Thu, 17 Sep 2015, Segher Boessenkool wrote:
> >
> > > On Thu, Sep 17, 2015 at 09:18:42AM -0500, Bill Schmidt wrote:
> > > > On Thu, 2015-09-17 at 09:39 +0200, Richard Biener wrote:
> > > > >
On Fri, 2015-09-18 at 10:38 +0200, Richard Biener wrote:
> On Thu, 17 Sep 2015, Segher Boessenkool wrote:
>
> > On Thu, Sep 17, 2015 at 09:18:42AM -0500, Bill Schmidt wrote:
> > > On Thu, 2015-09-17 at 09:39 +0200, Richard Biener wrote:
> > > > So just to clarify - you need to reduce the vector wi
This patch adjust config.gcc so that it installs for NetBSD
5.x and 6.x, which is necessary for the C++ library because the host
has:
#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS)
#include
#endif
#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS)
#include
#endif
This m
On Thu, Sep 17, 2015 at 3:13 PM, Lynn A. Boger
wrote:
> Here is my updated patch, with the changes suggested by
> Ian for gcc/gospec.c and David for gcc/configure.ac.
>
> Bootstrap built and tested on ppc64le, ppc64 multilib.
>
> 2015-09-17Lynn Boger
> gcc/
> PR target/66870
>
Hi!
On Thu, 30 Jul 2015 15:44:41 -0400, Nathan Sidwell wrote:
> I've committed this to gomp4. It adds spinlock builtins [...]
These two test cases actually got committed to gomp-4_0-branch in the
later/unrelated r226508. In gomp-4_0-branch r227904, I now fixed these
as follows:
commit 5ab915
On Tue, Sep 15, 2015 at 3:52 PM, Ilya Enkovich wrote:
> On 08 Sep 15:37, Ilya Enkovich wrote:
>> 2015-09-04 23:42 GMT+03:00 Jeff Law :
>> >
>> > So do we have enough confidence in this representation that we want to go
>> > ahead and commit to it?
>>
>> I think new representation fits nice mostly.
On Thu, Sep 3, 2015 at 3:57 PM, Ilya Enkovich wrote:
> 2015-09-03 15:11 GMT+03:00 Richard Biener :
>> On Thu, Sep 3, 2015 at 2:03 PM, Ilya Enkovich wrote:
>>> Adding CCs.
>>>
>>> 2015-09-03 15:03 GMT+03:00 Ilya Enkovich :
2015-09-01 17:25 GMT+03:00 Richard Biener :
Totally disablin
On Tue, Sep 15, 2015 at 5:32 PM, Alan Hayward wrote:
>
>
> On 15/09/2015 13:09, "Richard Biener" wrote:
>
>>
>>Now comments on the patch itself.
>>
>>+ if (code == COND_EXPR)
>>+ *v_reduc_type = COND_REDUCTION;
>>
>>so why not simply use COND_EXPR instead of the new v_reduc_type?
>
> v
The default reduction expander was confusingly not placed with the other openacc
default hooks, it also indirected to a bunch of worker functions all doing
essentially the same thing, which obscured what was happening.
Reimplemented thusly.
nathan
2015-09-18 Nathan Sidwell
* omp-low.c (d
On Tue, Aug 25, 2015 at 11:02 PM, Jeff Law wrote:
> On 08/21/2015 10:30 AM, Ilya Enkovich wrote:
>>>
>>> If we're checking an optab to drive an optimization, then we're probably
>>> on
>>> the wrong track.
>>
>>
>> That's totally similar to VEC_COND_EXPR which we generate comparison into.
>
> It i
On Fri, 18 Sep 2015, James Greenhalgh wrote:
> On Fri, Sep 18, 2015 at 11:24:50AM +0100, Pawel Kupidura wrote:
> > This patch uses max reductions to emulate aligned masked loads on AArch64.
> > It reduces the mask to a scalar that is nonzero if any mask element is true,
> > then uses that scalar t
On 11/09/15 13:25 +0100, Jonathan Wakely wrote:
diff --git a/libstdc++-v3/include/precompiled/extc++.h
b/libstdc++-v3/include/precompiled/extc++.h
index de3775b..8883e47 100644
--- a/libstdc++-v3/include/precompiled/extc++.h
+++ b/libstdc++-v3/include/precompiled/extc++.h
@@ -28,15 +28,25 @@
#i
Jonathan Wakely wrote:
> On 18/09/15 13:00 +0200, Ulrich Weigand wrote:
> >/home/uweigand/dailybuild/spu-tc-2015-09-17/gcc-head/src/libstdc++-v3/src/c++11/debug.cc:
> > In function 'void {anonymous}::print_word({anonymous}::PrintContext&, const
> >char*, std::ptrdiff_t)':
> >/home/uweigand/dailybu
> Are you trying to say that you have the option as to what kind of
> branch to use? ie, "ordinary", presumably without a delay slot or one
> with a delay slot?
> Is the "ordinary" actually just a nullified delay slot or some form of
> likely/not likely static hint?
Specifically for MIPSR6: t
On 18/09/15 13:00 +0200, Ulrich Weigand wrote:
Francois Dumont wrote:
* include/debug/formatter.h
(_Error_formatter::_Parameter::_M_print_field): Delete.
(_Error_formatter::_Parameter::_M_print_description): Likewise.
(_Error_formatter::_M_format_word): Likewise.
(_Error_for
Francois Dumont wrote:
> * include/debug/formatter.h
> (_Error_formatter::_Parameter::_M_print_field): Delete.
> (_Error_formatter::_Parameter::_M_print_description): Likewise.
> (_Error_formatter::_M_format_word): Likewise.
> (_Error_formatter::_M_print_word): Likewise.
>
On Fri, Sep 18, 2015 at 11:24:50AM +0100, Pawel Kupidura wrote:
> This patch uses max reductions to emulate aligned masked loads on AArch64.
> It reduces the mask to a scalar that is nonzero if any mask element is true,
> then uses that scalar to select between the real address and a scratchpad
> a
This patch uses max reductions to emulate aligned masked loads on AArch64.
It reduces the mask to a scalar that is nonzero if any mask element is true,
then uses that scalar to select between the real address and a scratchpad
address.
The idea is that if the vector load is aligned, it cannot cros
On Thu, Sep 17, 2015 at 10:37:40AM -0600, Martin Sebor wrote:
> >>The patch currently issues a false positive for the test case
> >>below. I suspect the chain might need to be cleared after each
> >>condition that involves a side-effect.
> >>
> >> int foo (int a)
> >> {
> >> if (a) return 1
On Fri, Sep 18, 2015 at 9:38 AM, Marc Glisse wrote:
> Just a couple extra points. We can end up with a mix of < and >, which might
> prevent from matching:
>
> _3 = b_1(D) > a_2(D);
> _5 = a_2(D) < c_4(D);
> _8 = _3 & _5;
>
> Just like with &, we could also transform:
> x < y | x < z --->
On 09/17/2015 04:40 PM, Nathan Sidwell wrote:
Added call to gomp_fatal, indicating libgomp is out of date. Also added
a default to the switch following with the same effect. The trouble
with implementing handling of device_type here now, is difficulty in
testing its correctness. If it were bu
Hi Kyrill,
> Bootstrapped and tested on aarch64 and x86_64.
> Rainer, could you please try this patch in combination with the one I sent
> earlier at:
> https://gcc.gnu.org/ml/gcc-patches/2015-09/msg00815.html
will do, however, Solaris/SPARC bootstrap is broken right now (PR
bootstrap/67622) and
Hi!
On Thu, 10 Sep 2015 13:48:56 -0400, Nathan Sidwell wrote:
> I've committed this to gomp4 branch. It removes more now-obsolete bits of
> gang
> local handling.
> --- libgomp/target.c (revision 227633)
> +++ libgomp/target.c (working copy)
> @@ -373,12 +373,7 @@ gomp_map_vars (struct gomp
On 15/09/15 11:47, Christian Bruel wrote:
On 09/14/2015 04:30 PM, Christian Bruel wrote:
Finally, the final part of the patch set does the attribute target
parsing and checking, redefines the preprocessor macros and implements
the inlining rules.
testcases and documentation included.
new ve
On Thu, Sep 17, 2015 at 05:47:43PM +0100, Matthew Wahab wrote:
> Hello,
>
> ARMv8.1 adds atomic swap and atomic load-operate instructions with
> optional memory ordering specifiers. This patch uses the ARMv8.1 atomic
> load-operate instructions to implement the atomic_fetch_
> patterns. This patch
Bootstrapped and tested on x86_64-unknown-linux-gnu, gdb testsuite without
regressions, applied.
Richard.
2015-09-18 Richard Biener
* dwarf2out.c (add_location_or_const_value_attribute): Do nothing
in early-dwarf.
Index: gcc/dwarf2out.c
==
Hi Christian,
(going through the patches...)
On 14/09/15 12:39, Christian Bruel wrote:
This patch splits the neon_builtins initialization into 2 internals
functions. One for NEON and one for CRYPTO, each one guarded by its own
predicate. arm_init_neon_builtins is now global to be called from
arm
Hi!
On Tue, 1 Sep 2015 18:29:55 +0200, Tom de Vries wrote:
> On 27/08/15 03:37, Cesar Philippidis wrote:
> > - ctx->ganglocal_size_host = align_and_expand (&gl_host, host_size, align);
>
> I suspect this caused a bootstrap failure (align_and_expand unused).
> Worked-around as attached.
> ---
On Thu, Sep 17, 2015 at 05:42:35PM +0100, Matthew Wahab wrote:
> Hello,
>
> ARMv8.1 adds atomic swap and atomic load-operate instructions with
> optional memory ordering specifiers. This patch adds the ARMv8.1 atomic
> load-operate instructions.
>
> Tested the series for aarch64-none-linux-gnu wi
On Thu, 17 Sep 2015, Segher Boessenkool wrote:
> On Thu, Sep 17, 2015 at 09:18:42AM -0500, Bill Schmidt wrote:
> > On Thu, 2015-09-17 at 09:39 +0200, Richard Biener wrote:
> > > So just to clarify - you need to reduce the vector with max to a scalar
> > > but want the (same) result in all vector e
Dear Mikael,
Thank you very much for the review. I'll give consideration to your
remarks over the weekend. You will have guessed from the comment that
I too was uneasy about forcing the break. As for your last remark,
yes, the code rewriting is indeed in the wrong place. It should be
rather easy t
On Thu, 17 Sep 2015, Alan Lawrence wrote:
> On 15/09/15 08:43, Richard Biener wrote:
> >
> > Sorry for chiming in so late...
>
> Not at all, TYVM for your help!
>
> > TREE_CONSTANT isn't the correct thing to test. You should use
> > TREE_CODE () == INTEGER_CST instead.
>
> Done (in some cases,
On Thu, 17 Sep 2015, Bill Schmidt wrote:
> On Thu, 2015-09-17 at 09:18 -0500, Bill Schmidt wrote:
> > On Thu, 2015-09-17 at 09:39 +0200, Richard Biener wrote:
> > > On Wed, 16 Sep 2015, Alan Lawrence wrote:
> > >
> > > > On 16/09/15 17:10, Bill Schmidt wrote:
> > > > >
> > > > > On Wed, 2015-09-
On 18 September 2015 at 01:18, Moore, Catherine
wrote:
>
>
>> -Original Message-
>> From: Jonathan Wakely [mailto:jwak...@redhat.com]
>> Sent: Thursday, September 17, 2015 6:54 PM
>> To: Moore, Catherine; fdum...@gcc.gnu.org
>> Cc: Gerald Pfeifer; libstd...@gcc.gnu.org; gcc-patches@gcc.gnu
On Thu, 17 Sep 2015, Ilya Enkovich wrote:
> 2015-09-16 15:30 GMT+03:00 Richard Biener :
> > On Mon, 14 Sep 2015, Kirill Yukhin wrote:
> >
> >> Hello,
> >> I'd like to initiate discussion on vectorization of loops which
> >> boundaries are not aligned to VF. Main target for this optimization
> >> r
1 - 100 of 110 matches
Mail list logo
