Re: [PATCH, PR target/65103, 2/3] Propagate address constants into loops for i386

On 04/17/2015 02:34 AM, Ilya Enkovich wrote: On 15 Apr 14:07, Ilya Enkovich wrote: 2015-04-14 8:22 GMT+03:00 Jeff Law : On 03/15/2015 02:30 PM, Richard Sandiford wrote: Ilya Enkovich writes: This patch allows propagation of loop invariants for i386 if propagated value is a constant to be u

[PATCH, alpha]: Revert PR 41089 workaround

Hello! Now that PR 64950 is fixed, we can safely remove PR 41089 workaround. 2015-04-21 Uros Bizjak PR tree-optimization/64950 Revert: 2010-08-02 Uros Bizjak PR target/41089 * config/alpha/alpha.c (alpha_build_builtin_va_list): Mark __offset

Re: [PATCH] 65479 - sanitizer stack trace missing frames past #0 on powerpc64

Hi! Note, the changes aren't acceptable for 5.1 at this point (release is tomorrow), and for 5.2 backport they should be tested for a while on the trunk, so there is no rush now. > --- a/libsanitizer/ChangeLog > +++ b/libsanitizer/ChangeLog > @@ -1,3 +1,15 @@ > +2015-04-19 Martin Sebor > + > +

Re: [PATCH] Add new target h8300-*-linux

At Mon, 20 Apr 2015 09:26:21 -0600, Jeff Law wrote: > > On 04/19/2015 10:51 PM, Yoshinori Sato wrote: > >>> + if (TARGET_H8300H && (TARGET_H8300S || TARGET_H8300SX)) > >>> +{ > >>> + target_flags ^= MASK_H8300H; > >>> +} > >> I'm a bit concerned by this. Why did you need to make thi

Re: [PING^2] [PATCH][5a/5] Postpone expanding va_arg until pass_stdarg

On Thu, Apr 16, 2015 at 4:55 PM, Richard Biener wrote: > On Thu, 16 Apr 2015, Tom de Vries wrote: > >> [stage1 ping^2] >> On 10-03-15 16:30, Tom de Vries wrote: >> > [stage1 ping] >> > On 22-02-15 14:13, Tom de Vries wrote: >> > > On 19-02-15 14:03, Richard Biener wrote: >> > > > On Thu, 19 Feb 20

Re: ira.c update_equiv_regs patch causes gcc/testsuite/gcc.target/arm/pr43920-2.c regression

On 04/20/2015 01:09 AM, Shiva Chen wrote: Hi, Jeff Thanks for your advice. can_replace_by.patch is the new patch to handle both cases. pr43920-2.c.244r.jump2.ori is the original jump2 rtl dump pr43920-2.c.244r.jump2.patch_can_replace_by is the jump2 rtl dump after patch can_replace_by.patch

RE: [PATCH][AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo

Hi Kyrill, In AMD Seattle board, I see that CPU implementer is 0x41 and CPU part is 0xd07.CPU variant is 1 but you don’t do anything with that. It matches with cortex-a57 and its features. I will try a bootstrap test as well. Regards, Venkat. -Original Message- From: gcc-pat

Re: Ping^3 : [PATCH] [gcc, combine] PR46164: Don't combine the insns if a volatile register is contained.

On Tue, Apr 21, 2015 at 09:39:16AM +0800, Terry Guo wrote: > Is this one ok to trunk? Probably, if you send the patch + changelog entry :-) Did you fix the comment? REG_USERVAR_P and HARD_REGISTER_P can be set for more than just register asm. Segher

[PATCH] Emit -Waddress warnings for comparing address of reference against NULL

Implementation is pretty straightforward. The only catch is that the middle-end doesn't actually assume that REFERENCE_TYPEs are non-NULL so code like int &a = *(int *)0; if (&a != 0) will warn that &a will never be NULL yet the middle-end will fold the conditional to false instead of tr

Ping^3 : [PATCH] [gcc, combine] PR46164: Don't combine the insns if a volatile register is contained.

Hi there, Is this one ok to trunk? BR, Terry On Wed, Apr 15, 2015 at 6:45 PM, Hale Wang wrote: > Ping for trunk? > > Hale > >> -Original Message- >> From: Richard Sandiford [mailto:rdsandif...@googlemail.com] >> Sent: Friday, February 27, 2015 4:04 AM >> To: Terry Guo >> Cc: Segher Boes

[PATCH] use gold/configure.tgt to calc supported targets

Rather than maintain two lists, re-use gold's target file to determine whether the current target is supported. 2015-04-20 Mike Frysinger * configure.ac: Replace $target checks with gold/configure.tgt. * configure: Regenerate. --- configure| 20 ++-- config

Re: [Patch] pr65779 - [5/6 Regression] undefined local symbol on powerpc

On Mon, Apr 20, 2015 at 12:17:08PM -0600, Jeff Law wrote: > So just one question. Why handle the split case differently? In the split > case you effectively move the debug insn to the new block. In the !split > case, you just delete the debug insn. The idea was that when split we have a new blo

[wwwdocs] PATCH for Re: [ANN] gcc-lua: Lua plugin for the GNU Compiler Collection

Hi Peter, On Wed, 31 Oct 2012, Peter Colberg wrote: > gcc‑lua extends the GNU Compiler Collection with the ability to run Lua > scripts. The plugin provides an interface to register callback functions > for plugin events, and inspect the abstract syntax tree of a translation > unit. The plugin

Re: [RS6000] pr65810, powerpc64 alignment of r2

On Mon, Apr 20, 2015 at 01:11:41PM -0400, David Edelsohn wrote: > > @@ -6510,6 +6518,8 @@ offsettable_ok_by_alignment (rtx op, HOST_WIDE_INT > > return false; > > > >dsize = GET_MODE_SIZE (mode); > > + if (dsize > POWERPC64_TOC_POINTER_ALIGNMENT) > > +return false; > > Why do you imm

Re: [PATCH] 65479 - sanitizer stack trace missing frames past #0 on powerpc64

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b4052ef..18eede3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2015-04-19 Martin Sebor + +PR sanitizer/65479 +* gcc/testsuite/c-c++-common/asan/misalign-1.c [powerpc*-*-*-*]: +U

Re: [wwwdocs] Add porting_to.html for GCC 5 (again)

On Wed, 14 Jan 2015, Marek Polacek wrote: > A few months ago I posted the "porting to" document for GCC 5. > But I never got around to commit it, so here it is again, this > time with feewing. Thanks again for doing this. Below is my last set of changes: Break some paragraphs and longer sentence

Re: Announcing Segher Boessenkool as combine.c maintainer

On Mon, Apr 20, 2015 at 01:29:03PM -0600, Jeff Law wrote: > Segher, can you please add yourself to the MAINTAINERS file for the > additional role. Done as this. Cheers, Segher 2015-04-20 Segher Boessenkool * MAINTAINERS (Various Maintainers): Add myself as instruction com

RE: [PATCH][MIPS] Enable load-load/store-store bonding

> -Original Message- > From: Matthew Fortune [mailto:matthew.fort...@imgtec.com] > Sent: Monday, April 20, 2015 3:10 PM > To: Sameera Deshpande; Moore, Catherine > Cc: Richard Sandiford; gcc-patches@gcc.gnu.org; echri...@gmail.com > Subject: RE: [PATCH][MIPS] Enable load-load/store-store

Re: [PATCH 1/13] libitm fixes for musl support

On 04/20/2015 12:51 PM, Szabolcs Nagy wrote: This are minor correctness fixes required for musl. (fcntl.h is the standard header and always available on Linux, sys/fcntl.h is just a legacy alias, so use the standard one.) libitm/Changelog: 2015-04-16 Gregor Richards * config/arm/hw

Re: [PATCH 10/13] fixincludes

On 04/20/2015 12:58 PM, Szabolcs Nagy wrote: No fixincludes are needed for musl. fixincludes/Changelog: 2015-04-16 Gregor Richards * mkfixinc.sh: Add *-musl* with no fixes. OK. jeff

Re: [PATCH][AArch64] Increase static buffer size in aarch64_rewrite_selected_cpu

On Mon, Apr 20, 2015 at 05:24:39PM +0100, Kyrill Tkachov wrote: > Hi all, > > When trying to compile a testcase with -mcpu=cortex-a57+crypto+nocrc I got > the weird assembler error: > Assembler messages: > Error: missing architectural extension > Error: unrecognized option -mcpu=cortex-a57+crypto+

Re: [PATCH 8/13] sh musl support

On Mon, 2015-04-20 at 19:56 +0100, Szabolcs Nagy wrote: > Set up dynamic linker name for sh. > > gcc/Changelog: > > 2015-04-16 Gregor Richards > > * config/sh/linux.h (MUSL_DYNAMIC_LINKER): Define. The SH parts are OK for trunk. Cheers, Oleg

Re: [AArch64][PR65375] Fix RTX cost for vector SET

On Fri, Apr 17, 2015 at 12:19:14PM +0100, Kugan wrote: > >> My point is that adding your patch while keeping the logic at the top > >> which claims to catch ALL vector operations makes for less readable > >> code. > >> > >> At the very least you'll need to update this comment: > >> > >> /* TODO:

Re: Merge current set of OpenACC changes from gomp-4_0-branch

On Mon, 20 Apr 2015, Thomas Schwinge wrote: > Gerald, is it OK to commit the following to update GCC 5 changes' »New > Languages and Language specific improvements« section? Sure thing. Gerald

Re: [PATCH 0/13] Add musl support to GCC

To confirm: Yes, I've signed the FSF copyright assignment document, and yes we've discussed the changes relative to my own (which were mostly just cleanups and sanity anyway). I'm Gregor Richards and I approve this message. With valediction, - Gregor Richards On 04/20/2015 02:49 PM, Szabolc

[PATCH diagnostics/fortran] Handle two locations for the same diagnostic. Convert all gfc_warning_1 and gfc_notify_std_1 calls

The Fortran FE allows diagnostics with two different locations. Depending on whether these locations are on the same line or not, this may produce one or two caret lines. This is the last remaining issue left to make Fortran diagnostics use the common code. In the common diagnostics: I added supp

Re: [patch, fortran] PR 37131

I have played a little bit with the patched gfortran. (1) gfortran.dg/coarray_lib_this_image_2.f90 is still failing FAIL: gfortran.dg/coarray_lib_this_image_2.f90 -O scan-tree-dump-times original "mylbound = parm...dim\\[0\\].stride >= 0 && parm...dim\\[0\\].ubound >= parm...dim\\[0\\].lbou

Re: [PATCH 1/2] ?PR c++/61636

On 2015-04-20 11:25, Marek Polacek wrote: On Sat, Apr 18, 2015 at 06:53:28PM +0100, Adam Butcher wrote: Test like this? /* { dg-do run { target c++14 } } */ /* { dg-final { scan-assembler-not "..." } } */ What is this dg-final supposed to do here? It was a placeholder for making sure that

Re: Handle redirection blocks with clobbers

On 04/20/2015 11:19 AM, Jakub Jelinek wrote: On Mon, Apr 20, 2015 at 11:14:03AM -0600, Jeff Law wrote: while (!gsi_end_p (gsi) && (gimple_code (gsi_stmt (gsi)) == GIMPLE_LABEL || is_gimple_debug (gsi_stmt (gsi)) -|| gimple_nop_p (gsi_stmt (gsi +

Re: [PATCH][AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo

On Mon, Apr 20, 2015 at 8:47 AM, Kyrill Tkachov wrote: > Hi all, > > This is an attempt to add native CPU detection to AArch64 GNU/Linux targets. > Similar to other ports we use SPEC rewriting to rewrite > -m{cpu,tune,arch}=native > options into the appropriate CPU/architecture and the architectur

Re: [PATCH, i386, Darwin RFT]: Remove reload_in_progress checks

On Mon, Apr 20, 2015 at 12:00 PM, Iain Sandoe wrote: > > On 20 Apr 2015, at 10:47, Dominique d'Humières wrote: > >> After having fixed the typo, regtesting went without regression. > > I have done a bootstrap on i686-darwin10 with the amended patch - slow > machine, so testing still in progress (

RE: [PATCH][MIPS] Enable load-load/store-store bonding

Sameera Deshpande writes: > Gentle reminder! Thanks Sameera. Just a couple of comments inline below and a question for Catherine at the end. > - Thanks and regards, >Sameera D. > > On Monday 30 March 2015 04:58 PM, sameera wrote: > > Hi! > > > > Sorry for delay in sending this patch for rev

Re: Handle redirection blocks with clobbers

On 04/20/2015 11:19 AM, Jakub Jelinek wrote: On Mon, Apr 20, 2015 at 11:14:03AM -0600, Jeff Law wrote: while (!gsi_end_p (gsi) && (gimple_code (gsi_stmt (gsi)) == GIMPLE_LABEL || is_gimple_debug (gsi_stmt (gsi)) -|| gimple_nop_p (gsi_stmt (gsi +

Re: [patch,wwwdocs] Add gcc-5 caveats for avr.

Hi Johann, On Mon, 20 Apr 2015, Georg-Johann Lay wrote: Okay to install? +The AVR port uses a new scheme to describe supported devices: +For each supported device the compiler provides a device-specific +http://gcc.gnu.org/onlinedocs/gcc/Spec-Files.html";>spec file. +

[PATCH 13/13] fix incompatible posix_memalign declaration on x86

The posix_memalign declaration is incompatible with musl for C++, because of the exception specification. It also pollutes the namespace and lacks protection against a potential macro definition that is allowed by POSIX. The fix avoids source level namespace pollution but retains the dependency o

[PATCH 12/13] libstdc++, libgfortran gthr workaround for musl

libgcc/gthr-posix.h uses weak reference logic to determine if libpthread is linked into the application or not. This is broken unless there is special workaround with libc internal knowledge and even then static linking needs further manual link time workaround, so this was disabled for os/generic

[PATCH 11/13] unwind fix for musl

dl_iterate_phdr depends on USE_PT_GNU_EH_FRAME. I think USE_PT_GNU_EH_FRAME could be enabled more generally (whenever libc provides dl_iterate_phdr), but I only made a conservative change. libgcc/Changelog: 2015-04-16 Gregor Richards Szabolcs Nagy * unwind-dw2-fde-dip.

[PATCH 10/13] fixincludes

No fixincludes are needed for musl. fixincludes/Changelog: 2015-04-16 Gregor Richards * mkfixinc.sh: Add *-musl* with no fixes. diff --git a/fixincludes/mkfixinc.sh b/fixincludes/mkfixinc.sh index 6653fed..0d96c8c 100755 --- a/fixincludes/mkfixinc.sh +++ b/fixincludes/mkfixinc.sh @@ -

[PATCH 9/13] x86 musl support

Set up dynamic linker name for x86. gcc/Changelog: 2015-04-16 Gregor Richards * config/i386/linux.h (MUSL_DYNAMIC_LINKER): Define. * config/i386/linux64.h (MUSL_DYNAMIC_LINKER32): Define. (MUSL_DYNAMIC_LINKER64, MUSL_DYNAMIC_LINKERX32): Define. diff --git a/gcc/config/

[PATCH 8/13] sh musl support

Set up dynamic linker name for sh. gcc/Changelog: 2015-04-16 Gregor Richards * config/sh/linux.h (MUSL_DYNAMIC_LINKER): Define. diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h index 0f5d614..16524da 100644 --- a/gcc/config/sh/linux.h +++ b/gcc/config/sh/linux.h @@ -43,7 +43

[PATCH 7/13] powerpc musl support

Set up dynamic linker name for powerpc. Musl only supports powerpc with secure plt, so appropriate options are passed to the linker by default. gcc/Changelog: 2015-04-16 Gregor Richards * config.gcc (secure_plt): Add *-linux*-musl*. * config/rs6000/linux64.h (MUSL_DYNAMIC_LI

[PATCH 6/13] mips musl support

Set up dynamic linker name for mips. gcc/Changelog: 2015-04-16 Gregor Richards * config/mips/linux.h (MUSL_DYNAMIC_LINKER): Define. diff --git a/gcc/config/mips/linux.h b/gcc/config/mips/linux.h index 91df261..5057bc5 100644 --- a/gcc/config/mips/linux.h +++ b/gcc/config/mips/linux.h

[PATCH 5/13] microblaze musl support

Set up dynamic linker name for microblaze. gcc/Changelog: 2015-04-16 Gregor Richards * config/microblaze/linux.h (MUSL_DYNAMIC_LINKER): Define. (DYNAMIC_LINKER): Change. diff --git a/gcc/config/microblaze/linux.h b/gcc/config/microblaze/linux.h index a7faa7d..14fe41e 100644 --

[PATCH 4/13] arm musl support

Set up dynamic linker name for arm. gcc/Changelog: 2015-04-16 Gregor Richards * config/arm/linux-eabi.h (MUSL_DYNAMIC_LINKER): Define. diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h index e9d65dc..f12e6bd 100644 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/confi

[PATCH 3/13] aarch64 musl support

Set up dynamic linker name for aarch64. gcc/Changelog: 2015-04-16 Gregor Richards Szabolcs Nagy * config/aarch64/aarch64-linux.h (MUSL_DYNAMIC_LINKER): Define. diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h index 9abb252..5ff83dd 100

Re: [PATCH][combine] Do not call rtx costs on potentially unrecognisable rtxes in combine

On 04/20/2015 08:04 AM, Kyrill Tkachov wrote: Hi all, I'm trying to reduce the cases where the midend calls the backend rtx costs on bogus rtl for which the backend doesn't have patterns or ways of handling. Having to handle these kinds of rtxes sanely bloats those functions and makes them harde

[PATCH 2/13] musl libc config

Add musl libc support to gcc and the command line option -mmusl following other libc support code. Note that -m cannot be entirely correct: there are build time decisions based on the default libc. gcc/Changelog: 2015-04-16 Gregor Richards * config.gcc (LIBC_MUSL): New tm_defines mac

Re: [PATCH] 65479 - sanitizer stack trace missing frames past #0 on powerpc64

On 04/20/2015 09:43 PM, Jakub Jelinek wrote: On Mon, Apr 20, 2015 at 09:38:03PM +0300, Yury Gribov wrote: --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2015-04-19 Martin Sebor + +PR sanitizer/65479 +* gcc/testsuite/c-c++-common/asan/misalign-1.c [powerpc*

Re: [committed] Fix GC ICE due to dwarf2out bug (PR debug/65807)

On Apr 20, 2015, at 6:34 AM, Jakub Jelinek wrote: > add_AT_wide is the only add_AT_* that doesn't clear or otherwise initialize > dw_attr_val.val_entry field, so it contains random garbage, which isn't > desirable when ggc walks it during collections. > > Supposedly this omission originates from

[PATCH 1/13] libitm fixes for musl support

This are minor correctness fixes required for musl. (fcntl.h is the standard header and always available on Linux, sys/fcntl.h is just a legacy alias, so use the standard one.) libitm/Changelog: 2015-04-16 Gregor Richards * config/arm/hwcap.cc: Use fcntl.h instead of sys/fcntl.h.

[PATCH 0/13] Add musl support to GCC

This patch set adds musl libc[0] support to GCC. The patches were originally developed by Gregor Richards[1][2], who I believe have already done the FSF copyright assignment and agrees with the changes I made (please verify). I only did minor cleanups to make the patches better suited for upstrea

Re: [PATCH] 65479 - sanitizer stack trace missing frames past #0 on powerpc64

On Mon, Apr 20, 2015 at 09:38:03PM +0300, Yury Gribov wrote: > >>--- a/gcc/testsuite/ChangeLog > >>+++ b/gcc/testsuite/ChangeLog > >>@@ -1,3 +1,12 @@ > >>+2015-04-19 Martin Sebor > >>+ > >>+PR sanitizer/65479 > >>+* gcc/testsuite/c-c++-common/asan/misalign-1.c [powerpc*-*-*-*]: > >>+Us

Re: [PATCH] 65479 - sanitizer stack trace missing frames past #0 on powerpc64

On 04/20/2015 12:38 PM, Yury Gribov wrote: Perhaps enable unwind tables in GCC spec if -fsanitize=address is present? Sanitizer backtraces typically won't work without unwind tables anyway so IMHO this makes sense. BTW why do we need asynchronous tables? Wouldn't simple -funwind-tables be enough

Re: [PATCH, i386, Darwin RFT]: Remove reload_in_progress checks

On Apr 20, 2015, at 3:16 AM, Uros Bizjak wrote: > On Mon, Apr 20, 2015 at 12:00 PM, Iain Sandoe wrote: > >>> After having fixed the typo, regtesting went without regression. >> >> I have done a bootstrap on i686-darwin10 with the amended patch - slow >> machine, so testing still in progress (b

Re: [PATCH] 65479 - sanitizer stack trace missing frames past #0 on powerpc64

On 04/20/2015 09:23 PM, Jeff Law wrote: On 04/19/2015 07:48 PM, Martin Sebor wrote: The attached patch resolves the failures in a number of address sanitizer tests on powerpc64*-*-*-* discussed in bug 65479 (the failures in c-c++-common/asan/swapcontext-test-1.c reported in pr65643 remain unreso

Re: [patch, c, ping] Fix PR c/48956: diagnostics for conversions involving complex types (reviewed)

On 04/17/2015 11:37 AM, Mikhail Maltsev wrote: On 04/17/2015 08:10 PM, Jeff Law wrote: Have you received confirmation from the FSF WRT your copyright assignment was accepted? jeff Yes, it's ID is [gnu.org #972407]. Should I forward the PDF to you? Can't hurt for a confirmation. Jeff

Re: [PATCH][MIPS] Enable load-load/store-store bonding

With FUSION you might get farther. See the arm port as I recall. The quick overview, FUSION allows instructions that are not contiguous to be paired up and fused together. it was built for load/load store/store combining. On Apr 19, 2015, at 10:09 PM, sameera wrote: > Gentle reminder! > > -

Re: [PATCH] 65479 - sanitizer stack trace missing frames past #0 on powerpc64

On 04/19/2015 07:48 PM, Martin Sebor wrote: The attached patch resolves the failures in a number of address sanitizer tests on powerpc64*-*-*-* discussed in bug 65479 (the failures in c-c++-common/asan/swapcontext-test-1.c reported in pr65643 remain unresolved). The patch has been tested on powe

Re: [Patch] pr65779 - [5/6 Regression] undefined local symbol on powerpc

On 04/19/2015 09:10 PM, Alan Modra wrote: This patch removes bogus debug info left around by shrink-wrapping, which on some powerpc targets with just the right register allocation led to assembly errors. Bootstrapped and regression tested powerpc64-linux and x86_64-linux. I did see some regressi

Re: [PATCH][expr.c] PR 65358 Avoid clobbering partial argument during sibcall

On 04/20/2015 02:25 AM, Kyrill Tkachov wrote: Hi Jeff, Hmmm, so what happens if the difference is < 0? I'd be a bit worried about that case for the PA (for example). So how about asserting that the INTVAL is >= 0 prior to returning so that we catch that case if it ever occurs? INTVAL being

Re: [Patch, fortran] PR65792 unitialized structure constructor array subcomponent

I have retested a clean tree with only the patches for pr 65792 [first patch] and Andre’s one for pr59678: i.e., without any patch from pr61831, and I still see the conflict between the two patches. Dominique > Le 19 avr. 2015 à 10:39, Dominique d'Humières a écrit : > >> Snip >> Both patche

Re: [PATCH][expmed] Calculate mult-by-const cost properly in mult_by_coeff_cost

On 04/20/2015 03:27 AM, Kyrill Tkachov wrote: On 15/04/15 16:41, Jeff Law wrote: On 04/14/2015 02:07 AM, Kyrill Tkachov wrote: Hi Jeff, Thanks for looking at this. On 13/04/15 19:18, Jeff Law wrote: On 03/16/2015 04:12 AM, Kyrill Tkachov wrote: Hi all, Eyeballing the mult_by_coeff_cost fu

Re: Handle redirection blocks with clobbers

On Mon, Apr 20, 2015 at 11:14:03AM -0600, Jeff Law wrote: >while (!gsi_end_p (gsi) >&& (gimple_code (gsi_stmt (gsi)) == GIMPLE_LABEL >|| is_gimple_debug (gsi_stmt (gsi)) > - || gimple_nop_p (gsi_stmt (gsi > + || gimple_nop_p (gsi_stmt (gsi)) > +

Handle redirection blocks with clobbers

PR 65658 shows a case where we fail to thread jumps in a block that is trivially threadable and would generate no code if threaded. That in turn results in inefficient code and a false positive from -Wuninitialized. The problem is the problem block has a clobber statement and redirection_bl

Re: [RS6000] pr65810, powerpc64 alignment of r2

On Mon, Apr 20, 2015 at 9:53 AM, Alan Modra wrote: > This fixes a thinko in offsettable_ok_by_alignment. It's not the > absolute placement that matters, but the toc-pointer relative offset. > So alignment of r2 also needs to be taken into account. > > Bootstrapped and regression tested powerpc64-

[PATCH][DRIVER] Wrong C++ include paths when configuring with "--with-sysroot=/"

Hi all, To build a GCC-4.9.2 ARM cross-compiler for my setting I need to configure it with "--with-sysroot=/ --with-gxx-include-dir=/usr/include/c++/4.9.2". But I found that gcc driver removes the leading slash from resulting paths: `gcc -print-prog-name=cc1plus` -v ... ignoring nonexistent

Re: [PATCH][committed] Add missed '%>' to error_at message

On Mon, Apr 20, 2015 at 17:03:27 +0200, Jakub Jelinek wrote: > On Mon, Apr 20, 2015 at 05:56:16PM +0300, Ilya Verbin wrote: > > This patch adds missed '%>' to the error_at () message in > > c[p]_parser_omp_target_update. Committed as obvious. > > Please commit also to gcc-5-branch. > The Swedish

[PATCH][AArch64] Use extend_arith rtx cost appropriately

Hi all, When calculating the rtx costs of an arithmetic operation combined with zero or sign extension of its operand we should use the extend_arith cost rather than the arith_shift cost. Bootstrapped and tested on aarch64-linux. Ok for trunk? Thanks, Kyrill 2015-04-20 Kyrylo Tkachov *

[PATCH][AArch64] Properly cost MNEG/[SU]MNEGL patterns

Hi all, Currently we do not handle the MNEG patterns properly in rtx costs. These instructions are similar to the MSUB ones. This patch handles them by catching the NEG at the appropriate position, extracting its operands and letting the rest of the aarch64_rtx_mult_cost function handle the addi

[PATCH][AArch64] Properly handle SHIFT ops and EXTEND in aarch64_rtx_mult_cost

Hi all, The aarch64_rtx_mult_cost helper is supposed to handle multiplication costs as well as PLUS/MINUS operations combined with multiplication or shift operations. The shift operations may contain an extension. Currently we do not handle all these cases properly. We also don't handle other

Re: [patch,wwwdocs] Add gcc-5 caveats for avr.

On Mon, Apr 20, 2015 at 06:21:30PM +0200, Georg-Johann Lay wrote: > Am 04/20/2015 um 03:40 PM schrieb Andi Kleen: > >Georg-Johann Lay writes: > >>+http://gcc.gnu.org/onlinedocs/gcc/Spec-Files.html";>spec > >>file. > >>+If the compiler is used together with AVR-LibC, this requires

[PATCH][ARM] Handle UNSPEC_VOLATILE in rtx costs and don't recurse inside the unspec

Hi all, A pet project of mine is to get to the point where backend rtx costs functions won't have to handle rtxes that don't match down to any patterns/expanders we have. Or at least limit such cases. A case dealt with in this patch is QImode PLUS. We don't actually generate or handle these an

[PATCH][AArch64] Increase static buffer size in aarch64_rewrite_selected_cpu

Hi all, When trying to compile a testcase with -mcpu=cortex-a57+crypto+nocrc I got the weird assembler error: Assembler messages: Error: missing architectural extension Error: unrecognized option -mcpu=cortex-a57+crypto+no The problem is the aarch64_rewrite_selected_cpu that is used to rewrite

Re: [patch,wwwdocs] Add gcc-5 caveats for avr.

Am 04/20/2015 um 03:40 PM schrieb Andi Kleen: Georg-Johann Lay writes: +http://gcc.gnu.org/onlinedocs/gcc/Spec-Files.html";>spec file. +If the compiler is used together with AVR-LibC, this requires at +least GCC 5.2 and a version of AVR-LibC which implements Really 5.

[PATCH][AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo

Hi all, This is an attempt to add native CPU detection to AArch64 GNU/Linux targets. Similar to other ports we use SPEC rewriting to rewrite -m{cpu,tune,arch}=native options into the appropriate CPU/architecture and the architecture extension options when appropriate (i.e. +crypto/+crc etc). Fo

Re: [PATCH] Add new target h8300-*-linux

On 04/19/2015 10:51 PM, Yoshinori Sato wrote: + if (TARGET_H8300H && (TARGET_H8300S || TARGET_H8300SX)) +{ + target_flags ^= MASK_H8300H; +} I'm a bit concerned by this. Why did you need to make this change? The flag is exclusion, but it's set both. Hmmm, IIRC the port has many

Re: [Obvious][AArch64] Delete unused aarch64_simd_emit_pair_result_insn.

Oops, missed off the patch actually pushed. Attached now. Cheers, Alan Alan Lawrence wrote: Bootstrapped on aarch64-none-linux-gnu. Pushed as r34. gcc/ChangeLog: * config/aarch64/aarch64.c (aarch64_simd_emit_pair_result_insn): Delete. * config/aarch64/aarch64-protos.h

Re: [PATCH][expmed] Properly account for the cost and latency of shift+add ops when synthesizing mults

On 20/04/15 16:06, Jeff Law wrote: On 04/20/2015 05:09 AM, Kyrill Tkachov wrote: Hi Jeff, On 17/04/15 20:38, Jeff Law wrote: On 04/14/2015 02:11 AM, Kyrill Tkachov wrote: Of course the effect on codegen of this patch depends a lot on the rtx costs in the backend. On aarch64 with -mcpu=cortex

Re: [PATCH][committed] Add missed '%>' to error_at message

On Mon, Apr 20, 2015 at 05:56:16PM +0300, Ilya Verbin wrote: > This patch adds missed '%>' to the error_at () message in > c[p]_parser_omp_target_update. Committed as obvious. Please commit also to gcc-5-branch. The Swedish translation is the only one that has this message (with the bug in it) tr

Re: [PATCH][expmed] Properly account for the cost and latency of shift+add ops when synthesizing mults

On 04/20/2015 05:09 AM, Kyrill Tkachov wrote: Hi Jeff, On 17/04/15 20:38, Jeff Law wrote: On 04/14/2015 02:11 AM, Kyrill Tkachov wrote: Of course the effect on codegen of this patch depends a lot on the rtx costs in the backend. On aarch64 with -mcpu=cortex-a57 tuning I see the cost limit bein

[PATCH][committed] Add missed '%>' to error_at message

This patch adds missed '%>' to the error_at () message in c[p]_parser_omp_target_update. Committed as obvious. gcc/c/ * c-parser.c (c_parser_oacc_enter_exit_data): Remove excess semicolon. (c_parser_omp_target_update): Add missed %> to error_at (). gcc/cp/ * parser.c (cp_

Re: RFA (stor-layout): PATCH for c++/65734 (attribute aligned and templates)

On Tue, Apr 14, 2015 at 12:06:16PM -0400, Jason Merrill wrote: > With C++ templates and attribute ((aligned)), you can have TYPE_ALIGN and > TYPE_USER_ALIGN set on a type before you know its size, so layout_type and > kin need to respect them if they are already set. > > Tested x86_64-pc-linux-gnu

Re: [PATCH] Fix check for whether a function is a variadic function

On 04/20/2015 09:02 AM, Patrick Palka wrote: But never mind, I'm getting hundreds of failures from C tests that define main without a parameter list e.g. "int main () { ... }". This is an issue not worth fixing.. Yep, that's what I was wondering. I think it makes sense to fix this testcase i

Re: [RS6000] pr65810, powerpc64 alignment of r2

On Mon, Apr 20, 2015 at 11:23:17PM +0930, Alan Modra wrote: > This fixes a thinko in offsettable_ok_by_alignment. It's not the > absolute placement that matters, but the toc-pointer relative offset. > So alignment of r2 also needs to be taken into account. > > Bootstrapped and regression tested p

Re: Merge current set of OpenACC changes from gomp-4_0-branch

Hi! On Thu, 15 Jan 2015 21:20:07 +0100, I wrote: > In r219682, I have committed to trunk our current set of OpenACC changes, > which we had prepared on gomp-4_0-branch. Thanks to everyone who has > been contributing! > > Note that this is an experimental feature, incomplete, and subject to > cha

[PATCH][OpenMP] Fix resolve_device with -foffload=disable

Hi! Currently if a compiler is configured with enabled offloading, the 'devices' array in libgomp is filled properly with a number of available devices. However, if a program is compiled with -foffload=disable, the resolve_device function returns a pointer to the device, and host-fallback is not h

[PATCH][combine] Do not call rtx costs on potentially unrecognisable rtxes in combine

Hi all, I'm trying to reduce the cases where the midend calls the backend rtx costs on bogus rtl for which the backend doesn't have patterns or ways of handling. Having to handle these kinds of rtxes sanely bloats those functions and makes them harder to maintain. One of the cases where this o

[RS6000] pr65810, powerpc64 alignment of r2

This fixes a thinko in offsettable_ok_by_alignment. It's not the absolute placement that matters, but the toc-pointer relative offset. So alignment of r2 also needs to be taken into account. Bootstrapped and regression tested powerpc64-linux. OK for mainline and gcc-5 branch? Without the dead c

Re: [PATCH, rs6000] Force lvx and stvx for prologue saves and epilogue restores of Altivec regs

Hi, I've added an assert to this patch to detect a related condition. Prior to this patch, the prologue code was causing us to incorrectly call the expand-time routine rs6000_emit_vsx_le_store(). This was harmless, but we should have caught this sooner. The patch removes this problem, but we sh

[Obvious][AArch64] Delete unused aarch64_simd_emit_pair_result_insn.

Bootstrapped on aarch64-none-linux-gnu. Pushed as r34. gcc/ChangeLog: * config/aarch64/aarch64.c (aarch64_simd_emit_pair_result_insn): Delete. * config/aarch64/aarch64-protos.h (aarch64_simd_emit_pair_result_insn): Delete.

[committed] Fix GC ICE due to dwarf2out bug (PR debug/65807)

Hi! add_AT_wide is the only add_AT_* that doesn't clear or otherwise initialize dw_attr_val.val_entry field, so it contains random garbage, which isn't desirable when ggc walks it during collections. Supposedly this omission originates from the val_entry addition being added everywhere only after

Re: [patch,wwwdocs] Add gcc-5 caveats for avr.

Georg-Johann Lay writes: > +http://gcc.gnu.org/onlinedocs/gcc/Spec-Files.html";>spec > file. > +If the compiler is used together with AVR-LibC, this requires at > +least GCC 5.2 and a version of AVR-LibC which implements Really 5.2? -Andi

Re: [PATCH][AArch64] Fix libstdc++ ABI baseline for aarch64-linux-gnu

On Mon, Apr 20, 2015 at 04:23:17PM +0300, Maxim Kuvyrkov wrote: > I have been trying to figure out why I constantly get 2 extra TLS symbols in > my aarch64-linux-gnu libstdc++ ABI tests, and it turned out to be due to > support for non-TLS toolchain -- as discussed here [*]. > > However, as far

Update __atomic builtins documentation.

Hello, The documentation for the __atomic builtins isn't clear about their expectations and behaviour. In particular, assumptions about the C11/C++11 restrictions on programs should be stated and the different behaviour of memory models in fences and in operations should be noted. The behaviour o

Re: [PATCH, ping1] Fix removing of df problem in df_finish_pass

As a dataflow maintainer, I approve this patch for the next release. However, you will have to get approval of a release manager to get it into 5.0. On 04/20/2015 04:22 AM, Thomas Preud'homme wrote: Ping? -Original Message- From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches

[PATCH][AArch64] Fix libstdc++ ABI baseline for aarch64-linux-gnu

Hi, I have been trying to figure out why I constantly get 2 extra TLS symbols in my aarch64-linux-gnu libstdc++ ABI tests, and it turned out to be due to support for non-TLS toolchain -- as discussed here [*]. However, as far as I understand, aarch64-linux-gnu postdates NPTL implementation, so

Re: [Patch] pr65779 - [5/6 Regression] undefined local symbol on powerpc

On Mon, Apr 20, 2015 at 10:30:32PM +0930, Alan Modra wrote: > > and there could be other debug insns for the same variable on that path, > > say saying that decl lives in some other register, or can be computed using > > an expression involving other registers, or memory etc. Say you could have >

Re: [PATCH] Fix check for whether a function is a variadic function

On Sun, Apr 19, 2015 at 11:17 PM, Jason Merrill wrote: > On 04/19/2015 07:45 PM, Patrick Palka wrote: >> >> stdarg_p() apparently returns false for a variadic function that has no >> concrete parameters, e.g. "void foo (...);". This patch fixes this >> issue by removing the predicate's seemingly

Re: [Patch] pr65779 - [5/6 Regression] undefined local symbol on powerpc

On Mon, Apr 20, 2015 at 10:55:56AM +0200, Jakub Jelinek wrote: > On Mon, Apr 20, 2015 at 06:12:26PM +0930, Alan Modra wrote: > > I had it that way in my first patch, then decided to try deleting.. > > > > I can certainly change it back even if only to do it the standard way > > for safety's sake,

Re: [PATCH] Make split_block and create_basic_block type-safe

On Mon, 23 Mar 2015, Richard Biener wrote: > On Fri, 20 Mar 2015, David Malcolm wrote: > > > On Thu, 2015-03-12 at 14:20 +0100, Richard Biener wrote: > > > After noticing tree-parloop.c passing crap to split_block (a tree > > > rather than a gimple or an rtx) I noticed those CFG functions simply

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