[gcc r15-222] PR target/106060: Improved SSE vector constant materialization on x86.

2024-05-06 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:79649a5dcd81bc05c0ba591068c9075de43bd417 commit r15-222-g79649a5dcd81bc05c0ba591068c9075de43bd417 Author: Roger Sayle Date: Tue May 7 07:14:40 2024 +0100 PR target/106060: Improved SSE vector constant materialization on x86. This patch resolves PR target/1060

[gcc r15-352] Constant fold {-1,-1} << 1 in simplify-rtx.cc

2024-05-09 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:f2449b55fb2d32fc4200667ba79847db31f6530d commit r15-352-gf2449b55fb2d32fc4200667ba79847db31f6530d Author: Roger Sayle Date: Thu May 9 22:45:54 2024 +0100 Constant fold {-1,-1} << 1 in simplify-rtx.cc This patch addresses a missed optimization opportunity in t

[gcc r15-366] i386: Improve V[48]QI shifts on AVX512/SSE4.1

2024-05-10 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:f5a8cdc1ef5d6aa2de60849c23658ac5298df7bb commit r15-366-gf5a8cdc1ef5d6aa2de60849c23658ac5298df7bb Author: Roger Sayle Date: Fri May 10 20:26:40 2024 +0100 i386: Improve V[48]QI shifts on AVX512/SSE4.1 The following one line patch improves the code generated f

[gcc r15-390] arm: Use utxb rN, rM, ror #8 to implement zero_extract on armv6.

2024-05-12 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:46077992180d6d86c86544df5e8cb943492d3b01 commit r15-390-g46077992180d6d86c86544df5e8cb943492d3b01 Author: Roger Sayle Date: Sun May 12 16:27:22 2024 +0100 arm: Use utxb rN, rM, ror #8 to implement zero_extract on armv6. Examining the code generated for the fo

[gcc r15-648] nvptx: Correct pattern for popcountdi2 insn in nvptx.md.

2024-05-19 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:1676ef6e91b902f592270e4bcf10b4fc342e200d commit r15-648-g1676ef6e91b902f592270e4bcf10b4fc342e200d Author: Roger Sayle Date: Sun May 19 09:49:45 2024 +0100 nvptx: Correct pattern for popcountdi2 insn in nvptx.md. The result of a POPCOUNT operation in RTL shoul

[gcc r15-3162] i386: Update STV's gains for TImode arithmetic right shifts on AVX2.

2024-08-25 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:07d62a1711f3e3bbdd2146ab5914d3bc5e246509 commit r15-3162-g07d62a1711f3e3bbdd2146ab5914d3bc5e246509 Author: Roger Sayle Date: Sun Aug 25 09:14:34 2024 -0600 i386: Update STV's gains for TImode arithmetic right shifts on AVX2. This patch tweaks timode_scalar_ch

[gcc r15-3281] i386: Support wide immediate constants in STV.

2024-08-28 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:3cb92be94e6581697369eeafdb67057c8cfba73f commit r15-3281-g3cb92be94e6581697369eeafdb67057c8cfba73f Author: Roger Sayle Date: Wed Aug 28 21:19:28 2024 -0600 i386: Support wide immediate constants in STV. This patch provides more accurate costs/gains for (wide)

[gcc r15-3342] i386: Support read-modify-write memory operands in STV.

2024-08-31 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:bac00c34226bac3a95979b21dc2d668a96b14f6e commit r15-3342-gbac00c34226bac3a95979b21dc2d668a96b14f6e Author: Roger Sayle Date: Sat Aug 31 14:17:18 2024 -0600 i386: Support read-modify-write memory operands in STV. This patch enables STV when the first operand o

[gcc r15-1701] i386: Some additional AVX512 ternlog refinements.

2024-06-27 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:5938cf021e95b40b040974c9cbe7860399247f7f commit r15-1701-g5938cf021e95b40b040974c9cbe7860399247f7f Author: Roger Sayle Date: Fri Jun 28 07:12:53 2024 +0100 i386: Some additional AVX512 ternlog refinements. This patch is another round of refinements to fine tu

[gcc r15-1702] i386: Handle sign_extend like zero_extend in *concatditi3_[346]

2024-06-27 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:07e915913b6b3d4e6e210f6dbc8e7e0e8ea594c4 commit r15-1702-g07e915913b6b3d4e6e210f6dbc8e7e0e8ea594c4 Author: Roger Sayle Date: Fri Jun 28 07:16:07 2024 +0100 i386: Handle sign_extend like zero_extend in *concatditi3_[346] This patch generalizes some of the patt

[gcc r15-1751] i386: Additional peephole2 to use lea in round-up integer division.

2024-07-01 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:142b5263b18be96e5d9ce406ad2c1b6ab35c190f commit r15-1751-g142b5263b18be96e5d9ce406ad2c1b6ab35c190f Author: Roger Sayle Date: Mon Jul 1 12:18:26 2024 +0100 i386: Additional peephole2 to use lea in round-up integer division. A common idiom for implementing an i

[gcc r15-1752] testsuite: Fix -m32 gcc.target/i386/pr102464-vrndscaleph.c on RedHat.

2024-07-01 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:589865a8e4f6bd26c622ea0ee0a38565a0d42e80 commit r15-1752-g589865a8e4f6bd26c622ea0ee0a38565a0d42e80 Author: Roger Sayle Date: Mon Jul 1 12:21:20 2024 +0100 testsuite: Fix -m32 gcc.target/i386/pr102464-vrndscaleph.c on RedHat. This patch fixes the 4 FAILs of gc

[gcc r15-1835] i386: Add additional variant of bswaphisi2_lowpart peephole2.

2024-07-03 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:727f8b142b7d5442af6c2e903293abc367a8de5f commit r15-1835-g727f8b142b7d5442af6c2e903293abc367a8de5f Author: Roger Sayle Date: Thu Jul 4 07:31:17 2024 +0100 i386: Add additional variant of bswaphisi2_lowpart peephole2. This patch adds an additional variation of

[gcc r15-1869] PR target/115751: Avoid force_reg in ix86_expand_ternlog.

2024-07-05 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:9a7e3f57e1ab8e6e4cf5ea3c0998aa50c6220579 commit r15-1869-g9a7e3f57e1ab8e6e4cf5ea3c0998aa50c6220579 Author: Roger Sayle Date: Sat Jul 6 05:24:39 2024 +0100 PR target/115751: Avoid force_reg in ix86_expand_ternlog. This patch fixes a problem with splitting of c

[gcc r15-2000] i386: Some AVX512 ternlog expansion refinements.

2024-07-12 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:6b5d263f2c90c3e22cdf576970c94bca268c5296 commit r15-2000-g6b5d263f2c90c3e22cdf576970c94bca268c5296 Author: Roger Sayle Date: Fri Jul 12 12:30:56 2024 +0100 i386: Some AVX512 ternlog expansion refinements. This patch replaces the calls to force_reg in ix86_exp

[gcc r15-2027] i386: Tweak i386-expand.cc to restore bootstrap on RHEL.

2024-07-14 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:74e6dfb23163c2dd670d1d60fbf4c782e0b44b94 commit r15-2027-g74e6dfb23163c2dd670d1d60fbf4c782e0b44b94 Author: Roger Sayle Date: Sun Jul 14 17:22:27 2024 +0100 i386: Tweak i386-expand.cc to restore bootstrap on RHEL. This is a minor change to restore bootstrap on

[gcc r15-2053] PR tree-optimization/114661: Generalize MULT_EXPR recognition in match.pd.

2024-07-16 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:df9451936c6c9e4faea371e3f188e1fc6b6d39e3 commit r15-2053-gdf9451936c6c9e4faea371e3f188e1fc6b6d39e3 Author: Roger Sayle Date: Tue Jul 16 07:58:28 2024 +0100 PR tree-optimization/114661: Generalize MULT_EXPR recognition in match.pd. This patch resolves PR tree-

[gcc r15-2132] Implement a -ftrapping-math/-fsignaling-nans TODO in match.pd.

2024-07-18 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:030186cabe8128e752619e101768cf8823a42c38 commit r15-2132-g030186cabe8128e752619e101768cf8823a42c38 Author: Roger Sayle Date: Thu Jul 18 08:27:36 2024 +0100 Implement a -ftrapping-math/-fsignaling-nans TODO in match.pd. I've been investigating some (float)i ==

[gcc r15-2359] Fold ctz(-x) and ctz(abs(x)) as ctz(x) in match.pd.

2024-07-27 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:928116e94a5a8a995dffd926af58abfa7286e78e commit r15-2359-g928116e94a5a8a995dffd926af58abfa7286e78e Author: Roger Sayle Date: Sat Jul 27 15:16:19 2024 +0100 Fold ctz(-x) and ctz(abs(x)) as ctz(x) in match.pd. The subject line pretty much says it all; the count

[gcc r15-2758] i386: Refactor V2DI arithmetic right shift expansion for STV.

2024-08-06 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:2f759fa9f4dd78ae8d86482ccda72a335aaac404 commit r15-2758-g2f759fa9f4dd78ae8d86482ccda72a335aaac404 Author: Roger Sayle Date: Tue Aug 6 17:19:29 2024 +0100 i386: Refactor V2DI arithmetic right shift expansion for STV. This patch refactors ashrv2di RTL expansio

[gcc r15-2793] testsuite: Fix recent regression of g++.dg/other/sse2-pr85572-1.C

2024-08-07 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:990a65fb1aa5d1b05a7737df879afb6900e2ce96 commit r15-2793-g990a65fb1aa5d1b05a7737df879afb6900e2ce96 Author: Roger Sayle Date: Wed Aug 7 12:52:26 2024 +0100 testsuite: Fix recent regression of g++.dg/other/sse2-pr85572-1.C My sincere apologies for not noticing

[gcc r15-2816] i386: Tweak ix86_mode_can_transfer_bits to restore bootstrap on RHEL.

2024-08-08 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:4d44f3fc387815eb232d7757352857993a1d21d9 commit r15-2816-g4d44f3fc387815eb232d7757352857993a1d21d9 Author: Roger Sayle Date: Thu Aug 8 11:16:29 2024 +0100 i386: Tweak ix86_mode_can_transfer_bits to restore bootstrap on RHEL. This minor patch, very similar to

[gcc r15-2880] PR target/116275: Handle STV of *extenddi2_doubleword_highpart on i386.

2024-08-11 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:7a970bd03f1d8eed7703db8a8db3c753ea68899f commit r15-2880-g7a970bd03f1d8eed7703db8a8db3c753ea68899f Author: Roger Sayle Date: Mon Aug 12 06:52:48 2024 +0100 PR target/116275: Handle STV of *extenddi2_doubleword_highpart on i386. This patch resolves PR target/1

[gcc r15-2940] i386: Improve split of *extendv2di2_highpart_stv_noavx512vl.

2024-08-15 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:b6fb4f7f651d2aa89548c5833fe2679af2638df5 commit r15-2940-gb6fb4f7f651d2aa89548c5833fe2679af2638df5 Author: Roger Sayle Date: Thu Aug 15 22:02:05 2024 +0100 i386: Improve split of *extendv2di2_highpart_stv_noavx512vl. This patch follows up on the previous patc

[gcc r15-774] Avoid ICE in except.cc on targets that don't support exceptions.

2024-05-22 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:26df7b4684e201e66c09dd018603a248ddc5f437 commit r15-774-g26df7b4684e201e66c09dd018603a248ddc5f437 Author: Roger Sayle Date: Wed May 22 13:48:52 2024 +0100 Avoid ICE in except.cc on targets that don't support exceptions. A number of testcases currently fail on

[gcc r15-775] i386: Correct insn_cost of movabsq.

2024-05-22 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:a3b16e73a2d5b2d4d20ef6f2fd164cea633bbec8 commit r15-775-ga3b16e73a2d5b2d4d20ef6f2fd164cea633bbec8 Author: Roger Sayle Date: Wed May 22 16:45:48 2024 +0100 i386: Correct insn_cost of movabsq. This single line patch fixes a strange quirk/glitch in i386's rtx_co

[gcc r15-1100] i386: Improve handling of ternlog instructions in i386/sse.md

2024-06-07 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:ec985bc97a01577bca8307f986caba7ba7633cde commit r15-1100-gec985bc97a01577bca8307f986caba7ba7633cde Author: Roger Sayle Date: Fri Jun 7 13:57:23 2024 +0100 i386: Improve handling of ternlog instructions in i386/sse.md This patch improves the way that the x86 b

[gcc r15-1101] i386: PR target/115351: RTX costs for *concatditi3 and *insvti_highpart.

2024-06-07 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:fb3e4c549d16d5050e10114439ad77149f33c597 commit r15-1101-gfb3e4c549d16d5050e10114439ad77149f33c597 Author: Roger Sayle Date: Fri Jun 7 14:03:20 2024 +0100 i386: PR target/115351: RTX costs for *concatditi3 and *insvti_highpart. This patch addresses PR target/

[gcc r15-1111] analyzer: Restore g++ 4.8 bootstrap; use std::move to return std::unique_ptr.

2024-06-07 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:e22b7f741ab54ff3a3f8a676ce9e7414fe174958 commit r15--ge22b7f741ab54ff3a3f8a676ce9e7414fe174958 Author: Roger Sayle Date: Sat Jun 8 05:01:38 2024 +0100 analyzer: Restore g++ 4.8 bootstrap; use std::move to return std::unique_ptr. This patch restores boots

[gcc r15-1175] i386: PR target/115397: AVX512 ternlog vs. -m32 -fPIC constant pool.

2024-06-11 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:a797398cfbc75899fdb7d97436c0c89c02b133c0 commit r15-1175-ga797398cfbc75899fdb7d97436c0c89c02b133c0 Author: Roger Sayle Date: Tue Jun 11 09:31:34 2024 +0100 i386: PR target/115397: AVX512 ternlog vs. -m32 -fPIC constant pool. This patch fixes PR target/115397,

[gcc r15-1306] i386: More use of m{32, 64}bcst addressing modes with ternlog.

2024-06-13 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:c129a34dc8e69f7b34cf72835aeba2cefbb8673a commit r15-1306-gc129a34dc8e69f7b34cf72835aeba2cefbb8673a Author: Roger Sayle Date: Fri Jun 14 06:29:27 2024 +0100 i386: More use of m{32,64}bcst addressing modes with ternlog. This patch makes more use of m32bcst and

[gcc r15-1502] i386: Allow all register_operand SUBREGs in x86_ternlog_idx.

2024-06-20 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:9a76db24e044c8058497051a652cca4228cbc8e9 commit r15-1502-g9a76db24e044c8058497051a652cca4228cbc8e9 Author: Roger Sayle Date: Thu Jun 20 16:30:15 2024 +0100 i386: Allow all register_operand SUBREGs in x86_ternlog_idx. This patch tweaks ix86_ternlog_idx to allo

[gcc r15-1584] PR tree-optimization/113673: Avoid load merging when potentially trapping.

2024-06-24 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:d8b05aef77443e1d3d8f3f5d2c56ac49a503fee3 commit r15-1584-gd8b05aef77443e1d3d8f3f5d2c56ac49a503fee3 Author: Roger Sayle Date: Mon Jun 24 15:34:03 2024 +0100 PR tree-optimization/113673: Avoid load merging when potentially trapping. This patch fixes PR tree-opt

[gcc r15-7473] Synchronize include/dwarf2.def with binutils

2025-02-11 Thread Roger Sayle via Gcc-cvs
https://gcc.gnu.org/g:0f8fd6b336161ed0582edb08dbe6ea1932290a75 commit r15-7473-g0f8fd6b336161ed0582edb08dbe6ea1932290a75 Author: Roger Sayle Date: Tue Feb 11 12:21:43 2025 + Synchronize include/dwarf2.def with binutils The contents of include/dwarf2.def have diverged between t