[Bug target/59787] [ARM] mmx-2.c causes ICE when GCC is configured for cortex-a5/vfpv3-d16-fp16

2014-01-14 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59787 --- Comment #3 from Vladimir Makarov --- Author: vmakarov Date: Tue Jan 14 19:07:01 2014 New Revision: 206605 URL: http://gcc.gnu.org/viewcvs?rev=206605&root=gcc&view=rev Log: 2014-01-14 Vladimir Makarov PR target/59787 * config/arm/a

[Bug rtl-optimization/59511] [4.9 Regression] FAIL: gcc.target/i386/pr36222-1.c scan-assembler-not movdqa with -mtune=corei7

2014-01-15 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59511 --- Comment #4 from Vladimir Makarov --- Author: vmakarov Date: Wed Jan 15 17:32:47 2014 New Revision: 206636 URL: http://gcc.gnu.org/viewcvs?rev=206636&root=gcc&view=rev Log: 2014-01-15 Vladimir Makarov PR rtl-optimization/59511 * ir

[Bug middle-end/59609] [4.9 Regression] LRA generates bad code for libgcc function udivmoddi4 on thumb1 target

2014-01-15 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59609 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug rtl-optimization/59835] [4.9 Regression] gcc.target/i386/sse-2[34].c timeout

2014-01-16 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59835 --- Comment #6 from Vladimir Makarov --- Author: vmakarov Date: Thu Jan 16 19:04:08 2014 New Revision: 206676 URL: http://gcc.gnu.org/viewcvs?rev=206676&root=gcc&view=rev Log: 2014-01-16 Vladimir Makarov PR rtl-optimization/59835 * ir

[Bug middle-end/59609] [4.9 Regression] LRA generates bad code for libgcc function udivmoddi4 on thumb1 target

2014-01-16 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59609 --- Comment #5 from Vladimir Makarov --- Author: vmakarov Date: Thu Jan 16 19:13:54 2014 New Revision: 206677 URL: http://gcc.gnu.org/viewcvs?rev=206677&root=gcc&view=rev Log: 2014-01-16 Vladimir Makarov PR middle-end/59609 * lra-cons

[Bug rtl-optimization/59858] [4.8/4.9 Regression] ICE: assign_by_spills, at lra-assigns.c:1283

2014-01-21 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59858 --- Comment #2 from Vladimir Makarov --- Author: vmakarov Date: Tue Jan 21 19:15:40 2014 New Revision: 206897 URL: http://gcc.gnu.org/viewcvs?rev=206897&root=gcc&view=rev Log: 2014-01-21 Vladimir Makarov PR rtl-optimization/59858 * lr

[Bug rtl-optimization/59896] [4.9 regression] Bootstrap: Thumb-1 LRA unable to generate reloads for jump_insn

2014-01-21 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59896 --- Comment #2 from Vladimir Makarov --- Author: vmakarov Date: Tue Jan 21 21:26:33 2014 New Revision: 206908 URL: http://gcc.gnu.org/viewcvs?rev=206908&root=gcc&view=rev Log: 2014-01-21 Vladimir Makarov PR rtl-optimization/59896 * lr

[Bug rtl-optimization/59477] [4.8/4.9 Regression] ICE: in assign_by_spills, at lra-assigns.c:1281 with -O

2014-01-22 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59477 --- Comment #8 from Vladimir Makarov --- Author: vmakarov Date: Wed Jan 22 19:38:47 2014 New Revision: 206938 URL: http://gcc.gnu.org/viewcvs?rev=206938&root=gcc&view=rev Log: 2014-01-22 Vladimir Makarov PR rtl-optimization/59477 * lr

[Bug rtl-optimization/59915] [4.9 Regression] LRA ICE - Repeated looping over subreg reloads (gcc.c-torture/compile/simd-3.c)

2014-01-23 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59915 --- Comment #2 from Vladimir Makarov --- Author: vmakarov Date: Thu Jan 23 20:06:28 2014 New Revision: 207007 URL: http://gcc.gnu.org/viewcvs?rev=207007&root=gcc&view=rev Log: 2014-01-23 Vladimir Makarov PR regression/59915 * lra-cons

[Bug bootstrap/59913] [4.9 Regresion] bootstrap failure on arm-linux-gnueabihf

2014-01-24 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59913 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug bootstrap/59985] stage2/3 compare error on lto-streamer-in.o

2014-01-30 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59985 --- Comment #12 from Vladimir Makarov --- (In reply to Jakub Jelinek from comment #11) > --- gcc/lra-constraints.c.jj 2014-01-24 16:27:35.0 +0100 > +++ gcc/lra-constraints.c 2014-01-30 18:10:03.795737809 +0100 > @@ -4049,7 +4049,7 @@

[Bug rtl-optimization/59959] [4.9 Regression] LRA ICEs on a fortran case(Suspected to be similar to pr59915)

2014-01-30 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59959 --- Comment #3 from Vladimir Makarov --- Author: vmakarov Date: Thu Jan 30 21:15:51 2014 New Revision: 207323 URL: http://gcc.gnu.org/viewcvs?rev=207323&root=gcc&view=rev Log: 2014-01-30 Vladimir Makarov PR rtl-optimization/59959 * lr

[Bug bootstrap/59985] stage2/3 compare error on lto-streamer-in.o

2014-01-31 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59985 --- Comment #14 from Vladimir Makarov --- Author: vmakarov Date: Fri Jan 31 23:56:46 2014 New Revision: 207375 URL: http://gcc.gnu.org/viewcvs?rev=207375&root=gcc&view=rev Log: 2014-01-31 Vladimir Makarov PR bootstrap/59985 * lra-cons

[Bug bootstrap/59913] [4.9 Regresion] bootstrap failure on arm-linux-gnueabihf

2014-02-04 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59913 --- Comment #7 from Vladimir Makarov --- Author: vmakarov Date: Tue Feb 4 18:56:59 2014 New Revision: 207485 URL: http://gcc.gnu.org/viewcvs?rev=207485&root=gcc&view=rev Log: 2014-02-04 Vladimir Makarov PR bootstrap/59913 * lra-const

[Bug rtl-optimization/60079] [LRA] ICE when compiling attached case.

2014-02-06 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60079 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug target/49008] A typo code found in genautomata.c

2014-02-11 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49008 --- Comment #1 from Vladimir Makarov --- Author: vmakarov Date: Tue Feb 11 22:00:04 2014 New Revision: 207701 URL: http://gcc.gnu.org/viewcvs?rev=207701&root=gcc&view=rev Log: 2014-02-11 Vladimir Makarov PR target/49008 * genautomata.

[Bug rtl-optimization/59535] [4.9 regression] -Os code size regressions for Thumb1/Thumb2 with LRA

2014-02-14 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59535 --- Comment #16 from Vladimir Makarov --- Author: vmakarov Date: Fri Feb 14 16:18:29 2014 New Revision: 207787 URL: http://gcc.gnu.org/viewcvs?rev=207787&root=gcc&view=rev Log: 2014-02-14 Vladimir Makarov Richard Earnshaw PR rtl

[Bug target/60298] [ARM/Thumb1] ICE caused by LRA for case pr54713-1.c

2014-02-21 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60298 --- Comment #2 from Vladimir Makarov --- Author: vmakarov Date: Fri Feb 21 21:23:48 2014 New Revision: 208023 URL: http://gcc.gnu.org/viewcvs?rev=208023&root=gcc&view=rev Log: 2014-02-21 Vladimir Makarov PR target/60298 * lra-constrai

[Bug rtl-optimization/60317] [4.9 Regression] find_hard_regno_for compile time hog in libvpx

2014-02-25 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60317 --- Comment #5 from Vladimir Makarov --- Author: vmakarov Date: Tue Feb 25 20:34:44 2014 New Revision: 208155 URL: http://gcc.gnu.org/viewcvs?rev=208155&root=gcc&view=rev Log: 2014-02-25 Vladimir Makarov PR rtl-optimization/60317 * pa

[Bug target/59222] [4.9 Regression] gcc.c-torture/compile/20050622-1.c ICEs at -O1 and above for aarch64-elf ILP32

2014-02-27 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59222 --- Comment #5 from Vladimir Makarov --- Author: vmakarov Date: Thu Feb 27 17:06:02 2014 New Revision: 208201 URL: http://gcc.gnu.org/viewcvs?rev=208201&root=gcc&view=rev Log: 2014-02-27 Vladimir Makarov PR target/59222 * lra.c (lra_e

[Bug rtl-optimization/60162] [4.9 Regression][lra] mlra appears to be using the FP registers for integer values and then moving on to GPR registers.

2014-03-06 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60162 --- Comment #4 from Vladimir Makarov --- (In reply to Ramana Radhakrishnan from comment #2) > Created attachment 32120 [details] > Reduced from gzip. > > Command line options. > > -march=armv7-a -mfpu=neon -mfloat-abi=hard -mthumb -O3 -mlra So

[Bug rtl-optimization/57189] [4.9 Regression] Vector register is spilled for vector extract pattern

2014-03-13 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57189 --- Comment #8 from Vladimir Makarov --- Author: vmakarov Date: Thu Mar 13 15:52:50 2014 New Revision: 208549 URL: http://gcc.gnu.org/viewcvs?rev=208549&root=gcc&view=rev Log: 2014-03-13 Vladimir Makarov PR rtl-optimization/57189 * lr

[Bug rtl-optimization/60508] [4.8/4.9 Regression] internal compiler error: in lra_set_insn_recog_data, at lra.c:1082

2014-03-14 Thread vmakarov at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60508 --- Comment #3 from Vladimir Makarov --- Author: vmakarov Date: Fri Mar 14 16:34:57 2014 New Revision: 208570 URL: http://gcc.gnu.org/viewcvs?rev=208570&root=gcc&view=rev Log: 2014-03-14 Vladimir Makarov PR rtl-optimization/60508 * lr

[Bug target/61578] [4.9 regression] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

2015-09-03 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 --- Comment #24 from Vladimir Makarov --- (In reply to Fredrik Hederstierna from comment #23) > Thanks for your patch, I tried it out, and it solves the small example fine, > the code now is similar to GCC 4.8 for this particular example. > > Th

[Bug target/61578] [4.9 regression] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

2015-09-10 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 --- Comment #26 from Vladimir Makarov --- (In reply to Fredrik Hederstierna from comment #23) > > Here's is another small example I tested yesterday that also gives > unnecessary moves, both for arm7tdmi, arm966e-s and cortex-m0 tested. > > ext

[Bug target/61578] [4.9 regression] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

2015-09-24 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 --- Comment #30 from Vladimir Makarov --- (In reply to Dominik Vogt from comment #29) > I think I understand what's going on: > > Consider the patched code in match_reloads(): > > + = (ins[1] < 0 && REG_P (in_rtx) > + && (int) RE

[Bug target/61578] [4.9 regression] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

2015-09-24 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 --- Comment #31 from Vladimir Makarov --- Author: vmakarov Date: Thu Sep 24 20:40:30 2015 New Revision: 228097 URL: https://gcc.gnu.org/viewcvs?rev=228097&root=gcc&view=rev Log: 2015-09-24 Vladimir Makarov PR target/61578 * i

[Bug target/61578] [4.9 regression] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

2015-09-25 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 --- Comment #33 from Vladimir Makarov --- Author: vmakarov Date: Fri Sep 25 21:06:08 2015 New Revision: 228153 URL: https://gcc.gnu.org/viewcvs?rev=228153&root=gcc&view=rev Log: 2015-09-25 Vladimir Makarov PR target/61578 * l

[Bug ipa/66424] [5/6 Regression] wrong code at -O2 and -O3 on x86_64-linux-gnu in 32-bit mode

2015-09-29 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66424 --- Comment #9 from Vladimir Makarov --- Author: vmakarov Date: Tue Sep 29 16:37:26 2015 New Revision: 228256 URL: https://gcc.gnu.org/viewcvs?rev=228256&root=gcc&view=rev Log: 2015-09-29 Vladimir Makarov Backport from mainline

[Bug target/67756] [6 Regression] ICE compiling Linux Kernel fs/namei.c on ARM

2015-10-01 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67756 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug target/67756] [6 Regression] ICE compiling Linux Kernel fs/namei.c on ARM

2015-10-01 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67756 --- Comment #13 from Vladimir Makarov --- (In reply to Bernd Edlinger from comment #11) > I must admit, that I don't know what I am doing here, > ... but this (completely untested) patch seems to fix the ICE: > (and at least my linux kernel compi

[Bug target/67756] [6 Regression] ICE compiling Linux Kernel fs/namei.c on ARM

2015-10-01 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67756 --- Comment #14 from Vladimir Makarov --- (In reply to Bernd Edlinger from comment #5) > > My patch from yesterday makes no difference here, but what's funny is, > that the set register was originally r138 but now the dump says > "set (reg/v:SI

[Bug rtl-optimization/67756] [6 Regression] ICE compiling Linux Kernel fs/namei.c on ARM

2015-10-02 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67756 --- Comment #17 from Vladimir Makarov --- (In reply to Bernd Edlinger from comment #16) > (In reply to Vladimir Makarov from comment #13) > > (In reply to Bernd Edlinger from comment #11) > > > I must admit, that I don't know what I am doing here

[Bug target/67474] [6 regression] tree-vect-loop.c:2759:1: error: insn does not satisfy its constraints breaks ARM bootstrap

2015-10-02 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67474 --- Comment #5 from Vladimir Makarov --- (In reply to ktkachov from comment #4) > I suspect this is the same as PR 67756 I guess so too. I am going to commit a patch today.

[Bug rtl-optimization/67756] [6 Regression] ICE compiling Linux Kernel fs/namei.c on ARM

2015-10-02 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67756 --- Comment #18 from Vladimir Makarov --- Author: vmakarov Date: Fri Oct 2 15:04:59 2015 New Revision: 228396 URL: https://gcc.gnu.org/viewcvs?rev=228396&root=gcc&view=rev Log: 2015-10-02 Vladimir Makarov PR rtl-optimization/67756

[Bug rtl-optimization/67756] [6 Regression] ICE compiling Linux Kernel fs/namei.c on ARM

2015-10-02 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67756 --- Comment #20 from Vladimir Makarov --- (In reply to Bernd Edlinger from comment #19) > ok, but now we have because of the warnings: > > FAIL: gcc.target/arm/pr67756.c (test for excess errors) > > I think something like this could fix it: >

[Bug rtl-optimization/67124] [6 Regression] wrong code at -O1, -O2 and -O3 on x86_64-linux-gnu

2015-10-07 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67124 --- Comment #8 from Vladimir Makarov --- (In reply to rsand...@gcc.gnu.org from comment #6) > (In reply to Uroš Bizjak from comment #5) > > Wrong expansion, adding CC. > > The expand code looks OK to me. Assigning to one DImode word > of a TImo

[Bug rtl-optimization/67124] [6 Regression] wrong code at -O1, -O2 and -O3 on x86_64-linux-gnu

2015-10-07 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67124 --- Comment #9 from Vladimir Makarov --- (In reply to rsand...@gcc.gnu.org from comment #6) > (In reply to Uroš Bizjak from comment #5) > > Wrong expansion, adding CC. > > The expand code looks OK to me. Assigning to one DImode word > of a TImo

[Bug rtl-optimization/67477] [6 Regression] ICE in cselib_record_set, at cselib.c:2388

2015-10-07 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67477 --- Comment #1 from Vladimir Makarov --- (In reply to Ryan Mansfield from comment #0) > Created attachment 36298 [details] > reduced preprocessed source > > $ ./xgcc -v > Using built-in specs. > COLLECT_GCC=./xgcc > Target: arm-unknown-linux-gnu

[Bug target/67383] reload_cse_simplify_operands fails on ARMV7-M

2015-10-08 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67383 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-16 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #8 from Vladimir Makarov --- (In reply to Uroš Bizjak from comment #7) > (In reply to Richard Biener from comment #4) > > (In reply to Uroš Bizjak from comment #3) > > > The doc says: > > > > > > When used as an lvalue, 'su

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-16 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #9 from Vladimir Makarov --- (In reply to Vladimir Makarov from comment #8) > > Why do LRA and reload remove subregs of hard registers? That is because some > subsequent optimizations can handle them. > Sorry, it should be *can not

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-20 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #10 from Vladimir Makarov --- Author: vmakarov Date: Tue Oct 20 16:26:05 2015 New Revision: 229087 URL: https://gcc.gnu.org/viewcvs?rev=229087&root=gcc&view=rev Log: 2015-10-20 Vladimir Makarov PR rtl-optimization/67609

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-20 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #11 from Vladimir Makarov --- I've committed the patch into the trunk. As the patch is not trivial, I'd wait for a week before committing it into gcc-5-branch to see how it is doing on the trunk first.

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-21 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #14 from Vladimir Makarov --- (In reply to Uroš Bizjak from comment #13) > The runtime version of the test still fails: > > > gcc -O2 -pr67609.c > > $ ./a.out > Aborted > > set_lower: > .LFB518: > movdqa reg(%rip), %xmm1

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-21 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #17 from Vladimir Makarov --- (In reply to Jeffrey A. Law from comment #16) > reload has traditionally removed subregs of hardregs and passes after reload > have depended on that behaviour. Doing something similar in lra is > obvious

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-22 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #24 from Vladimir Makarov --- (In reply to Richard Henderson from comment #23) > Created attachment 36563 [details] > possible patch > > Certainly this fixes the executable test case from #c13. This patch could be a solution to gene

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-22 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #25 from Vladimir Makarov --- (In reply to Vladimir Makarov from comment #24) > (In reply to Richard Henderson from comment #23) > > Created attachment 36563 [details] > > possible patch > > > > Certainly this fixes the executable te

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-23 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #27 from Vladimir Makarov --- (In reply to Vladimir Makarov from comment #25) > So it would be nice to benchmark it. I'll try to do this on > Friday. Practically every SPEC2000 benchmark failed to compile with this patch. GCC crash

[Bug rtl-optimization/67609] [5/6 Regression] Generates wrong code for SSE2 _mm_load_pd

2015-10-26 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67609 --- Comment #30 from Vladimir Makarov --- (In reply to Richard Henderson from comment #29) > > > Ho hum. Sorry, Vlad, if I'd bothered bootstrapping I'd have seen this > myself. > Please change != to < in the patch to re-try. (That is, allow th

[Bug rtl-optimization/68106] c-c++-common/torture/builtin-arith-overflow-11.c FAILs with -flra-remat @ aarch64

2015-10-30 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68106 --- Comment #1 from Vladimir Makarov --- (In reply to Zdenek Sojka from comment #0) > Created attachment 36594 [details] > reduced testcase > > The testcase fails at aarch64 at both trunk and 5-branch with -O > -flra-remat. I haven't managed to

[Bug rtl-optimization/68106] c-c++-common/torture/builtin-arith-overflow-11.c FAILs with -flra-remat @ aarch64

2015-10-30 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68106 --- Comment #2 from Vladimir Makarov --- Author: vmakarov Date: Fri Oct 30 17:45:16 2015 New Revision: 229593 URL: https://gcc.gnu.org/viewcvs?rev=229593&root=gcc&view=rev Log: 2015-10-30 Vladimir Makarov PR rtl-optimization/68106

[Bug rtl-optimization/68106] c-c++-common/torture/builtin-arith-overflow-11.c FAILs with -flra-remat @ aarch64

2015-10-30 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68106 --- Comment #3 from Vladimir Makarov --- The problem was in ignoring hard registers explicitly present in machine description insns by LRA rematerialization subpass. I'll wait for a few days before backporting this in gcc-5-branch.

[Bug rtl-optimization/68106] c-c++-common/torture/builtin-arith-overflow-11.c FAILs with -flra-remat @ aarch64

2015-11-06 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68106 --- Comment #4 from Vladimir Makarov --- Author: vmakarov Date: Fri Nov 6 17:33:01 2015 New Revision: 229868 URL: https://gcc.gnu.org/viewcvs?rev=229868&root=gcc&view=rev Log: 2015-11-06 Vladimir Makarov PR rtl-optimization/68106

[Bug rtl-optimization/68173] gcc does not terminate with -O0 on source file with a very large expression

2015-11-18 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68173 --- Comment #7 from Vladimir Makarov --- GCC on trunk is 50 times slower than LLVM-3.7 in -O0 mode on this test. In -O2 mode GCC is only 20% slower than LLVM-3.7 in the same mode and faster than LLVM-3.7 with -O0. About 80% of compile time GCC

[Bug rtl-optimization/68173] gcc takes a long time and a lot of memory with -O0 on source file with very large expression

2015-11-20 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68173 --- Comment #13 from Vladimir Makarov --- (In reply to Richard Biener from comment #12) > callgrind points at bitmap_set_bit called via process_bb_lives -> > mark_regno_dead. > Maybe some code in that (the DCE code?) can be keyed on if (optimize)

[Bug target/68416] [MPX] GCC emits a lot of redundant bndmov instructions

2015-11-24 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68416 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug rtl-optimization/67954] [5 / 6 Regression] internal compiler error: in patch_jump_insn, at cfgrtl.c:1303

2015-11-25 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67954 --- Comment #5 from Vladimir Makarov --- Author: vmakarov Date: Wed Nov 25 17:57:15 2015 New Revision: 230893 URL: https://gcc.gnu.org/viewcvs?rev=230893&root=gcc&view=rev Log: 2015-11-25 Vladimir Makarov PR rtl-optimization/67954

[Bug rtl-optimization/67954] [5 / 6 Regression] internal compiler error: in patch_jump_insn, at cfgrtl.c:1303

2015-11-25 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67954 --- Comment #6 from Vladimir Makarov --- Author: vmakarov Date: Wed Nov 25 17:58:35 2015 New Revision: 230894 URL: https://gcc.gnu.org/viewcvs?rev=230894&root=gcc&view=rev Log: 2015-11-25 Vladimir Makarov PR rtl-optimization/67954

[Bug rtl-optimization/67954] [5 / 6 Regression] internal compiler error: in patch_jump_insn, at cfgrtl.c:1303

2015-11-25 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67954 --- Comment #7 from Vladimir Makarov --- The problem occurred in rare cases when a pseudo created from a scratch was reloaded and assigned to reg and memory back again. The new reload pseudo loses "created from clobber" mark and occurs more on

[Bug rtl-optimization/64110] [5 Regression] ICE: Max. number of generated reload insns per insn is achieved (90)

2015-01-09 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64110 --- Comment #15 from Vladimir Makarov --- (In reply to Jakub Jelinek from comment #14) > (In reply to Vladimir Makarov from comment #13) > > (In reply to Jakub Jelinek from comment #11) > > > Looking at the generated assembly, I see there: > > >

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-13 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 --- Comment #3 from Vladimir Makarov --- I investigated this problem too. IRA in GCC-4.9 allocates memory to the pseudo in insn 2, then the memory slot is reloaded for insn 8. Post-reload optimization changes stack slot by register. GCC-4.8 IR

[Bug rtl-optimization/64110] [5 Regression] ICE: Max. number of generated reload insns per insn is achieved (90)

2015-01-15 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64110 --- Comment #18 from Vladimir Makarov --- Author: vmakarov Date: Thu Jan 15 20:26:19 2015 New Revision: 219683 URL: https://gcc.gnu.org/viewcvs?rev=219683&root=gcc&view=rev Log: 2015-01-15 Vladimir Makarov PR rtl-optimization/64110 *

[Bug target/64477] [4.9/5 Regression] x86 sse unnecessary GPR spill

2015-01-16 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64477 --- Comment #4 from Vladimir Makarov --- It is hard for me to consider the PR RA fault. The pseudo 90 gets memory as its cost 3000 for DIREG (4000 for any general reg) and 2000 for memory. 2: r90:SI=di:SI REG_DEAD di:SI 8: r95:V4S

[Bug rtl-optimization/64671] [5 Regression] s390-linux profiledbootstrap failure

2015-01-19 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64671 --- Comment #2 from Vladimir Makarov --- I started to work on this. The patch will be in the trunk today. Thanks.

[Bug rtl-optimization/64671] [5 Regression] s390-linux profiledbootstrap failure

2015-01-19 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64671 --- Comment #3 from Vladimir Makarov --- Author: vmakarov Date: Mon Jan 19 20:13:35 2015 New Revision: 219857 URL: https://gcc.gnu.org/viewcvs?rev=219857&root=gcc&view=rev Log: 2015-01-19 Vladimir Makarov PR rtl-optimization/64671 *

[Bug tree-optimization/64705] New: Bad code generation of sieve on x86-64 because of too aggressive IV optimizations

2015-01-20 Thread vmakarov at gcc dot gnu.org
: normal Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: vmakarov at gcc dot gnu.org Created attachment 34510 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34510&action=edit preprocessed sieve progr

[Bug tree-optimization/64716] New: Missed vectorization in a hot code of SPEC2000 ammp

2015-01-21 Thread vmakarov at gcc dot gnu.org
: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: vmakarov at gcc dot gnu.org Created attachment 34521 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34521&action=edit Preprocessed rectmm.c from SPEC2000 amp GCC does not vectorize one of the

[Bug tree-optimization/64716] Missed vectorization in a hot code of SPEC2000 ammp

2015-01-21 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64716 --- Comment #1 from Vladimir Makarov --- Created attachment 34523 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34523&action=edit rectmm.c code annotated by gcov to see other hot code parts

[Bug target/64688] [5 Regression] internal compiler error: Max. number of generated reload insns per insn is achieved (90)

2015-01-21 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64688 --- Comment #3 from Vladimir Makarov --- (In reply to Jakub Jelinek from comment #2) > This is while reloading > (define_insn "vec_set_0" > [(set (match_operand:VI4F_128 0 "nonimmediate_operand" > "=Yr,*v,v,v ,x,x,v,Yr ,*x ,x ,m ,m

[Bug rtl-optimization/64317] [5 Regression] Ineffective allocation of PIC base register

2015-01-23 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64317 --- Comment #2 from Vladimir Makarov --- Author: vmakarov Date: Fri Jan 23 20:15:56 2015 New Revision: 220060 URL: https://gcc.gnu.org/viewcvs?rev=220060&root=gcc&view=rev Log: 2015-01-23 Vladimir Makarov PR target/64317 * lra-lives.

[Bug target/64342] [5 Regression] Tests failing when compiled with '-m32 -fpic' after r216154.

2015-01-23 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64342 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug target/64617] [5 Regression] ICE: Max. number of generated reload insns per insn is achieved (90) with -ftree-vectorize -mavx512bw -march=slm

2015-01-30 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64617 --- Comment #3 from Vladimir Makarov --- Author: vmakarov Date: Fri Jan 30 17:47:44 2015 New Revision: 220294 URL: https://gcc.gnu.org/viewcvs?rev=220294&root=gcc&view=rev Log: 2015-01-30 Vladimir Makarov PR target/64617 * lra-constr

[Bug rtl-optimization/64688] [4.9/5 Regression] internal compiler error: Max. number of generated reload insns per insn is achieved (90)

2015-01-30 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64688 --- Comment #13 from Vladimir Makarov --- Author: vmakarov Date: Fri Jan 30 22:22:58 2015 New Revision: 220297 URL: https://gcc.gnu.org/viewcvs?rev=220297&root=gcc&view=rev Log: 2015-01-30 Vladimir Makarov PR target/64688 * lra-const

[Bug rtl-optimization/64688] [4.9 Regression] internal compiler error: Max. number of generated reload insns per insn is achieved (90)

2015-02-04 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64688 --- Comment #18 from Vladimir Makarov --- (In reply to Jeffrey A. Law from comment #17) > > Vlad & Jakub are in the best position to decide if this ought to be > backported. I am agree with Jakub. I'd wait for 2 weeks. Frequently a fix in thi

[Bug rtl-optimization/64907] Suboptimal code (saving rbx on stack in order to save another reg in rbx)

2015-02-04 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64907 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug target/39723] [4.8/4.9/5 Regression][cond-optab] worse code with long long shifts on v850

2015-02-06 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39723 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug rtl-optimization/64317] [5 Regression] Ineffective allocation of PIC base register

2015-02-10 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64317 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug rtl-optimization/64317] [5 Regression] Ineffective allocation of PIC base register

2015-02-12 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64317 --- Comment #9 from Vladimir Makarov --- (In reply to Jeffrey A. Law from comment #7) > Vlad, > > What's the rationale behind the 50% probability cutoff for forming an EBB? > For the purposes of inheritance, ISTM you want the biggest EBBs possi

[Bug rtl-optimization/64317] [5 Regression] Ineffective allocation of PIC base register

2015-02-12 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64317 --- Comment #10 from Vladimir Makarov --- (In reply to Jeffrey A. Law from comment #8) > And for GCC 5, ISTM the question that hasn't been answered, particularly > with regard to the second reproducer is whether or this is a regression for > the

[Bug rtl-optimization/63491] Ice in LRA with simple vector test case on power

2015-02-13 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63491 --- Comment #5 from Vladimir Makarov --- Sorry, I can not reproduce the bug on the today trunk. Probably it was fixed by numerous changes in LRA since Oct.

[Bug target/61397] [4.9/5 regression] FAIL: gcc.target/powerpc/p8vector-ldst.c scan-assembler lxsdx

2015-02-13 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61397 --- Comment #2 from Vladimir Makarov --- Sorry, I have [vmakarov@gcc2-power8 gcc]$ ./xgcc -B./ ../../gcc/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c -O2 -S -mcpu=power8 -mupper-regs-df -mupper-regs-sf -m32 && grep -c lxsdx p8vecto\ r-ldst.s

[Bug target/64172] [4.9/5 Regression] Wrong code with GCC vector extensions on ARM when compiled without NEON

2015-02-13 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64172 --- Comment #13 from Vladimir Makarov --- I've investigated the generated code. The problem is in IRA live-range splitting on the region borders. The pseudo to consider is 157 which contains local_prng.d in the following code void randmemset (

[Bug rtl-optimization/64317] [5 Regression] Ineffective allocation of PIC base register

2015-02-19 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64317 --- Comment #13 from Vladimir Makarov --- (In reply to Jeffrey A. Law from comment #12) > > One of the things I notice is that LRA is generating sequences like: > (insn 581 89 90 6 (set (reg:SI 3 bx [107]) > (mem/c:SI (plus:SI (reg/f:SI

[Bug target/64172] [4.9/5 Regression] Wrong code with GCC vector extensions on ARM when compiled without NEON

2015-02-20 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64172 --- Comment #14 from Vladimir Makarov --- Author: vmakarov Date: Fri Feb 20 18:59:02 2015 New Revision: 220877 URL: https://gcc.gnu.org/viewcvs?rev=220877&root=gcc&view=rev Log: 2015-02-20 Vladimir Makarov PR target/64172 * ira-color

[Bug rtl-optimization/65123] [5 regression] lra remat places insn which breaks data flow

2015-02-20 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65123 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug rtl-optimization/64317] [5 Regression] Ineffective allocation of PIC base register

2015-02-21 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64317 --- Comment #15 from Vladimir Makarov --- (In reply to Jeffrey A. Law from comment #14) > Just trying to help out where I can. It's similar to the round robin use > of reload regs we've had in reload for a while. THe idea was to hopefully > ha

[Bug rtl-optimization/65123] [5 regression] lra remat places insn which breaks data flow

2015-02-24 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65123 --- Comment #2 from Vladimir Makarov --- Author: vmakarov Date: Tue Feb 24 18:11:38 2015 New Revision: 220946 URL: https://gcc.gnu.org/viewcvs?rev=220946&root=gcc&view=rev Log: 2015-02-24 Vladimir Makarov PR rtl-optimization/65123 *

[Bug target/65032] [5 Regression] ICE in reload_combine_note_use, at postreload.c:1556 on i686-linux-gnu

2015-02-27 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65032 --- Comment #8 from Vladimir Makarov --- Author: vmakarov Date: Fri Feb 27 14:15:02 2015 New Revision: 221062 URL: https://gcc.gnu.org/viewcvs?rev=221062&root=gcc&view=rev Log: 2015-02-27 Vladimir Makarov PR target/65032 * lra-remat.

[Bug rtl-optimization/64317] [5 Regression] Ineffective allocation of PIC base register

2015-02-27 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64317 --- Comment #16 from Vladimir Makarov --- Author: vmakarov Date: Fri Feb 27 22:02:05 2015 New Revision: 221070 URL: https://gcc.gnu.org/viewcvs?rev=221070&root=gcc&view=rev Log: 2015-02-27 Vladimir Makarov PR target/64317 * params.de

[Bug target/64342] [5 Regression] Tests failing when compiled with '-m32 -fpic' after r216154.

2015-03-05 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64342 --- Comment #15 from Vladimir Makarov --- Jeff, thanks for the detail analysis. It helped me a lot. I am working on the patch fixing the problem. I hope it will be ready today.

[Bug rtl-optimization/64317] [5 Regression] Ineffective allocation of PIC base register

2015-03-05 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64317 --- Comment #21 from Vladimir Makarov --- (In reply to Jeffrey A. Law from comment #17) > Thanks Vlad, that patch helped. Prior to your patch we had 15 reloads of > the PIC register from memory, after your patch we have just 9. However, > seve

[Bug target/64342] [5 Regression] Tests failing when compiled with '-m32 -fpic' after r216154.

2015-03-05 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64342 --- Comment #16 from Vladimir Makarov --- Author: vmakarov Date: Thu Mar 5 19:43:11 2015 New Revision: 221223 URL: https://gcc.gnu.org/viewcvs?rev=221223&root=gcc&view=rev Log: 2015-03-05 Vladimir Makarov PR target/64342 * lra-assig

[Bug rtl-optimization/65135] [5 Regression] Performance regression in pic mode after r220674.

2015-03-06 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65135 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

[Bug target/62308] A bug with aarch64 big-endian

2014-10-14 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62308 --- Comment #8 from Vladimir Makarov --- (In reply to Venkataramanan from comment #7) > Where reload gets > > (set (reg:DI 0 x0 [76]) (reg:DI 1 x1 [ args+8 ])) > (set (reg:TI 0 x0 [74]) (reg:TI -1 [+-8 ]) > > Looks same issue to me. > > Vla

[Bug rtl-optimization/63448] [4.9/5 Regression] ICE when compiling atlas 3.10.2

2014-10-15 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63448 --- Comment #8 from Vladimir Makarov --- I already saw such problem. It is chain of spills and reassignment of non-reload pseudos. Each pass considers only 1-2 pseudos and very few insns. We just need 2 more passes to finish RA for the test.

[Bug rtl-optimization/63448] [4.9/5 Regression] ICE when compiling atlas 3.10.2

2014-10-15 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63448 --- Comment #9 from Vladimir Makarov --- Author: vmakarov Date: Wed Oct 15 15:48:33 2014 New Revision: 216270 URL: https://gcc.gnu.org/viewcvs?rev=216270&root=gcc&view=rev Log: 2014-10-15 Vladimir Makarov PR rtl-optimization/63448 *

[Bug rtl-optimization/63448] [4.9/5 Regression] ICE when compiling atlas 3.10.2

2014-10-15 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63448 --- Comment #10 from Vladimir Makarov --- Author: vmakarov Date: Wed Oct 15 15:51:07 2014 New Revision: 216271 URL: https://gcc.gnu.org/viewcvs?rev=216271&root=gcc&view=rev Log: 2014-10-15 Vladimir Makarov PR rtl-optimization/63448 *

[Bug target/63534] [5 Regression] Bootstrap failure on x86_64/i686-linux

2014-10-15 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63534 --- Comment #11 from Vladimir Makarov --- (In reply to Stupachenko Evgeny from comment #10) > > Sounds reasonable. I also don't like 2 set_got one-by-one. However, we > should ask Vladimir on how we can force RA allocate pseudo GOT on %ebx. I >

[Bug rtl-optimization/63620] RELOAD lost SET_GOT dependency on Darwin

2014-10-30 Thread vmakarov at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63620 Vladimir Makarov changed: What|Removed |Added CC||vmakarov at gcc dot gnu.org

<    1   2   3   4   5   6   7   8   9   10   >