[Bug bootstrap/50879] New: ICE in sf_fabs.c while bootstrap on PowerPC

2011-10-26 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50879 Bug #: 50879 Summary: ICE in sf_fabs.c while bootstrap on PowerPC Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priori

[Bug testsuite/47013] FAIL: gcc.dg/sms-*.c scan-rtl-dump-times sms "SMS succeeded" *

2011-11-23 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47013 --- Comment #11 from revital.eres at linaro dot org 2011-11-23 18:59:34 UTC --- (In reply to comment #10) > any progress on resolving this .. or any more input needed? I will revisit this. Thanks for the ping.

[Bug bootstrap/49789] Bootstrap failure with SMS flags on ARM

2011-12-16 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49789 --- Comment #2 from revital.eres at linaro dot org 2011-12-16 09:24:27 UTC --- (In reply to comment #1) > Is this still an issue? Yes, it still fails with -r182398.

[Bug target/48336] New: Error in generation of ARM ldrd instruction

2011-03-29 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48336 Summary: Error in generation of ARM ldrd instruction Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unass

[Bug target/48336] Error in generation of ARM ldrd instruction

2011-03-29 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48336 --- Comment #1 from revital.eres at linaro dot org 2011-03-29 15:43:41 UTC --- Created attachment 23803 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23803 A testcase based on simple-object-elf.c Here is the command line for running: /h

[Bug target/48336] Error in generation of ARM ldrd instruction

2011-03-30 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48336 --- Comment #4 from revital.eres at linaro dot org 2011-03-30 11:20:50 UTC --- (In reply to comment #3) > Assumed fixed. Yes. The build passes OK in -r171716.

[Bug target/48380] New: ICE in postreload.c while building trunk

2011-03-30 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48380 Summary: ICE in postreload.c while building trunk Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassig.

[Bug target/48380] ICE in postreload.c while building trunk

2011-03-31 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48380 --- Comment #1 from revital.eres at linaro dot org 2011-03-31 08:38:40 UTC --- Created attachment 23834 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23834 Test inspired from libgcov.c Command to run the test on ARM machine: /home/revit

[Bug bootstrap/48415] New: GC Warning: Repeated allocation of very large block

2011-04-02 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48415 Summary: GC Warning: Repeated allocation of very large block Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: bootstrap Assign

[Bug bootstrap/48403] [4.7 Regression] bootstrap comparison failure

2011-04-03 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48403 revital.eres at linaro dot org changed: What|Removed |Added CC||revital.eres at linaro

[Bug bootstrap/48403] [4.7 Regression] bootstrap comparison failure

2011-04-03 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48403 --- Comment #23 from revital.eres at linaro dot org 2011-04-03 18:01:23 UTC --- (In reply to comment #22) > (In reply to comment #0) > > On Linux/x86, revision 171845 failed to bootstrap: > There is bootsrap failure also on powerpc6

[Bug testsuite/47013] FAIL: gcc.dg/sms-*.c scan-rtl-dump-times sms "SMS succeeded" *

2011-06-05 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47013 revital.eres at linaro dot org changed: What|Removed |Added CC||revital.eres at linaro

[Bug bootstrap/49344] New: ICE in tree-flow-inline.h:745 while bootstrap

2011-06-09 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49344 Summary: ICE in tree-flow-inline.h:745 while bootstrap Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: bootstrap AssignedTo:

[Bug target/49385] New: Invalid RTL intstruction for ARM

2011-06-12 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385 Summary: Invalid RTL intstruction for ARM Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassig...@gcc.g

[Bug target/49385] Invalid RTL intstruction for ARM

2011-06-13 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385 --- Comment #2 from revital.eres at linaro dot org 2011-06-13 11:26:44 UTC --- (In reply to comment #1) > I get no ICE on this with 4.7 r174986, even with --enable-checking, and the > assembler doesn't complain about the generated code

[Bug target/49385] Invalid RTL intstruction for ARM

2011-06-15 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49385 --- Comment #3 from revital.eres at linaro dot org 2011-06-15 11:26:32 UTC --- (In reply to comment #0) > Created attachment 24504 [details] > The test to reproduce the RTL instruction. > I see the following invalid mem to mem RTL instr

[Bug tree-optimization/49695] New: conditional moves for stores

2011-07-10 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49695 Summary: conditional moves for stores Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: tree-optimization AssignedTo: unassig..

[Bug tree-optimization/49695] conditional moves for stores

2011-07-10 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49695 --- Comment #1 from revital.eres at linaro dot org 2011-07-10 10:05:07 UTC --- Created attachment 24730 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=24730 Testcase which contains the loop

[Bug tree-optimization/49695] conditional moves for stores

2011-07-10 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49695 --- Comment #2 from revital.eres at linaro dot org 2011-07-10 12:50:31 UTC --- (In reply to comment #0) > for (i = 0; i < point1->len; i++) > { > if (point1->arr[i].val) > { > point1->arr[i]

[Bug tree-optimization/49695] conditional moves for stores

2011-07-10 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49695 --- Comment #3 from revital.eres at linaro dot org 2011-07-10 13:41:07 UTC --- > > the memory location we write to. > hmmm... after reading Sebastian Pop's paper from the last summit ("Improving > GCC’s auto-vectorization

[Bug target/49713] New: Conflicting types for 'arm_dbx_register_number'

2011-07-12 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49713 Summary: Conflicting types for 'arm_dbx_register_number' Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: u

[Bug bootstrap/49789] New: Bootstrap failure with SMS flags on ARM

2011-07-19 Thread revital.eres at linaro dot org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49789 Summary: Bootstrap failure with SMS flags on ARM Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: bootstrap AssignedTo: unassi