[Bug lto/63607] run fail with -flto -mfloat-abi=softfp for armeb-linux-gnueabi-gcc

2015-01-16 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63607 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/63250] Complex fp16 arithmetic uses nonexistent libgcc functions

2015-01-16 Thread ramana at gcc dot gnu.org
||2015-01-16 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- (In reply to Joseph S. Myers from comment #1) > Author: jsm28 > Date: Tue Sep 23 00:48:4

[Bug web/62211] ./configure --with-float= and ARM

2015-01-16 Thread ramana at gcc dot gnu.org
|UNCONFIRMED |NEW Last reconfirmed||2015-01-16 CC||ramana at gcc dot gnu.org Target Milestone|--- |5.0 Ever confirmed|0 |1

[Bug middle-end/57748] [4.8 Regression] ICE when expanding assignment to unaligned zero-sized array

2015-01-16 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57748 Ramana Radhakrishnan changed: What|Removed |Added Known to work||4.9.0 Known to fail|4.9.0

[Bug target/64532] [4.9/5 Regression] internal compiler error: Max. number of generated reload insns per insn is achieved (90)

2015-01-19 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64532 Ramana Radhakrishnan changed: What|Removed |Added Keywords|ra |documentation Component|

[Bug target/64532] [4.9/5 Regression] internal compiler error: Max. number of generated reload insns per insn is achieved (90)

2015-01-19 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64532 --- Comment #8 from Ramana Radhakrishnan --- Author: ramana Date: Mon Jan 19 14:55:28 2015 New Revision: 219847 URL: https://gcc.gnu.org/viewcvs?rev=219847&root=gcc&view=rev Log: Improve documentation of register constraints. While looking at P

[Bug target/64532] [4.9/5 Regression] internal compiler error: Max. number of generated reload insns per insn is achieved (90)

2015-01-19 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64532 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/64532] [4.9/5 Regression] internal compiler error: Max. number of generated reload insns per insn is achieved (90)

2015-01-20 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64532 --- Comment #11 from Ramana Radhakrishnan --- (In reply to baoshan from comment #10) > I have a second thought: > As the 'y' is declared as float, should GCC infer the register is a single > float register even the constraint is 'w' ? I don't kn

[Bug target/63408] [4.8/4.9/5 regression] GCC emits incorrect fixed->fp conversion instruction on Cortex-M4 target

2015-01-20 Thread ramana at gcc dot gnu.org
|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org --- Comment #6 from Ramana Radhakrishnan --- Mine.

[Bug libstdc++/64735] std::future broken on armel

2015-01-23 Thread ramana at gcc dot gnu.org
||2015-01-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 Known to fail||4.9.0, 4.9.1, 4.9.2, 5.0 --- Comment #1 from Ramana Radhakrishnan --- Confirmed with -march

[Bug target/58489] ICE: in reload_cse_simplify_operands, at postreload.c:411

2015-01-23 Thread ramana at gcc dot gnu.org
||2015-01-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Ramana Radhakrishnan --- (In reply to Timo Teräs from comment #2) > I got this fixed. It seems genautomata does

[Bug target/58486] insufficient CFI generated for call-saved VFP registers

2015-01-23 Thread ramana at gcc dot gnu.org
||2015-01-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1

[Bug c++/64735] std::future broken on armel

2015-01-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64735 Ramana Radhakrishnan changed: What|Removed |Added Component|libstdc++ |c++ --- Comment #4 from Ramana Ra

[Bug target/64231] [5 Regression] SIGSEGV building glibc on aarch64-linux-gnu from r217852

2015-01-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64231 Ramana Radhakrishnan changed: What|Removed |Added Status|WAITING |NEW

[Bug rtl-optimization/57462] ira-costs considers only a single register at a time

2015-01-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57462 Ramana Radhakrishnan changed: What|Removed |Added Target|arm |arm, aarch64 Status|U

[Bug tree-optimization/56139] unmodified static data could go in .rodata, not .data

2015-01-23 Thread ramana at gcc dot gnu.org
||2015-01-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 Known to fail||4.9.0, 5.0 --- Comment #1 from Ramana Radhakrishnan --- If it worked in 4.6 then this is a

[Bug testsuite/62286] [ARM] 4.9 Regression fails for cortex-m3 for vfp-1.c: fmacs, fmscs, fnmacs, fnmscs

2015-01-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62286 --- Comment #3 from Ramana Radhakrishnan --- (In reply to ktkachov from comment #2) > (In reply to Ramana Radhakrishnan from comment #1) > > Because the Cortex-M3 doesn't have those instructions ? It's a testism > > probably fixed by an appropria

[Bug inline-asm/64681] Document print modifiers for ARM

2015-01-26 Thread ramana at gcc dot gnu.org
||arm* Status|UNCONFIRMED |NEW Last reconfirmed||2015-01-26 CC||ramana at gcc dot gnu.org Summary|gcc assign wrong register |Document print modifiers

[Bug tree-optimization/62173] [5.0 regression] 64bit Arch can't ivopt while 32bit Arch can

2015-01-26 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 --- Comment #19 from Ramana Radhakrishnan --- (In reply to Richard Biener from comment #18) > It's probably not correct to simply transfer range info from *idx to > iv->base. > Instead SCEV analysis needs to track the range of CHREC_LEFT when it

[Bug jit/64810] jit not working on armv7hl ("ld: error: /tmp/libgccjit-ZGemdr/fake.so uses VFP register arguments, /tmp/ccJFCBsE.o does not")

2015-01-27 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64810 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug rtl-optimization/64537] Aarch64 redundant sxth instruction gets generated

2015-01-28 Thread ramana at gcc dot gnu.org
||2015-01-28 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #6 from Ramana Radhakrishnan --- (In reply to kugan from comment #5) > Is this sort of multiple-use potential candidate for

[Bug rtl-optimization/64916] [5.0 regression] ira.c update_equiv_regs patch causes gcc/testsuite/gcc.target/arm/pr43920-2.c regression

2015-02-03 Thread ramana at gcc dot gnu.org
CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 Summary|ira.c update_equiv_regs |[5.0 regression] ira.c |patch causes|update_equiv_regs patch |gcc/testsuite

[Bug rtl-optimization/64921] [4.9/5 Regression] FAIL: gfortran.dg/class_allocate_18.f90

2015-02-03 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64921 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug debug/64942] FAIL: pr43077-1.c and pr43051-1.c

2015-02-04 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64942 Ramana Radhakrishnan changed: What|Removed |Added Keywords||wrong-debug Status|UN

[Bug target/65031] [5 Regression] ICE (segfault) on arm-linux-gnueabihf

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65031 --- Comment #2 from Ramana Radhakrishnan --- Appears to work with r220637. Checking if dup of PR65003.

[Bug target/65030] [5 Regression] ICE (RTL flag check) on arm-linux-gnueabihf

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65030 --- Comment #2 from Ramana Radhakrishnan --- Works with r220637 - may well be a dup of PR65003. Checking.

[Bug target/65036] [5 Regression] ICE (RTL flag check) on arm-linux-gnueabihf

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65036 --- Comment #2 from Ramana Radhakrishnan --- May well be - works with r220637

[Bug target/65035] [5 Regression] ICE (segfault) on arm-linux-gnueabihf

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65035 --- Comment #2 from Ramana Radhakrishnan --- Works with r220637 - may well be

[Bug target/65036] [5 Regression] ICE (RTL flag check) on arm-linux-gnueabihf

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65036 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug middle-end/65003] [5 Regression] -fsection-anchors ICE

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65003 Ramana Radhakrishnan changed: What|Removed |Added CC||doko at gcc dot gnu.org --- Comme

[Bug target/65035] [5 Regression] ICE (segfault) on arm-linux-gnueabihf

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65035 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug middle-end/65003] [5 Regression] -fsection-anchors ICE

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65003 --- Comment #6 from Ramana Radhakrishnan --- *** Bug 65035 has been marked as a duplicate of this bug. ***

[Bug middle-end/65003] [5 Regression] -fsection-anchors ICE

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65003 --- Comment #7 from Ramana Radhakrishnan --- *** Bug 65030 has been marked as a duplicate of this bug. ***

[Bug target/65030] [5 Regression] ICE (RTL flag check) on arm-linux-gnueabihf

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65030 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/65031] [5 Regression] ICE (segfault) on arm-linux-gnueabihf

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65031 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug middle-end/65003] [5 Regression] -fsection-anchors ICE

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65003 --- Comment #8 from Ramana Radhakrishnan --- *** Bug 65031 has been marked as a duplicate of this bug. ***

[Bug lto/63607] run fail with -flto -mfloat-abi=softfp for armeb-linux-gnueabi-gcc

2015-02-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63607 Ramana Radhakrishnan changed: What|Removed |Added Priority|P3 |P4 Status|UNCONFIRMED

[Bug target/65121] [5 regression] long_call attribute broken weak symbol arm*

2015-02-19 Thread ramana at gcc dot gnu.org
|UNCONFIRMED |NEW Last reconfirmed||2015-02-19 CC||ramana at gcc dot gnu.org Component|regression |target Summary|long_call attribute broken |[5 regression] long_call

[Bug c++/65284] [5 Regression] C++ lambda and auto return value causes ICE or gimple error

2015-03-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65284 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug target/65121] [5 regression] long_call attribute broken weak symbol arm*

2015-03-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65121 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/65121] [5 regression] long_call attribute broken weak symbol arm*

2015-03-09 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65121 --- Comment #5 from Ramana Radhakrishnan --- Author: ramana Date: Mon Mar 9 15:19:20 2015 New Revision: 221282 URL: https://gcc.gnu.org/viewcvs?rev=221282&root=gcc&view=rev Log: Fix PR number for 65121 in Changelog. PR target/65121 The commit

[Bug target/63503] [AArch64] A57 executes fused multiply-add poorly in some situations

2014-10-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63503 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |WAITING Last reconfirmed|

[Bug target/63521] New: The AArch64 backend doesn't define REG_ALLOC_ORDER.

2014-10-13 Thread ramana at gcc dot gnu.org
y: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Andrew Pinski reported that we have not defined REG_ALLOC_ORDER for the AArch64 backend. It would be useful during spill cost computations for this to be defined appropriately

[Bug target/63521] The AArch64 backend doesn't define REG_ALLOC_ORDER.

2014-10-13 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63521 Ramana Radhakrishnan changed: What|Removed |Added Keywords||missed-optimization T

[Bug target/63521] The AArch64 backend doesn't define REG_ALLOC_ORDER.

2014-10-13 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63521 --- Comment #1 from Ramana Radhakrishnan --- This corresponds to ticket 4402 in the ARM database.

[Bug target/63442] [AArch64] ICE with ubsan/overflow-int128.c test

2014-10-14 Thread ramana at gcc dot gnu.org
Target||aarch64-linux-gnu Status|UNCONFIRMED |NEW Last reconfirmed||2014-10-14 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1

[Bug target/63173] performance problem with simd intrinsics vld2_dup_* on aarch64-none-elf

2014-10-20 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63173 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/59799] aarch64_pass_by_reference never passes arrays by value, contrary to ABI documentation

2014-10-27 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |5.0 --- Comment #10 from Ramana Radhakrishnan --- This is fixed for 5.0 - we aren't taking ABI changes back into release branches AFAIK.

[Bug tree-optimization/61114] Scalar evolution hides a big-endian const-folding bug.

2014-10-28 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |5.0 --- Comment #11 from Ramana Radhakrishnan --- Resolved then ?

[Bug target/61997] cc1plus ICE with aarch64 target using PCH and builtin functions

2014-10-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61997 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/61915] [AArch64] High amounts of GP to FP register moves using LRA on AArch64 - Improve Generic register_move_cost and memory_move_cost

2014-10-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61915 Ramana Radhakrishnan changed: What|Removed |Added Summary|[AArch64] High amounts of |[AArch64] High amounts of

[Bug target/61749] arm_neon.h "_lane" and "_n" intrinsics can cause ICEs

2014-10-28 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Known to fail|4.10.0 |5.0 --- Comment #6 from Ramana Radhakrishnan --- Fixed on trunk.

[Bug middle-end/59448] Code generation doesn't respect C11 address-dependency

2014-10-28 Thread ramana at gcc dot gnu.org
||2014-10-28 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #14 from Ramana Radhakrishnan --- This appears to have now morphed into a standards issue and possibly affects all targets that

[Bug target/61714] configure --with-arch and --with-cpu are ignored on aarch64

2014-10-28 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |5.0 --- Comment #2 from Ramana Radhakrishnan --- Fixed on trunk unless you intend to backport the fix.

[Bug target/63173] performance problem with simd intrinsics vld2_dup_* on aarch64-none-elf

2014-10-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63173 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/63293] [AArch64] can read from deallocated stack

2014-10-28 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Target Milestone|--- |5.0

[Bug target/61915] [AArch64] High amounts of GP to FP register moves using LRA on AArch64 - Improve Generic register_move_cost and memory_move_cost

2014-10-28 Thread ramana at gcc dot gnu.org
|ramana at gcc dot gnu.org |wdijkstr at arm dot com Target Milestone|--- |5.0

[Bug middle-end/62178] [5.0 regression] [AArch64] Performance regression on matrix matrix multiply due to r211211

2014-10-28 Thread ramana at gcc dot gnu.org
Status|UNCONFIRMED |NEW Last reconfirmed||2014-10-28 CC||ramana at gcc dot gnu.org Target Milestone|--- |5.0 Summary|[AArch64] Performance |[5.0 regression

[Bug target/63663] [NEON] wrong value when computing the leading zero of int16x4_t type at O2

2014-10-28 Thread ramana at gcc dot gnu.org
||, ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- Patch being discussed here. https://gcc.gnu.org/ml/gcc-patches/2014-10/msg00731.html

[Bug tree-optimization/63574] [5 Regression] ICE building libjava (segfault) on arm-linux-gnueabihf

2014-10-28 Thread ramana at gcc dot gnu.org
Status|UNCONFIRMED |NEW Last reconfirmed||2014-10-28 CC||ramana at gcc dot gnu.org Component|bootstrap |tree-optimization Ever confirmed|0 |1

[Bug tree-optimization/63530] GCC generates incorrect aligned store on ARM after the loop is unrolled.

2014-10-28 Thread ramana at gcc dot gnu.org
|UNCONFIRMED |RESOLVED CC||ramana at gcc dot gnu.org Version|5.0 |4.9.0 Resolution|--- |FIXED Target Milestone|--- |4.9.2 Known to fail

[Bug testsuite/62286] [ARM] 4.9 Regression fails for cortex-m3 for vfp-1.c: fmacs, fmscs, fnmacs, fnmscs

2014-10-28 Thread ramana at gcc dot gnu.org
||2014-10-28 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- Because the Cortex-M3 doesn't have those instructions ? It's a testism probably f

[Bug rtl-optimization/63210] ira does not select the best register compared with gcc 4.8 for ARM THUMB1

2014-10-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63210 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/60882] [ARM] Execution fail on spec2K/197.parser

2014-10-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60882 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/61153] [ARM] vbic vorn tests fail

2014-10-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61153 --- Comment #10 from Ramana Radhakrishnan --- (In reply to Bernd Edlinger from comment #9) > Hi, these tests are still failing. > what are we gonna do about it? I am happy for a patch to delete them. Ramana

[Bug target/61153] [ARM] vbic vorn tests fail

2014-10-28 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61153 --- Comment #12 from Ramana Radhakrishnan --- (In reply to christophe.lyon from comment #11) > (In reply to Ramana Radhakrishnan from comment #10) > > (In reply to Bernd Edlinger from comment #9) > > > Hi, these tests are still failing. > > > wha

[Bug rtl-optimization/63210] ira does not select the best register compared with gcc 4.8 for ARM THUMB1

2014-10-29 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63210 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/63724] New: [AArch64] Inefficient immediate expansion and hoisting.

2014-11-03 Thread ramana at gcc dot gnu.org
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org For some cases like hmmer in SPEC2k6 we currently generate pretty rubbish code with AArch64. float P7Viterbi(int **mmx, int L, int M, int **imx, int **dmx) { int

[Bug target/63724] [AArch64] Inefficient immediate expansion and hoisting.

2014-11-03 Thread ramana at gcc dot gnu.org
Target||aarch64-linux-gnu Status|UNCONFIRMED |ASSIGNED Last reconfirmed||2014-11-03 Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org Target Milestone

[Bug libstdc++/53579] libstdc++ configure atomicity tests use CXXFLAGS instead of CXXFLAGS_FOR_TARGET

2014-11-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53579 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/63762] [ARM]GCC generates UNPREDICTABLE STR with Rn = Rt when hard-float abi is used

2014-11-10 Thread ramana at gcc dot gnu.org
|UNCONFIRMED |ASSIGNED Last reconfirmed||2014-11-10 CC||ramana at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |renlin.li at arm dot com Target Milestone

[Bug target/63762] [ARM]GCC generates UNPREDICTABLE STR with Rn = Rt when hard-float abi is used

2014-11-13 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63762 --- Comment #4 from Ramana Radhakrishnan --- (In reply to Renlin Li from comment #2) > r278 is derived from r224 which is a VFP_LO_REGS. > > find_cost_and_classes assigns r278's class as GENERAL_REGS, and assign it > hard_reg 2. Another new pseu

[Bug rtl-optimization/63365] [ARM] Incorrect copy propagation for vclz intrinsic

2014-11-13 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63365 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488

2014-11-14 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |ASSIGNED Target Milestone|---

[Bug target/63724] [AArch64] Inefficient immediate expansion and hoisting.

2014-11-14 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63724 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/63724] [AArch64] Inefficient immediate expansion and hoisting.

2014-11-14 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63724 --- Comment #3 from Ramana Radhakrishnan --- Author: ramana Revision: 217546 Modified property: svn:log Modified: svn:log at Fri Nov 14 11:03:00 2014 -- --- svn:log (ori

[Bug target/63874] vtable address generation goes through memory

2014-11-17 Thread ramana at gcc dot gnu.org
||2014-11-17 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1

[Bug c++/63936] [5.0 regression] ICE: libstdc++-v3/include/chrono:725:66: internal compiler error: in adjust_temp_type, at cp/constexpr.c:1020

2014-11-18 Thread ramana at gcc dot gnu.org
||2014-11-18 CC||ramana at gcc dot gnu.org Summary|ICE:|[5.0 regression] ICE: |libstdc++-v3/include/chrono |libstdc++-v3/include/chrono |:725:66: internal compiler

[Bug target/61411] [NEON] ICE in reload_cse_simplify_operands, at postreload.c:411

2014-11-18 Thread ramana at gcc dot gnu.org
CC||ramana at gcc dot gnu.org --- Comment #4 from Ramana Radhakrishnan --- Seems to have gone latent again with latest 4.9 tip of tree . the testcase doesn't build with tip of trunk ?

[Bug target/60882] [ARM] Execution fail on spec2K/197.parser

2014-11-18 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60882 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |WAITING Last reconfirmed|

[Bug middle-end/61529] [5 Regression] ICE on valid code at -O3 on x86_64-linux-gnu in check_probability, at basic-block.h:953

2014-11-18 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED --- Comment #12 from Ramana Radhakrishnan --- Fixed presumably.

[Bug target/59593] [arm big-endian] using "ldrh" access a immediate which stored in a memory by word

2014-11-20 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59593 --- Comment #4 from Ramana Radhakrishnan --- Author: ramana Date: Thu Nov 20 08:38:34 2014 New Revision: 217826 URL: https://gcc.gnu.org/viewcvs?rev=217826&root=gcc&view=rev Log: Fix missing output formatter. 2014-11-20 Ramana Radhakrishnan

[Bug target/63424] [4.9 regression] Octave -O3 build: internal compiler error: in prepare_cmp_insn, at optabs.c:4237

2014-11-27 Thread ramana at gcc dot gnu.org
||2014-11-27 CC||ramana at gcc dot gnu.org Known to work||4.8.3 Version|5.0 |4.9.0 Assignee|unassigned at gcc dot gnu.org |renlin.li at arm dot

[Bug target/63634] Compiler generated R_AARCH64_TLSLE_ADD_TPREL_HI12/LO12 pair overflowed by large TP offset

2014-11-27 Thread ramana at gcc dot gnu.org
||2014-11-27 CC||ramana at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |renlin.li at arm dot com Ever confirmed|0 |1

[Bug middle-end/62178] [5.0 regression] [AArch64] Performance regression on matrix matrix multiply due to r211211

2014-11-27 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62178 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug target/64009] ICE when compiling pr48335-2.c with armeb-linux-gnueabi-gcc

2014-11-27 Thread ramana at gcc dot gnu.org
Status|UNCONFIRMED |NEW Last reconfirmed||2014-11-27 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 Known to fail||5.0

[Bug target/64011] Fail to compile pr48335-2.c on big-endian aarch64

2014-11-27 Thread ramana at gcc dot gnu.org
Status|UNCONFIRMED |NEW Last reconfirmed||2014-11-27 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 Known to fail||5.0

[Bug target/63870] [Aarch64] [ARM] Errors in use of NEON intrinsics are reported incorrectly

2014-11-27 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63870 Ramana Radhakrishnan changed: What|Removed |Added Keywords||diagnostic Status|UNC

[Bug target/64240] [5.0 Regression][AArch64] SMS-3.c causes runtime exception(segfault).

2014-12-11 Thread ramana at gcc dot gnu.org
||2014-12-11 CC||fyang at gcc dot gnu.org, ||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- Please assign this to

[Bug target/58623] lack of ldp/stp optimization

2014-12-11 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58623 --- Comment #4 from Ramana Radhakrishnan --- (In reply to bin.cheng from comment #3) > Patch sent at https://gcc.gnu.org/ml/gcc-patches/2014-11/msg02209.html > On latest trunk, the patch generates below assembly for the example: > > .cpu g

[Bug target/64154] enable fipa-ra for Thumb1

2014-12-12 Thread ramana at gcc dot gnu.org
||2014-12-12 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1

[Bug bootstrap/63740] [4.9 Regression] GCC 4.9.2 bootstrap fails on ARM, haifa-sched.c:6507:1: internal compiler error: in lra_create

2014-12-12 Thread ramana at gcc dot gnu.org
, ||ramana at gcc dot gnu.org --- Comment #10 from Ramana Radhakrishnan --- Useful to CC the original author :)

[Bug target/61578] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

2014-12-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 --- Comment #12 from Ramana Radhakrishnan --- (In reply to Fredrik Hederstierna from comment #9) > Created attachment 33866 [details] > Simple patch to exclude use of ip > > Simple patch that make it possible to optionally exclude use of ip for

[Bug target/61373] neon registers restored incorrectly with -mapcs-frame -O -fno-omit-frame-pointer

2014-12-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61373 --- Comment #3 from Ramana Radhakrishnan --- (In reply to John Breitenbach from comment #2) > Created attachment 33301 [details] > siphash24.i > > sorry for forgetting this attachment in the original report. mapcs-frame comes from a time when N

[Bug c++/60691] Build fails in libstdc++ with --enable-sjlj-exceptions on ARM

2014-12-12 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |WONTFIX --- Comment #5 from Ramana Radhakrishnan --- (In reply to Fabian Vogt from comment #4) > (In reply to Andrew Pinski from comment #3) > > (In reply to Fabian Vogt from comment #2)

[Bug bootstrap/60632] ICE in regcprop.c (copyprop_hardreg_forward_1)

2014-12-12 Thread ramana at gcc dot gnu.org
||2014-12-12 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- missing testcase

[Bug c++/60691] Build fails in libstdc++ with --enable-sjlj-exceptions on ARM

2014-12-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60691 --- Comment #8 from Ramana Radhakrishnan --- (In reply to Fabian Vogt from comment #6) > If sjlj exceptions are not supported for ARM, shouldn't the configure option > be invalid for ARM or at least print a warning? > If an option does exist and

[Bug sanitizer/61771] Test failures in ASan testsuite on ARM Linux due to FP format mismatch between libasan and GCC.

2014-07-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61771 --- Comment #7 from Ramana Radhakrishnan --- (In reply to Evgeniy Stepanov from comment #3) > Yes, FP on ARM is non-standard and differs in GCC and Clang implementations. > Disabling fast unwind is not really an option, as you are looking at 10x,

[Bug target/58623] lack of ldp/stp optimization

2014-07-24 Thread ramana at gcc dot gnu.org
|ASSIGNED CC||ramana at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |amker at gcc dot gnu.org --- Comment #2 from Ramana Radhakrishnan --- Bin Cheng has been working on this specifically around putting

[Bug target/55701] Inline some instances of memset for ARM

2014-07-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55701 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #5 from Rama

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