http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43999
Michael K. Edwards changed:
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48126
Summary: arm_output_sync_loop: misplaced memory barrier,
missing clrex / dummy strex
Product: gcc
Version: 4.5.2
Status: UNCONFIRMED
Severity: normal
Priority: P3
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48126
--- Comment #2 from Michael K. Edwards
2011-03-17 18:14:11 UTC ---
Please insert the text of your citations, since the ARM ARM is not a public
document.
I think I'm persuaded that the CLREX isn't necessary -- although I'm going to
keep it in my
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48126
--- Comment #4 from Michael K. Edwards
2011-05-24 16:38:41 UTC ---
OK, that's a clear explanation of why the DMB is necessary in the case where
both the compare and the store succeed (neither branch is taken; at a higher
semantic level, a lock is
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48308
Michael K. Edwards changed:
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48126
--- Comment #6 from Michael K. Edwards
2011-06-22 19:00:54 UTC ---
(In reply to comment #5)
> If I understand correctly however most cases wouldn't need it - I think most
> cases are use the compare&swap to take some form of lock, and then once
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48126
--- Comment #8 from Michael K. Edwards
2011-06-24 11:28:53 UTC ---
So I think we agree that the CLREX is needless, but the DMB should move after
the branch target. Does that make this bug "confirmed"? (I don't feel the
need for patch credit. :-
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48660
Michael K. Edwards changed:
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