https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85323
Julia Koval changed:
What|Removed |Added
CC||julia.koval at intel dot com
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83618
Julia Koval changed:
What|Removed |Added
CC||julia.koval at intel dot com
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83618
--- Comment #3 from Julia Koval ---
Fixed by r257229
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82812
Julia Koval changed:
What|Removed |Added
CC||julia.koval at intel dot com
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84902
Julia Koval changed:
What|Removed |Added
CC||julia.koval at intel dot com
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84945
Julia Koval changed:
What|Removed |Added
CC||julia.koval at intel dot com
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80582
Yulia Koval changed:
What|Removed |Added
CC||julia.koval at intel dot com
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80582
--- Comment #2 from Yulia Koval ---
This is fixed on trunk:
https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=23f05e90ea5b60b676c69f5bf481bfd6c3a90160
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80862
--- Comment #2 from Yulia Koval ---
Patch posted at https://gcc.gnu.org/ml/gcc-patches/2017-05/msg02013.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80862
--- Comment #3 from Yulia Koval ---
Fixed by https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=249009
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79793
--- Comment #2 from Yulia Koval ---
Patch posted at
https://gcc.gnu.org/ml/gcc-patches/2017-03/msg00178.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82344
--- Comment #1 from Yulia Koval ---
Created attachment 42252
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42252&action=edit
RSQRT disable patch
Performance can be fixed on new architectures by disabling Newthon-Raphson.
Unfortunately it
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82344
Yulia Koval changed:
What|Removed |Added
CC||ubizjak at gmail dot com
--- Comment #2 fr
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82344
--- Comment #5 from Yulia Koval ---
(In reply to Richard Biener from comment #3)
> So the newton-raphson step causes register pressure to increase and post
> haswell this makes code slower than not using rsqrt (thus using sqrtf and a
> division)?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67552
--- Comment #5 from Yulia Koval ---
Sorry, I don't understand why we shouldn't preserve the red zone. The function
"foo", executing before the interrupt was called, used its red zone. If the
interrupt does not adjust the stack pointer, who contro
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67963
--- Comment #3 from Yulia Koval ---
Patch posted at:
https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01369.html
The same test with this patch:
objdump -d test.o
test.o: file format elf32-i386
Disassembly of section .text:
:
0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68263
--- Comment #4 from Yulia Koval ---
Why should TARGET_IAMCU support SSE?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68263
--- Comment #11 from Yulia Koval ---
>HJ, can you please test the patch for IAMCU, also with AVX target?
Tests are ok for IAMCU target
: target
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
This problem exists for gcc at least for --target=i586-elf, --target=i386-elf.
It is caused by the file gcc/config/newlib-stdint.h. It has:
#ifndef STDINT_LONG32
#define
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
Reproduce:
$ gcc ../../gcc/testsuite/gcc.target/i386/readeflags-1.c -O0 -m32 -march=i586
-lm
$ ./a.out
Aborted (core dumped)
Carry flag
Version: 4.9.3
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
The test tries to generate code for:
return a[i+1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66749
--- Comment #1 from Yulia Koval ---
Reproduce:
./gcc -Bgcc addr-sel-1.c -O2 -m32 -mregparm=3 -mtune=i686 -S -o addr-sel-1.s
-mtune=i686 is dg-option of the test.
: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
Reproduce:
./gcc -Bgcc gcc.target/i386/aggregate-ret2.c -m32 -mregparm=3 -S
Generated code:
.cfi_def_cfa 4, 4
ret
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
Reproduce:
gcc builtin-apply2.c -m32 -mregparam=3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66750
--- Comment #4 from Yulia Koval ---
Well, it fixes issue for -miamcu, but not for "-m32 -mregparm=3", am i right?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66749
--- Comment #5 from Yulia Koval ---
(In reply to H.J. Lu from comment #4)
> Created attachment 35904 [details]
> A patch
>
> Please try this.
It fixes the problem.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66703
--- Comment #2 from Yulia Koval ---
Why zero-extend with and is better than zero-extend with movz? Why it's ok to
clobber the flags?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66806
Yulia Koval changed:
What|Removed |Added
CC||julia.koval at intel dot com
--- Comment
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
Created attachment 35934
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=35934&action=edit
proposed patch
$ cat test.c
int vv;
void
i (void)
{
static int a[vv];
}
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
FAIL: gcc.dg/tree-ssa/reassoc-37.c scan-tree-dump optimized
"(8784908|0x0*860c0c)"
FAIL: gcc.dg/tree-ssa/reassoc-37.c scan-tree-dump optimized "(<<|>>)&qu
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62265
Yulia Koval changed:
What|Removed |Added
CC||julia.koval at intel dot com
--- Comment
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66821
--- Comment #2 from Yulia Koval ---
Well, second one looks better, but first one generates 9b smaller code.
Can we disable this test for this target if it is not an issue?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66822
Yulia Koval changed:
What|Removed |Added
CC||izamyatin at gmail dot com
--- Comment #1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66821
--- Comment #4 from Yulia Koval ---
The issue remains for -march=iamcu but not for -miamcu.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66821
--- Comment #6 from Yulia Koval ---
msticlxl58$ size miam
textdata bss dec hex filename
72 0 0 72 48 miam
msticlxl58$ size march
textdata bss dec hex filename
81 0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66821
--- Comment #8 from Yulia Koval ---
(In reply to H.J. Lu from comment #7)
> (In reply to Yulia Koval from comment #6)
> > msticlxl58$ size miam
> >textdata bss dec hex filename
> > 72 0 0 72 48 miam
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
reprodoce:
gcc -O0 -m32 -mregparm=3 nested-1.c
/gcc/gcc/testsuite/gcc.dg/torture/stackalign/nested-1.c: In
: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: julia.koval at intel dot com
Target Milestone: ---
The normal -m32 version optimizes the sum to just return 28. However if i use
-march=pentium: 191t.optimized dump has:
foo
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