[Bug sanitizer/61771] Test failures in ASan testsuite on ARM Linux due to FP format mismatch between libasan and GCC.

2014-07-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61771 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/61622] [4.8 regression] internal compiler error: in simplify_const_unary_operation, at simplify-rtx.c:1508

2014-07-24 Thread ramana at gcc dot gnu.org
at gcc dot gnu.org Ever confirmed|0 |1 Summary|internal compiler error: in |[4.8 regression] internal |simplify_const_unary_operat |compiler error: in |ion, at simplify-rtx.c:1508 |simplify_const_unary_operat

[Bug target/61578] Code size increase for ARM thumb compared to 4.8.x when compiling with -Os

2014-07-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/61551] [NEON] alter costs to allow use of post-indexed addressing modes for VLD{2..4}/VST{2..4}

2014-07-25 Thread ramana at gcc dot gnu.org
Status|UNCONFIRMED |NEW Last reconfirmed||2014-07-25 CC||ramana at gcc dot gnu.org Target Milestone|--- |4.10.0 Ever confirmed|0 |1

[Bug target/61948] [ARM] [4.10 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

2014-07-29 Thread ramana at gcc dot gnu.org
CC||ramana at gcc dot gnu.org Known to work||4.8.3, 4.9.0, 4.9.1 Version|4.9.0 |4.10.0 Summary|[ARM] [4.9 regression] ICE |[ARM] [4.10 regression] ICE |with DImode shift

[Bug target/61948] [ARM] [4.10 regression] ICE with DImode shift by 1 bit (in copyprop_hardreg_forward_1)

2014-08-04 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61948 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |4.10.0

[Bug target/62014] [AArch64] Using -mgeneral-regs-only may lead to ICE

2014-08-05 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62014 Ramana Radhakrishnan changed: What|Removed |Added Target||aarch64-* Status|UNCO

[Bug target/62014] [AArch64] Using -mgeneral-regs-only may lead to ICE

2014-08-05 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62014 --- Comment #7 from Ramana Radhakrishnan --- (In reply to ktkachov from comment #6) > One crude way to look is by looking for the "w" constraint that signifies > usage of FP registers in the md files and seeing whether those usages are > properly

[Bug target/61915] [AArch64] High amounts of GP to FP register moves using LRA on AArch64

2014-08-05 Thread ramana at gcc dot gnu.org
Target||aarch64-* Status|UNCONFIRMED |NEW Last reconfirmed||2014-08-05 Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org Summary|[AArch64] Default use of|[AArch64

[Bug target/61413] __ARM_SIZEOF_WCHAR_T is constant 32 -- should be 4 or 2

2014-08-11 Thread ramana at gcc dot gnu.org
|UNCONFIRMED |ASSIGNED Last reconfirmed||2014-08-11 CC||ramana at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org Ever confirmed|0

[Bug target/61373] neon registers restored incorrectly with -mapcs-frame -O -fno-omit-frame-pointer

2014-08-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61373 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug middle-end/60281] Address Sanitizer triggers alignment fault in ARM machines

2014-08-12 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |4.9.1 --- Comment #4 from Ramana Radhakrishnan --- >From code generated currently - looks fixed for 4.9.1 since GCC 4.9.0 was actually relea

[Bug target/62098] [4.9 regression] incorrect code generated by arm gcc

2014-08-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62098 Ramana Radhakrishnan changed: What|Removed |Added Keywords||wrong-code Status|UNC

[Bug target/62098] [4.9/4.10 regression] incorrect code generated by arm gcc

2014-08-12 Thread ramana at gcc dot gnu.org
|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org

[Bug target/62098] [4.9/4.10 regression] incorrect code generated by arm gcc

2014-08-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62098 --- Comment #2 from Ramana Radhakrishnan --- Created attachment 33300 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=33300&action=edit Patch under testing. Embarassing patch to fix the issue. Currently being tested .

[Bug target/62098] [4.9/4.10 regression] incorrect code generated by arm gcc

2014-08-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62098 --- Comment #3 from Ramana Radhakrishnan --- Author: ramana Date: Tue Aug 12 14:32:07 2014 New Revision: 213861 URL: https://gcc.gnu.org/viewcvs?rev=213861&root=gcc&view=rev Log: Fix PR target/62098 2014-08-12 Ramana Radhakrishnan PR ta

[Bug target/61413] __ARM_SIZEOF_WCHAR_T is constant 32 -- should be 4 or 2

2014-08-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61413 --- Comment #2 from Ramana Radhakrishnan --- Author: ramana Date: Tue Aug 12 14:59:23 2014 New Revision: 213864 URL: https://gcc.gnu.org/viewcvs?rev=213864&root=gcc&view=rev Log: Fix PR target/61413 2014-08-12 Ramana Radhakrishnan PR t

[Bug tree-optimization/61441] ARM aarch64 fails to quiet signaling NaN

2014-08-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61441 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug c++/62150] [5.0 regression] test case g++.dg/ext/arm-fp16/fp16-mangle-1.C failed on ARM

2014-08-19 Thread ramana at gcc dot gnu.org
||4.8.3, 4.9.0, 4.9.1 Keywords||wrong-code Last reconfirmed||2014-08-19 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1

[Bug target/62098] [4.9/5 regression] incorrect code generated by arm gcc

2014-08-20 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62098 --- Comment #4 from Ramana Radhakrishnan --- Author: ramana Date: Wed Aug 20 11:31:21 2014 New Revision: 214217 URL: https://gcc.gnu.org/viewcvs?rev=214217&root=gcc&view=rev Log: Backport fix for PR target/62098 2014-08-20 Ramana Radhakrishnan

[Bug target/62098] [4.9/5 regression] incorrect code generated by arm gcc

2014-08-20 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62098 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/67477] [6 Regression] ICE in cselib_record_set, at cselib.c:2388

2015-11-27 Thread ramana at gcc dot gnu.org
||2015-11-27 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- Cannot reproduce on trunk any more. Not sure where it got fixed though.

[Bug target/63870] [Aarch64] [ARM] Errors in use of NEON intrinsics are reported incorrectly

2015-12-01 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63870 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |6.0 --- Comment #16 from Ramana R

[Bug target/60949] Thumb2 LRA ICE for case pr34856.c

2015-12-04 Thread ramana at gcc dot gnu.org
|ramana at gcc dot gnu.org |unassigned at gcc dot gnu.org --- Comment #5 from Ramana Radhakrishnan --- I can no longer reproduce this on the head of the GCC 5 tree.

[Bug target/64783] -march=armv8.1-a should be supported

2015-12-16 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64783 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |6.0 --- Comment #5 from Ramana Ra

[Bug target/68256] Defining TARGET_USE_CONSTANT_BLOCKS_P causes go bootstrap failure on aarch64.

2015-12-16 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68256 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|6.0 |7.0 Summary|[6 regress

[Bug target/63304] Aarch64 pc-relative load offset out of range

2016-01-21 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63304 --- Comment #44 from Ramana Radhakrishnan --- (In reply to Christophe Lyon from comment #39) > We have backported r227748, 229160 and 229161 to our linaro-gcc-5 branch, > and we got a bug report from the kernel team. Sorry about the breakage.

[Bug target/63304] Aarch64 pc-relative load offset out of range

2016-01-21 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63304 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug middle-end/67295] [ARM][6 Regression] FAIL: gcc.target/arm/builtin-bswap-1.c scan-assembler-times revshne\\t 1

2016-01-21 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67295 --- Comment #10 from Ramana Radhakrishnan --- (In reply to Jakub Jelinek from comment #7) > At the RTL level, it would be nice if REE optimized away at least the > redundant zero extension, thus change: > cmp r1, #0 > rev16ne

[Bug rtl-optimization/65932] [5 Regression] Linux-3.10.75 on arm926ej-s does not boot due to wrong code generation

2016-01-21 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932 --- Comment #24 from Ramana Radhakrishnan --- *** Bug 67295 has been marked as a duplicate of this bug. ***

[Bug rtl-optimization/64164] [4.9/5/6 Regression] one more stack slot used due to one less inlining level

2016-01-21 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64164 Bug 64164 depends on bug 67295, which changed state. Bug 67295 Summary: [ARM][6 Regression] FAIL: gcc.target/arm/builtin-bswap-1.c scan-assembler-times revshne\\t 1 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67295 What|Removed

[Bug middle-end/67295] [ARM][6 Regression] FAIL: gcc.target/arm/builtin-bswap-1.c scan-assembler-times revshne\\t 1

2016-01-21 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67295 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/63304] Aarch64 pc-relative load offset out of range

2016-01-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63304 --- Comment #49 from Ramana Radhakrishnan --- (In reply to ard.biesheuvel from comment #48) > (In reply to Richard Earnshaw from comment #47) > > (In reply to ard.biesheuvel from comment #46) > > > One issue that this causes, which I did not see

[Bug target/66200] GCC for ARM / AArch64 doesn't define TARGET_RELAXED_ORDERING

2015-06-04 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66200 --- Comment #2 from Ramana Radhakrishnan --- Author: ramana Date: Thu Jun 4 09:19:51 2015 New Revision: 224118 URL: https://gcc.gnu.org/viewcvs?rev=224118&root=gcc&view=rev Log: Remove TARGET_RELAXED_ORDERING and optimize for weak memory models

[Bug c++/66192] C++ static initializer unnecessary __cxa_guard_acquire for TARGET_RELAXED_ORDERING

2015-06-04 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66192 --- Comment #2 from Ramana Radhakrishnan --- Author: ramana Date: Thu Jun 4 09:19:51 2015 New Revision: 224118 URL: https://gcc.gnu.org/viewcvs?rev=224118&root=gcc&view=rev Log: Remove TARGET_RELAXED_ORDERING and optimize for weak memory models

[Bug target/66200] GCC for ARM / AArch64 doesn't define TARGET_RELAXED_ORDERING

2015-06-04 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66200 --- Comment #3 from Ramana Radhakrishnan --- Fixed on trunk so far.

[Bug middle-end/66325] [6 Regression] ICE in gcc.c-torture/execute/930408-1.c, verify_type fails with --enable-checking=yes on arm-none-eabi

2015-06-08 Thread ramana at gcc dot gnu.org
||2015-06-08 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #2 from Ramana Radhakrishnan --- confirmed.

[Bug target/66428] [6 regression] FAIL: g++.dg/abi/aarch64_guard1.C -std=gnu++98 scan-tree-dump original "_ZGVZ3foovE1x & 1"

2015-06-10 Thread ramana at gcc dot gnu.org
||2015-06-10 Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Ramana Radhakrishnan --- mine.

[Bug target/66200] GCC for ARM / AArch64 doesn't define TARGET_RELAXED_ORDERING

2015-06-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66200 --- Comment #5 from Ramana Radhakrishnan --- Author: ramana Date: Wed Jun 10 07:43:31 2015 New Revision: 224313 URL: https://gcc.gnu.org/viewcvs?rev=224313&root=gcc&view=rev Log: Handle aarch64_guard1.C test Sorry about missing this hunk in the

[Bug c++/66192] C++ static initializer unnecessary __cxa_guard_acquire for TARGET_RELAXED_ORDERING

2015-06-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66192 --- Comment #4 from Ramana Radhakrishnan --- Author: ramana Date: Wed Jun 10 07:43:31 2015 New Revision: 224313 URL: https://gcc.gnu.org/viewcvs?rev=224313&root=gcc&view=rev Log: Handle aarch64_guard1.C test Sorry about missing this hunk in the

[Bug target/66428] [6 regression] FAIL: g++.dg/abi/aarch64_guard1.C -std=gnu++98 scan-tree-dump original "_ZGVZ3foovE1x & 1"

2015-06-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66428 --- Comment #2 from Ramana Radhakrishnan --- Author: ramana Date: Wed Jun 10 07:43:31 2015 New Revision: 224313 URL: https://gcc.gnu.org/viewcvs?rev=224313&root=gcc&view=rev Log: Handle aarch64_guard1.C test Sorry about missing this hunk in the

[Bug c++/66192] C++ static initializer unnecessary __cxa_guard_acquire for TARGET_RELAXED_ORDERING

2015-06-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66192 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/66428] [6 regression] FAIL: g++.dg/abi/aarch64_guard1.C -std=gnu++98 scan-tree-dump original "_ZGVZ3foovE1x & 1"

2015-06-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66428 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/66136] AArch64 geniterators.sh relies on GNU sed syntax, causing build failure on FreeBSD and probably Mac

2015-06-10 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66136 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug ada/66242] Front-end error if exception propagation disabled

2015-06-11 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66242 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug ada/66205] gnatbind generates invalid code when finalization is enabled in restricted runtime

2015-06-11 Thread ramana at gcc dot gnu.org
, ||ramana at gcc dot gnu.org --- Comment #1 from Ramana Radhakrishnan --- Eric, Would you be able to comment further ? Ramana

[Bug target/65697] __atomic memory barriers not strong enough for __sync builtins

2015-06-11 Thread ramana at gcc dot gnu.org
||2015-06-11 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #61 from Ramana Radhakrishnan --- Well, confirmed at least. And at the minute fixed on trunk - not sure if we are asking for

[Bug c++/66192] C++ static initializer unnecessary __cxa_guard_acquire for TARGET_RELAXED_ORDERING

2015-06-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66192 --- Comment #6 from Ramana Radhakrishnan --- Author: ramana Date: Fri Jun 12 09:49:41 2015 New Revision: 224411 URL: https://gcc.gnu.org/viewcvs?rev=224411&root=gcc&view=rev Log: Use atomics in guard.cc. This provides proper definitions for _GL

[Bug target/66200] GCC for ARM / AArch64 doesn't define TARGET_RELAXED_ORDERING

2015-06-12 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66200 --- Comment #6 from Ramana Radhakrishnan --- Author: ramana Date: Fri Jun 12 09:49:41 2015 New Revision: 224411 URL: https://gcc.gnu.org/viewcvs?rev=224411&root=gcc&view=rev Log: Use atomics in guard.cc. This provides proper definitions for _GL

[Bug target/66200] GCC for ARM / AArch64 doesn't define TARGET_RELAXED_ORDERING

2015-06-16 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66200 --- Comment #7 from Ramana Radhakrishnan --- Author: ramana Date: Tue Jun 16 15:26:41 2015 New Revision: 224524 URL: https://gcc.gnu.org/viewcvs?rev=224524&root=gcc&view=rev Log: Fix PR target/66200 on the 4.9 branch Define TARGET_RELAXED_ORDER

[Bug target/66554] [4.9 Regression] ICE (in expand_fix, at optabs.c:5365) on aarch64-linux-gnu

2015-06-17 Thread ramana at gcc dot gnu.org
||2015-06-17 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #5 from Ramana Radhakrishnan --- Confirmed.

[Bug target/63521] The AArch64 backend doesn't define REG_ALLOC_ORDER.

2015-06-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63521 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug target/63408] [4.9/5/6 regression] GCC emits incorrect fixed->fp conversion instruction on Cortex-M4 target

2015-06-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63408 --- Comment #9 from Ramana Radhakrishnan --- (In reply to Itay Perl from comment #7) > Any news? This bug still prevents us from compiling our code with > optimizations. > > Thanks. Sorry to have dropped the ball on this one - does replacing th

[Bug testsuite/65578] FAIL: gcc.target/arm/builtin-bswap-1.c (test for excess errors)

2015-06-23 Thread ramana at gcc dot gnu.org
||2015-06-23 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Ramana Radhakrishnan --- Confirmed.

[Bug target/65375] aarch64: poor codegen for vld2q_f32 and vst2q_f32

2015-06-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65375 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug target/63408] [4.9/5/6 regression] GCC emits incorrect fixed->fp conversion instruction on Cortex-M4 target

2015-06-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63408 --- Comment #11 from Ramana Radhakrishnan --- (In reply to Itay Perl from comment #10) > A few examples: > > a=100, b=0x7fff -O0: 0.0 -O3: 200.0 > a=0, b=0x7fff/100.0f -O0: -1.0 -O3: 1.0 > a=0, b=-0x7fff/100.0f -O0

[Bug target/63408] [4.9/5/6 regression] GCC emits incorrect fixed->fp conversion instruction on Cortex-M4 target

2015-06-23 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63408 --- Comment #12 from Ramana Radhakrishnan --- Created attachment 35833 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=35833&action=edit current patch. Patch I'm testing - this is based on a 4.9 tree where I could easily replicate the probl

[Bug target/63408] [4.9/5/6 regression] GCC emits incorrect fixed->fp conversion instruction on Cortex-M4 target

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63408 --- Comment #13 from Ramana Radhakrishnan --- Author: ramana Date: Wed Jun 24 08:28:08 2015 New Revision: 224879 URL: https://gcc.gnu.org/viewcvs?rev=224879&root=gcc&view=rev Log: Fix PR target/63408 The attached patch fixes PR target/63408 and

[Bug target/65375] aarch64: poor codegen for vld2q_f32 and vst2q_f32

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65375 --- Comment #11 from Ramana Radhakrishnan --- (In reply to Jim Wilson from comment #10) > Improved, but not completely resolved. We still get unnecessary orr > instructions, same as in comment 2. This is partly an issue with the > register allo

[Bug target/66200] GCC for ARM / AArch64 doesn't define TARGET_RELAXED_ORDERING

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66200 --- Comment #8 from Ramana Radhakrishnan --- Author: ramana Date: Wed Jun 24 09:59:28 2015 New Revision: 224890 URL: https://gcc.gnu.org/viewcvs?rev=224890&root=gcc&view=rev Log: Fix PR target/66200 This applies the same fix for PR target/66200

[Bug other/58133] GCC should emit arm assembly following the unified syntax

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58133 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug other/58133] GCC should emit arm assembly following the unified syntax

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58133 --- Comment #5 from Ramana Radhakrishnan --- Oh and Kyrylo fixed up vfp.md last year too. So it's only ARM state that remains. I have a few patches in flight that I'm testing.

[Bug middle-end/65358] wrong parameter passing code with tail call optimization on arm

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65358 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/64172] [4.9 Regression] Wrong code with GCC vector extensions on ARM when compiled without NEON

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64172 Ramana Radhakrishnan changed: What|Removed |Added Keywords||ra Component|target

[Bug target/59833] ARM soft-float extendsfdf2 fails to quiet signaling NaN

2015-06-24 Thread ramana at gcc dot gnu.org
|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org --- Comment #4 from Ramana Radhakrishnan --- Need to apply Aurelien's patch - looks like that's slipped through the cracks.

[Bug rtl-optimization/49799] gcc arm generates illegal sbfx instruction

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49799 Ramana Radhakrishnan changed: What|Removed |Added CC||david.gilbert at linaro dot org -

[Bug target/48803] arm: Bad assembler produced by bit extract/shift

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=48803 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug debug/45447] ICE with `-g -femit-struct-debug-baseonly'

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=45447 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/43722] ICE when passing NEON registers using const refrences

2015-06-24 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |4.5.0 --- Comment #11 from Ramana Radhakrishnan --- Fixed in 4.5.0

[Bug target/40836] ICE: "insn does not satisfy its constraints" (iwmmxt_movsi_insn)

2015-06-24 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org --- Comment #34 from Ramana Radhakrishnan --- I guess waiting till someone tests on iwmmxt2 or proposes an actual tested patch for this on trunk.

[Bug target/49437] interrupt return pop sometimes corrupts sp

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49437 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/39585] GCC Generates Incorrect Stack Instructins for Interrupts When using -Os

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39585 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug rtl-optimization/48808] ICE in spill_failure, at reload1.c:2113

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=48808 Ramana Radhakrishnan changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/65924] [6 Regression] ICE const_int_operand failed on arm-none-eabi

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65924 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug debug/65771] ICE (in loc_list_from_tree, at dwarf2out.c:14964) on arm-linux-gnueabihf

2015-06-24 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65771 Ramana Radhakrishnan changed: What|Removed |Added CC||ramana at gcc dot gnu.org

[Bug bootstrap/65664] ARM bootstrap fails with --with-fpu=neon-vfpv4

2015-06-24 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |4.9.0 --- Comment #5 from Ramana Radhakrishnan --- Fixed in 4.9.0 then.

[Bug target/29693] ICE while compiling gcc-3.4.3 with gcc-4.1.1

2015-06-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=29693 --- Comment #9 from Ramana Radhakrishnan --- Author: ramana Date: Thu Jun 25 08:18:19 2015 New Revision: 224932 URL: https://gcc.gnu.org/viewcvs?rev=224932&root=gcc&view=rev Log: Fix PR target/29693 2015-06-25 Ramana Radhakrishnan

[Bug target/29693] ICE while compiling gcc-3.4.3 with gcc-4.1.1

2015-06-25 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED Target Milestone|--- |6.0 --- Comment #10 from Ramana Radhakrishnan --- Hmmm atleast fixed for 6.0 ...

[Bug target/63408] [4.9/5/6 regression] GCC emits incorrect fixed->fp conversion instruction on Cortex-M4 target

2015-06-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63408 --- Comment #14 from Ramana Radhakrishnan --- Author: ramana Date: Thu Jun 25 08:36:03 2015 New Revision: 224933 URL: https://gcc.gnu.org/viewcvs?rev=224933&root=gcc&view=rev Log: Fix PR target/63408 Backport fix for PR target/63408 from mainli

[Bug c++/66666] ARM compiled code segmentation fault on multiple inheritance

2015-06-25 Thread ramana at gcc dot gnu.org
*-*-* |3.18.0-linux4sam_5.0-alpha1 | |#1 Wed Jun 24 09:45:58 CEST | |2015 armv7l GNU/Linux | CC||ramana at gcc dot gnu.org Host|Linux |x86_64-*-* |MatrixPlatVb-lx

[Bug target/65375] aarch64: poor codegen for vld2q_f32 and vst2q_f32

2015-06-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65375 --- Comment #13 from Ramana Radhakrishnan --- Or indeed PR 63277...

[Bug rtl-optimization/63277] ARM - NEON excessive use of vmov for vtbl2 / uint8x8x2 for shuffling data unnecessarily around

2015-06-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63277 Ramana Radhakrishnan changed: What|Removed |Added Blocks||47562 --- Comment #6 from Ramana

[Bug tree-optimization/66675] New: Could improve vector bit_field_ref style optimizations.

2015-06-25 Thread ramana at gcc dot gnu.org
Priority: P3 Component: tree-optimization Assignee: unassigned at gcc dot gnu.org Reporter: ramana at gcc dot gnu.org Target Milestone: --- This example #include int main(int argc, char *argv[]) { int8x8_t a = {argc, 1, 2, 3, 4, 5, 6, 7}; int8x8_t b = {0, 1, 2

[Bug tree-optimization/66675] Could improve vector bit_field_ref style optimizations.

2015-06-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66675 Ramana Radhakrishnan changed: What|Removed |Added Keywords||missed-optimization T

[Bug tree-optimization/66675] Could improve vector lane folding style operations.

2015-06-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66675 --- Comment #1 from Ramana Radhakrishnan --- The GCC vector speak variant is as below. typedef char v8qi __attribute__ ((vector_size (8))); int main(int argc, char *argv[]) { v8qi a = {argc, 1, 2, 3, 4, 5, 6, 7}; v8qi b = {0, 1, 2, 3, 4,

[Bug target/47562] [meta-bug] keep track of Neon Intrinsics enhancements

2015-06-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47562 Ramana Radhakrishnan changed: What|Removed |Added Target|arm-linux-gnueabi, arm-eabi |arm-linux-gnueabi,

[Bug rtl-optimization/65912] x_rtl.x_frame_offset not updated after frame related insn deleted

2015-06-25 Thread ramana at gcc dot gnu.org
Target||aarch64*-*-* Status|UNCONFIRMED |NEW Last reconfirmed||2015-06-25 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment

[Bug rtl-optimization/65912] x_rtl.x_frame_offset not updated after frame related insn deleted

2015-06-25 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65912 Ramana Radhakrishnan changed: What|Removed |Added Blocks||47562 --- Comment #3 from Ramana

[Bug target/65711] arm*-linux* "link" spec passes '-dynamic-linker' even for '-shared'

2015-06-26 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65711 Ramana Radhakrishnan changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug rtl-optimization/65371] arm loop with volatile variable

2015-06-26 Thread ramana at gcc dot gnu.org
Status|UNCONFIRMED |NEW Last reconfirmed||2015-06-26 CC||ramana at gcc dot gnu.org Known to work||6.0 Ever confirmed|0 |1 Known to fail

[Bug target/63408] [4.9/5/6 regression] GCC emits incorrect fixed->fp conversion instruction on Cortex-M4 target

2015-07-01 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63408 --- Comment #16 from Ramana Radhakrishnan --- Author: ramana Date: Wed Jul 1 08:01:57 2015 New Revision: 225226 URL: https://gcc.gnu.org/viewcvs?rev=225226&root=gcc&view=rev Log: Fix PR target/63408 on the 4.9 branch. 2015-07-01 Ramana Radhak

[Bug target/63408] [4.9/5/6 regression] GCC emits incorrect fixed->fp conversion instruction on Cortex-M4 target

2015-07-01 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63408 Ramana Radhakrishnan changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug c++/66745] [6 Regression] ice in check_unstripped_args

2015-07-03 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66745 Ramana Radhakrishnan changed: What|Removed |Added Keywords||ice-on-valid-code Tar

[Bug c++/66745] [6 Regression] ice in check_unstripped_args

2015-07-03 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66745 --- Comment #5 from Ramana Radhakrishnan --- I've had a look at it - however it's not an area that I've worked in before, so beware it will take me a while to understand the issue here. If someone can help with a reduced testcase that would be a

[Bug target/66136] AArch64 geniterators.sh relies on GNU sed syntax, causing build failure on FreeBSD and probably Mac

2015-07-06 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66136 Ramana Radhakrishnan changed: What|Removed |Added Target Milestone|--- |5.2 --- Comment #16 from Ramana R

[Bug target/65956] [5/6 Regression] Another ARM overaligned arg passing issue

2015-07-15 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Resolution|--- |FIXED --- Comment #7 from Ramana Radhakrishnan --- Fixed for 5.2 ?

[Bug target/66731] vnmul, fnmul patterns incorrect for -frounding-math

2015-07-22 Thread ramana at gcc dot gnu.org
||2015-07-22 CC||ramana at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Ramana Radhakrishnan --- Confirmed.

[Bug target/63304] Aarch64 pc-relative load offset out of range

2015-07-22 Thread ramana at gcc dot gnu.org
||ramana at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot gnu.org --- Comment #18 from Ramana Radhakrishnan --- I'm taking a look into this.

[Bug target/63304] Aarch64 pc-relative load offset out of range

2015-07-27 Thread ramana at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63304 --- Comment #19 from Ramana Radhakrishnan --- (In reply to Ramana Radhakrishnan from comment #18) > I'm taking a look into this. RFC here - https://gcc.gnu.org/ml/gcc-patches/2015-07/msg02258.html

[Bug other/67020] /gcc/gcc.c:878:32: error: macro "CHOOSE_DYNAMIC_LINKER" requires 4 arguments, but only 3 given

2015-07-29 Thread ramana at gcc dot gnu.org
||2015-07-29 CC||nsz at gcc dot gnu.org, ||ramana at gcc dot gnu.org Version|5.2.0 |4.7.3 Ever confirmed|0 |1

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