https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56096
--- Comment #4 from Andrew Pinski ---
I think one way to improve the constant forming is during isel if we have
condition exec (e.g. arm or ia64) we should transform:
_7 = _1 != 0;
_8 = (int) _7;
_9 = _8 << 3;
to:
_9 = _1 ? 8 : 0;
That will
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56096
--- Comment #3 from Andrew Pinski ---
GCC 7-10 produced:
movwr3, #32896
tst r1, r3
it ne
lsrne r0, r0, #8
bx lr
But GCC 11 produces:
movwr3, #32896
tst r1, r3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56096
Andrew Pinski changed:
What|Removed |Added
Target|armv5 |
Last reconfirmed|2013-03-05 00:00:00
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56096
Richard Earnshaw changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
